Re: [edk2-devel] [PATCH v2 1/1] MdePkg/BaseLib: Add SpeculationBarrier implementation for RiscV64

["Michael D Kinney" <michael.d.kinney@intel.com>]

Merged

Mike


> -----Original Message-----
> From: Li, Yong <yong.li@intel.com>
> Sent: Monday, June 5, 2023 12:45 AM
> To: devel@edk2.groups.io; sunilvl@ventanamicro.com; Kinney, Michael D
> <michael.d.kinney@intel.com>; Gao, Liming <gaoliming@byosoft.com.cn>
> Cc: Warkentin, Andrei <andrei.warkentin@intel.com>; Chai, Evan
> <evan.chai@intel.com>; Tuan Phan <tphan@ventanamicro.com>
> Subject: Re: [edk2-devel] [PATCH v2 1/1] MdePkg/BaseLib: Add
> SpeculationBarrier implementation for RiscV64
> 
> Hi  Michael,
> 
> I updated the commit messages and the EDK II CI passes,
> The PR link is as below.
> https://github.com/tianocore/edk2/pull/4480
> 
> Please help merge, thanks for the helping
> 
> 
> On 2023/6/3 14:13, Li, Yong wrote:
> > Hi Michael
> >
> > This is the change to MdePkg/Library/BaseLib/RiscV64.
> > Since it is for RiscV specific, I somehow got the review from Sunil.
> > Not sure need additional reviewer and or anything else from my side ?
> > It is my first patch to edk2, please help proceed and look for the
> feedback. Thanks
> >
> >
> > On 2023/6/3 1:09, Sunil V L wrote:
> >> On Thu, Jun 01, 2023 at 06:56:05PM +0800, Yong Li wrote:
> >>> Implement the SpeculationBarrier with implementations consisting of
> >>> fence instruction which provides finer-grain memory orderings.
> >>> Perform Data Barrier in RiscV: fence rw,rw
> >>> Perform Instruction Barrier in RiscV: fence.i; fence r,r
> >>> More detail is in Appendix A: RVWMO Explanatory Material in
> >>> https://github.com/riscv/riscv-isa-manual
> >>>
> >>> This API is first introduced in the below commits for IA32 and x64
> >>>
> https://github.com/tianocore/edk2/commit/d9f1cac51bd354507e880e614d11a1dc16
> 0d38a3
> >>>
> https://github.com/tianocore/edk2/commit/e83d841fdc2878959185c4c6cc38a7a1e8
> 8377a4
> >>> and below the commit for ARM and AArch64 implementation
> >>>
> https://github.com/tianocore/edk2/commit/c0959b4426b2da45cdb8146a5116bb4fd9
> b86534
> >>>
> >>> This commit is to add the RiscV64 implementation which will be used by
> >>> variable service under Variable/RuntimeDxe
> >>>
> >>> Cc: Andrei Warkentin <andrei.warkentin@intel.com>
> >>> Cc: Evan Chai <evan.chai@intel.com>
> >>> Cc: Sunil V L <sunilvl@ventanamicro.com>
> >>> Cc: Tuan Phan <tphan@ventanamicro.com>
> >>> Signed-off-by: Yong Li <yong.li@intel.com>
> >>> ---
> >>
> >> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
> >>
> >> Thanks,
> >> Sunil
> >>
> >>
> >> 
> >>
> >>