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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,michael.d.kinney@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: WRu9i9tlFO7jwORTg2GbsAuTx7686176AA= Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=TpWDvMmE; arc=reject ("signature check failed: fail, {[1] = sig:microsoft.com:reject}"); dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Acked-by: Michael D Kinney > -----Original Message----- > From: Chao Li > Sent: Sunday, November 5, 2023 7:28 PM > To: devel@edk2.groups.io > Cc: Kinney, Michael D ; Gao, Liming > ; Liu, Zhiguang > Subject: [PATCH v2 08/30] MdePkg: Add IOCSR operation for LoongArch >=20 > Add IoCsrRead8, IoCsrRead16, IoCsrRead32, IoCsrRead64, IoCsrWrite8, > IoCsrWrite16, IoCsrWrite32, IoCsrWrite64 to operate the IOCSR > registers > of LoongArch architecture. >=20 > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4584 >=20 > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > Signed-off-by: Chao Li > --- > MdePkg/Include/Library/BaseLib.h | 112 +++++++++++++++++++ > MdePkg/Library/BaseLib/BaseLib.inf | 1 + > MdePkg/Library/BaseLib/LoongArch64/IoCsr.S | 120 > +++++++++++++++++++++ > 3 files changed, 233 insertions(+) > create mode 100644 MdePkg/Library/BaseLib/LoongArch64/IoCsr.S >=20 > diff --git a/MdePkg/Include/Library/BaseLib.h > b/MdePkg/Include/Library/BaseLib.h > index 234f3065c2..88ee6e9d51 100644 > --- a/MdePkg/Include/Library/BaseLib.h > +++ b/MdePkg/Include/Library/BaseLib.h > @@ -338,6 +338,118 @@ CsrXChg ( > IN UINTN Mask > ); >=20 > +/** > + IO CSR read byte operation. > + > + @param[in] Select IO CSR read instruction select values. > + > + @return The return value of iocsrrd.b instruction. > + > +**/ > +UINT8 > +IoCsrRead8 ( > + IN UINTN Select > + ); > + > +/** > + IO CSR read half word operation. > + > + @param[in] Select IO CSR read instruction select values. > + > + @return The return value of iocsrrd.h instruction. > + > +**/ > +UINT16 > +IoCsrRead16 ( > + IN UINTN Select > + ); > + > +/** > + IO CSR read word operation. > + > + @param[in] Select IO CSR read instruction select values. > + > + @return The return value of iocsrrd.w instruction. > + > +**/ > +UINT32 > +IoCsrRead32 ( > + IN UINTN Select > + ); > + > +/** > + IO CSR read double word operation. Only for LoongArch64. > + > + @param[in] Select IO CSR read instruction select values. > + > + @return The return value of iocsrrd.d instruction. > + > +**/ > +UINT64 > +IoCsrRead64 ( > + IN UINTN Select > + ); > + > +/** > + IO CSR write byte operation. > + > + @param[in] Select IO CSR write instruction select values. > + @param[in] Value The iocsrwr.b will write the value. > + > + @return VOID. > + > +**/ > +VOID > +IoCsrWrite8 ( > + IN UINTN Select, > + IN UINT8 Value > + ); > + > +/** > + IO CSR write half word operation. > + > + @param[in] Select IO CSR write instruction select values. > + @param[in] Value The iocsrwr.h will write the value. > + > + @return VOID. > + > +**/ > +VOID > +IoCsrWrite16 ( > + IN UINTN Select, > + IN UINT16 Value > + ); > + > +/** > + IO CSR write word operation. > + > + @param[in] Select IO CSR write instruction select values. > + @param[in] Value The iocsrwr.w will write the value. > + > + @return VOID. > + > +**/ > +VOID > +IoCsrWrite32 ( > + IN UINTN Select, > + IN UINT32 Value > + ); > + > +/** > + IO CSR write double word operation. Only for LoongArch64. > + > + @param[in] Select IO CSR write instruction select values. > + @param[in] Value The iocsrwr.d will write the value. > + > + @return VOID. > + > +**/ > +VOID > +IoCsrWrite64 ( > + IN UINTN Select, > + IN UINT64 Value > + ); > + > #endif // defined (MDE_CPU_LOONGARCH64) >=20 > // > diff --git a/MdePkg/Library/BaseLib/BaseLib.inf > b/MdePkg/Library/BaseLib/BaseLib.inf > index 74a323c798..e72724c1c1 100644 > --- a/MdePkg/Library/BaseLib/BaseLib.inf > +++ b/MdePkg/Library/BaseLib/BaseLib.inf > @@ -412,6 +412,7 @@ > LoongArch64/Csr.c > LoongArch64/InternalSwitchStack.c > LoongArch64/AsmCsr.S | GCC > + LoongArch64/IoCsr.S | GCC > LoongArch64/GetInterruptState.S | GCC > LoongArch64/EnableInterrupts.S | GCC > LoongArch64/DisableInterrupts.S | GCC > diff --git a/MdePkg/Library/BaseLib/LoongArch64/IoCsr.S > b/MdePkg/Library/BaseLib/LoongArch64/IoCsr.S > new file mode 100644 > index 0000000000..4c0009b93a > --- /dev/null > +++ b/MdePkg/Library/BaseLib/LoongArch64/IoCsr.S > @@ -0,0 +1,120 @@ > +#-------------------------------------------------------------------- > ---------- > +# > +# LoongArch ASM IO CSR operation functions > +# > +# Copyright (c) 2023, Loongson Technology Corporation Limited. All > rights reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +#-------------------------------------------------------------------- > ---------- > + > +ASM_GLOBAL ASM_PFX (IoCsrRead8) > +ASM_GLOBAL ASM_PFX (IoCsrRead16) > +ASM_GLOBAL ASM_PFX (IoCsrRead32) > +ASM_GLOBAL ASM_PFX (IoCsrRead64) > + > +ASM_GLOBAL ASM_PFX (IoCsrWrite8) > +ASM_GLOBAL ASM_PFX (IoCsrWrite16) > +ASM_GLOBAL ASM_PFX (IoCsrWrite32) > +ASM_GLOBAL ASM_PFX (IoCsrWrite64) > + > +#/** > +# IO CSR read byte operation. > +# > +# @param[in] Select IO CSR read instruction select values. > +# > +# @return The return value of iocsrrd.b instruction. > +# > +#**/ > +ASM_PFX (IoCsrRead8): > + iocsrrd.b $a0, $a0 > + jirl $zero, $ra, 0 > + > +#/** > +# IO CSR read half word operation. > +# > +# @param[in] Select IO CSR read instruction select values. > +# > +# @return The return value of iocsrrd.h instruction. > +# > +#**/ > +ASM_PFX (IoCsrRead16): > + iocsrrd.h $a0, $a0 > + jirl $zero, $ra, 0 > + > +#/** > +# IO CSR read word operation. > +# > +# @param[in] Select IO CSR read instruction select values. > +# > +# @return The return value of iocsrrd.w instruction. > +# > +#**/ > +ASM_PFX (IoCsrRead32): > + iocsrrd.w $a0, $a0 > + jirl $zero, $ra, 0 > + > +#/** > +# IO CSR read double word operation. Only for LoongArch64. > +# > +# @param[in] Select IO CSR read instruction select values. > +# > +# @return The return value of iocsrrd.d instruction. > +# > +#**/ > +ASM_PFX (IoCsrRead64): > + iocsrrd.d $a0, $a0 > + jirl $zero, $ra, 0 > + > +#/** > +# IO CSR write byte operation. > +# > +# @param[in] Select IO CSR write instruction select values. > +# @param[in] Value The iocsrwr.b will write the value. > +# > +# @return VOID. > +# > +#**/ > +ASM_PFX (IoCsrWrite8): > + iocsrwr.b $a1, $a0 > + jirl $zero, $ra, 0 > + > +#/** > +# IO CSR write half word operation. > +# > +# @param[in] Select IO CSR write instruction select values. > +# @param[in] Value The iocsrwr.h will write the value. > +# > +# @return VOID. > +# > +#**/ > +ASM_PFX (IoCsrWrite16): > + iocsrwr.h $a1, $a0 > + jirl $zero, $ra, 0 > + > +#/** > +# IO CSR write word operation. > +# > +# @param[in] Select IO CSR write instruction select values. > +# @param[in] Value The iocsrwr.w will write the value. > +# > +# @return VOID. > +# > +#**/ > +ASM_PFX (IoCsrWrite32): > + iocsrwr.w $a1, $a0 > + jirl $zero, $ra, 0 > + > +#/** > +# IO CSR write double word operation. Only for LoongArch64. > +# > +# @param[in] Select IO CSR write instruction select values. > +# @param[in] Value The iocsrwr.d will write the value. > +# > +# @return VOID. > +# > +#**/ > +ASM_PFX (IoCsrWrite64): > + iocsrwr.d $a1, $a0 > + jirl $zero, $ra, 0 > + .end > -- > 2.27.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#110795): https://edk2.groups.io/g/devel/message/110795 Mute This Topic: https://groups.io/mt/102413858/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/12367111/7686176/19134562= 12/xyzzy [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-