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Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=sDz1tGog; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; arc=reject ("signature check failed: fail, {[1] = sig:microsoft.com:reject}") Reviewed-by: Michael D Kinney > -----Original Message----- > From: devel@edk2.groups.io On Behalf Of Gerd > Hoffmann > Sent: Tuesday, January 30, 2024 5:05 AM > To: devel@edk2.groups.io > Cc: Michael Roth ; Oliver Steffen > ; Yao, Jiewen ; Gerd Hoffmann > ; Tom Lendacky ; Laszlo > Ersek ; Xu, Min M ; Ard > Biesheuvel ; Aktas, Erdem > > Subject: [edk2-devel] [PATCH v3 2/4] MdePkg/ArchitecturalMsr.h: add > #defines for MTRR cache types >=20 > Signed-off-by: Gerd Hoffmann > --- > MdePkg/Include/Register/Intel/ArchitecturalMsr.h | 7 +++++++ > 1 file changed, 7 insertions(+) >=20 > diff --git a/MdePkg/Include/Register/Intel/ArchitecturalMsr.h > b/MdePkg/Include/Register/Intel/ArchitecturalMsr.h > index 756e7c86ec31..2b2e34b08c8b 100644 > --- a/MdePkg/Include/Register/Intel/ArchitecturalMsr.h > +++ b/MdePkg/Include/Register/Intel/ArchitecturalMsr.h > @@ -2103,6 +2103,13 @@ typedef union { > #define MSR_IA32_MTRR_PHYSBASE9 0x00000212 > /// @} >=20 > +#define MSR_IA32_MTRR_CACHE_UNCACHEABLE 0 > +#define MSR_IA32_MTRR_CACHE_WRITE_COMBINING 1 > +#define MSR_IA32_MTRR_CACHE_WRITE_THROUGH 4 > +#define MSR_IA32_MTRR_CACHE_WRITE_PROTECTED 5 > +#define MSR_IA32_MTRR_CACHE_WRITE_BACK 6 > +#define MSR_IA32_MTRR_CACHE_INVALID_TYPE 7 > + > /** > MSR information returned for MSR indexes #MSR_IA32_MTRR_PHYSBASE0 to > #MSR_IA32_MTRR_PHYSBASE9 > -- > 2.43.0 >=20 >=20 >=20 >=20 >=20 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this 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