From: "Michael D Kinney" <michael.d.kinney@intel.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
"lersek@redhat.com" <lersek@redhat.com>,
"jlotwo@gmail.com" <jlotwo@gmail.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>,
Ard Biesheuvel <ardb+tianocore@kernel.org>,
Sami Mujawar <sami.mujawar@arm.com>,
"Wang, Jian J" <jian.j.wang@intel.com>,
"Gao, Liming" <gaoliming@byosoft.com.cn>,
"Wu, Hao A" <hao.a.wu@intel.com>, "Ni, Ray" <ray.ni@intel.com>,
Pedro Falcato <pedro.falcato@gmail.com>,
Michael Brown <mcb30@ipxe.org>,
"Kinney, Michael D" <michael.d.kinney@intel.com>
Subject: Re: [edk2-devel] [PATCH] MdeModulePkg/PciHostBridgeDxe: Add readback after final Cfg-Write
Date: Fri, 3 Nov 2023 16:03:00 +0000 [thread overview]
Message-ID: <CO1PR11MB4929B59E63624A481B622859D2A5A@CO1PR11MB4929.namprd11.prod.outlook.com> (raw)
In-Reply-To: <fb15b6ee-c224-298b-29d3-543e6998bce9@redhat.com>
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Laszlo
> Ersek
> Sent: Friday, November 3, 2023 12:19 AM
> To: devel@edk2.groups.io; jlotwo@gmail.com
> Cc: Leif Lindholm <quic_llindhol@quicinc.com>; Ard Biesheuvel
> <ardb+tianocore@kernel.org>; Sami Mujawar <sami.mujawar@arm.com>;
> Wang, Jian J <jian.j.wang@intel.com>; Gao, Liming
> <gaoliming@byosoft.com.cn>; Wu, Hao A <hao.a.wu@intel.com>; Ni, Ray
> <ray.ni@intel.com>; Pedro Falcato <pedro.falcato@gmail.com>; Michael
> Brown <mcb30@ipxe.org>
> Subject: Re: [edk2-devel] [PATCH] MdeModulePkg/PciHostBridgeDxe: Add
> readback after final Cfg-Write
>
> On 11/3/23 01:03, Joe L wrote:
> > From: joelopez333 <jlotwo@gmail.com>
> >
> > REF:https://edk2.groups.io/g/devel/topic/102310377#110456
> >
> > - Add a read after the final PCI Configuration space write
> > in RootBridgeIoPciAccess.
> >
> > - When configuration space is strongly ordered, this ensures
> > that program execution cannot continue until the completion
> > is received for the previous Cfg-Write, which may have side-
> effects.
> >
> > Cc: Leif Lindholm <quic_llindhol@quicinc.com>
> > Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> > Cc: Sami Mujawar <sami.mujawar@arm.com>
> > Cc: Jian J Wang <jian.j.wang@intel.com>
> > Cc: Liming Gao <gaoliming@byosoft.com.cn>
> > Cc: Hao A Wu <hao.a.wu@intel.com>
> > Cc: Ray Ni <ray.ni@intel.com>
> > Cc: Pedro Falcato <pedro.falcato@gmail.com>
> > Cc: Michael Brown <mcb30@ipxe.org>
> > Signed-off-by: Joe Lopez <jlotwo@gmail.com>
> > ---
> > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
> b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
> > index 157a0ada80..4bc774b574 100644
> > --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
> > +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
> > @@ -1238,6 +1238,13 @@ RootBridgeIoPciAccess (
> > }
> > }
> >
> > + //
> > + // Perform readback after write to confirm completion was
> received for the last write
> > + //
> > + if (!Read) {
> > + PciSegmentRead8 (Address - InStride);
> > + }
> > +
> > return EFI_SUCCESS;
> > }
> >
PCI Configuration read/write operations are non-posted, so the PCI
Configuration write operation should complete without the need for
an additional transaction. If you are seeing an issue, then it may
be in the implementation of the PciLib/PciSegmentLib that is not
guaranteeing this non-posted behavior.
Please investigate further and provide details if you think there is
an issue in the Pci*Lib implementations.
>
> (1) I'd like (a) the problem report, and the full reasoning by Ard and
> Michael to be captured in the commit message, and (b) *minimally* a
> hint
> at the possible reordering, and at the PCI spec-based workaround, to
> be
> placed in the code comment as well.
>
> (2) This is a significant change; please file a new tianocore BZ about
> it. If we include it in the upcoming stable release, the BZ should be
> listed here, too:
>
> https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Release-
> Planning#proposed-features--bug-fixes
>
> (3) I seem to understand that the outcome of the discusson thus far is
> that reading back any config space register should be without side
> effects. (In turn, this should be documented in the comment and the
> commit message! But, my more important point here is:)
>
> ... assuming Size is not 1, PciSegmentRead8() will not match the size
> of
> the most recently performed PciSegmentWriteBuffer(). Is that OK?
>
> I'm unsure that *any* config space register (especially one in
> extended
> config space) that is larger than one byte per spec (base PCI spec or
> particular device spec) *guarantees* that a 1-byte read at the front
> of
> that register will behave identically to reading back the entire
> register.
>
> ... What's more, I believe that in the previous discussion, it wasn't
> the outcome that any config space register at all can be read back
> without side-effects. RootBridgeIoPciAccess() may well read
> device-specific registers too, and those can have side-effects upon
> read, can't they?
>
> Laszlo
>
>
>
>
>
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next prev parent reply other threads:[~2023-11-03 16:03 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-03 0:03 [edk2-devel] [PATCH] MdeModulePkg/PciHostBridgeDxe: Add readback after final Cfg-Write Joe L
2023-11-03 7:19 ` Laszlo Ersek
2023-11-03 16:03 ` Michael D Kinney [this message]
2023-11-03 16:57 ` Michael Brown
2023-11-06 6:55 ` Joe L
2023-11-08 19:30 ` Laszlo Ersek
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