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From: "Michael D Kinney" <michael.d.kinney@intel.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
	"Ni, Ray" <ray.ni@intel.com>,
	"Zhou, Jianfeng" <jianfeng.zhou@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>,
	"Kumar, Rahul R" <rahul.r.kumar@intel.com>,
	Gerd Hoffmann <kraxel@redhat.com>,
	"Kinney, Michael D" <michael.d.kinney@intel.com>
Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg: code refine
Date: Mon, 19 Feb 2024 03:18:44 +0000	[thread overview]
Message-ID: <CO1PR11MB4929C61D5D42148146C94FF7D2512@CO1PR11MB4929.namprd11.prod.outlook.com> (raw)
In-Reply-To: <MN6PR11MB824497D4CF627DC46A0B38D08C512@MN6PR11MB8244.namprd11.prod.outlook.com>

volatile means do not optimize into a register.  The compiler must perform the
actual memory access every time.

Mike

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Ni, Ray
> Sent: Sunday, February 18, 2024 7:06 PM
> To: Zhou, Jianfeng <jianfeng.zhou@intel.com>; devel@edk2.groups.io
> Cc: Laszlo Ersek <lersek@redhat.com>; Kumar, Rahul R
> <rahul.r.kumar@intel.com>; Gerd Hoffmann <kraxel@redhat.com>
> Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg: code refine
> 
> 
> > -    PleB->Uint64 = LocalPleB.Uint64;
> >
> > +    *(volatile UINT64 *)&(PleB->Uint64) = LocalPleB.Uint64;
> 
> Jianfeng,
> If "volatile" is to tell compiler to generate single "mov" instruction
> for
> the assignment.
> 
> I am curious how it works in 32bit env where the general purpose
> registers are
> 32bit width?
> 
> Thanks,
> Ray
> 
> 
> 
> 



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      reply	other threads:[~2024-02-19  3:18 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-08  2:19 [edk2-devel] [PATCH] UefiCpuPkg: code refine Zhou Jianfeng
2024-02-09  9:56 ` Laszlo Ersek
2024-02-19  3:05 ` Ni, Ray
2024-02-19  3:18   ` Michael D Kinney [this message]

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