* [edk2-devel] [PATCH] UefiCpuPkg: code refine
@ 2024-02-08 2:19 Zhou Jianfeng
2024-02-09 9:56 ` Laszlo Ersek
2024-02-19 3:05 ` Ni, Ray
0 siblings, 2 replies; 4+ messages in thread
From: Zhou Jianfeng @ 2024-02-08 2:19 UTC (permalink / raw)
To: devel; +Cc: Zhou Jianfeng, Ray Ni, Laszlo Ersek, Rahul Kumar, Gerd Hoffmann
Changes:
1) add volatile to 64bit variable to avoid being tore by compiler.
2) add OUT for parameter that might be changed.
Signed-off-by: Zhou Jianfeng <jianfeng.zhou@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
---
.../Library/CpuPageTableLib/CpuPageTableMap.c | 38 +++++++++----------
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
index ae4caf8dfe..d96ea5984c 100644
--- a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
+++ b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
@@ -20,10 +20,10 @@
**/
VOID
PageTableLibSetPte4K (
- IN IA32_PTE_4K *Pte4K,
- IN UINT64 Offset,
- IN IA32_MAP_ATTRIBUTE *Attribute,
- IN IA32_MAP_ATTRIBUTE *Mask
+ IN OUT IA32_PTE_4K *Pte4K,
+ IN UINT64 Offset,
+ IN IA32_MAP_ATTRIBUTE *Attribute,
+ IN IA32_MAP_ATTRIBUTE *Mask
)
{
IA32_PTE_4K LocalPte4K;
@@ -78,7 +78,7 @@ PageTableLibSetPte4K (
}
if (Pte4K->Uint64 != LocalPte4K.Uint64) {
- Pte4K->Uint64 = LocalPte4K.Uint64;
+ *(volatile UINT64 *)&(Pte4K->Uint64) = LocalPte4K.Uint64;
}
}
@@ -94,10 +94,10 @@ PageTableLibSetPte4K (
**/
VOID
PageTableLibSetPleB (
- IN IA32_PAGE_LEAF_ENTRY_BIG_PAGESIZE *PleB,
- IN UINT64 Offset,
- IN IA32_MAP_ATTRIBUTE *Attribute,
- IN IA32_MAP_ATTRIBUTE *Mask
+ IN OUT IA32_PAGE_LEAF_ENTRY_BIG_PAGESIZE *PleB,
+ IN UINT64 Offset,
+ IN IA32_MAP_ATTRIBUTE *Attribute,
+ IN IA32_MAP_ATTRIBUTE *Mask
)
{
IA32_PAGE_LEAF_ENTRY_BIG_PAGESIZE LocalPleB;
@@ -154,7 +154,7 @@ PageTableLibSetPleB (
}
if (PleB->Uint64 != LocalPleB.Uint64) {
- PleB->Uint64 = LocalPleB.Uint64;
+ *(volatile UINT64 *)&(PleB->Uint64) = LocalPleB.Uint64;
}
}
@@ -171,11 +171,11 @@ PageTableLibSetPleB (
**/
VOID
PageTableLibSetPle (
- IN UINTN Level,
- IN IA32_PAGING_ENTRY *Ple,
- IN UINT64 Offset,
- IN IA32_MAP_ATTRIBUTE *Attribute,
- IN IA32_MAP_ATTRIBUTE *Mask
+ IN UINTN Level,
+ IN OUT IA32_PAGING_ENTRY *Ple,
+ IN UINT64 Offset,
+ IN IA32_MAP_ATTRIBUTE *Attribute,
+ IN IA32_MAP_ATTRIBUTE *Mask
)
{
if (Level == 1) {
@@ -195,9 +195,9 @@ PageTableLibSetPle (
**/
VOID
PageTableLibSetPnle (
- IN IA32_PAGE_NON_LEAF_ENTRY *Pnle,
- IN IA32_MAP_ATTRIBUTE *Attribute,
- IN IA32_MAP_ATTRIBUTE *Mask
+ IN OUT IA32_PAGE_NON_LEAF_ENTRY *Pnle,
+ IN IA32_MAP_ATTRIBUTE *Attribute,
+ IN IA32_MAP_ATTRIBUTE *Mask
)
{
IA32_PAGE_NON_LEAF_ENTRY LocalPnle;
@@ -231,7 +231,7 @@ PageTableLibSetPnle (
LocalPnle.Bits.WriteThrough = 0;
LocalPnle.Bits.CacheDisabled = 0;
if (Pnle->Uint64 != LocalPnle.Uint64) {
- Pnle->Uint64 = LocalPnle.Uint64;
+ *(volatile UINT64 *)&(Pnle->Uint64) = LocalPnle.Uint64;
}
}
--
2.31.1.windows.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [edk2-devel] [PATCH] UefiCpuPkg: code refine
2024-02-08 2:19 [edk2-devel] [PATCH] UefiCpuPkg: code refine Zhou Jianfeng
@ 2024-02-09 9:56 ` Laszlo Ersek
2024-02-19 3:05 ` Ni, Ray
1 sibling, 0 replies; 4+ messages in thread
From: Laszlo Ersek @ 2024-02-09 9:56 UTC (permalink / raw)
To: Zhou Jianfeng, devel; +Cc: Ray Ni, Rahul Kumar, Gerd Hoffmann
On 2/8/24 03:19, Zhou Jianfeng wrote:
> Changes:
> 1) add volatile to 64bit variable to avoid being tore by compiler.
> 2) add OUT for parameter that might be changed.
>
> Signed-off-by: Zhou Jianfeng <jianfeng.zhou@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Rahul Kumar <rahul1.kumar@intel.com>
> Cc: Gerd Hoffmann <kraxel@redhat.com>
> ---
> .../Library/CpuPageTableLib/CpuPageTableMap.c | 38 +++++++++----------
> 1 file changed, 19 insertions(+), 19 deletions(-)
Sorry, just a superficial review for now.
- the two changes should be split to separate patches.
- the subject line is totally useless. please state (summarize) what
happens in the patch in the subject.
Laszlo
>
> diff --git a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
> index ae4caf8dfe..d96ea5984c 100644
> --- a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
> +++ b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
> @@ -20,10 +20,10 @@
> **/
> VOID
> PageTableLibSetPte4K (
> - IN IA32_PTE_4K *Pte4K,
> - IN UINT64 Offset,
> - IN IA32_MAP_ATTRIBUTE *Attribute,
> - IN IA32_MAP_ATTRIBUTE *Mask
> + IN OUT IA32_PTE_4K *Pte4K,
> + IN UINT64 Offset,
> + IN IA32_MAP_ATTRIBUTE *Attribute,
> + IN IA32_MAP_ATTRIBUTE *Mask
> )
> {
> IA32_PTE_4K LocalPte4K;
> @@ -78,7 +78,7 @@ PageTableLibSetPte4K (
> }
>
> if (Pte4K->Uint64 != LocalPte4K.Uint64) {
> - Pte4K->Uint64 = LocalPte4K.Uint64;
> + *(volatile UINT64 *)&(Pte4K->Uint64) = LocalPte4K.Uint64;
> }
> }
>
> @@ -94,10 +94,10 @@ PageTableLibSetPte4K (
> **/
> VOID
> PageTableLibSetPleB (
> - IN IA32_PAGE_LEAF_ENTRY_BIG_PAGESIZE *PleB,
> - IN UINT64 Offset,
> - IN IA32_MAP_ATTRIBUTE *Attribute,
> - IN IA32_MAP_ATTRIBUTE *Mask
> + IN OUT IA32_PAGE_LEAF_ENTRY_BIG_PAGESIZE *PleB,
> + IN UINT64 Offset,
> + IN IA32_MAP_ATTRIBUTE *Attribute,
> + IN IA32_MAP_ATTRIBUTE *Mask
> )
> {
> IA32_PAGE_LEAF_ENTRY_BIG_PAGESIZE LocalPleB;
> @@ -154,7 +154,7 @@ PageTableLibSetPleB (
> }
>
> if (PleB->Uint64 != LocalPleB.Uint64) {
> - PleB->Uint64 = LocalPleB.Uint64;
> + *(volatile UINT64 *)&(PleB->Uint64) = LocalPleB.Uint64;
> }
> }
>
> @@ -171,11 +171,11 @@ PageTableLibSetPleB (
> **/
> VOID
> PageTableLibSetPle (
> - IN UINTN Level,
> - IN IA32_PAGING_ENTRY *Ple,
> - IN UINT64 Offset,
> - IN IA32_MAP_ATTRIBUTE *Attribute,
> - IN IA32_MAP_ATTRIBUTE *Mask
> + IN UINTN Level,
> + IN OUT IA32_PAGING_ENTRY *Ple,
> + IN UINT64 Offset,
> + IN IA32_MAP_ATTRIBUTE *Attribute,
> + IN IA32_MAP_ATTRIBUTE *Mask
> )
> {
> if (Level == 1) {
> @@ -195,9 +195,9 @@ PageTableLibSetPle (
> **/
> VOID
> PageTableLibSetPnle (
> - IN IA32_PAGE_NON_LEAF_ENTRY *Pnle,
> - IN IA32_MAP_ATTRIBUTE *Attribute,
> - IN IA32_MAP_ATTRIBUTE *Mask
> + IN OUT IA32_PAGE_NON_LEAF_ENTRY *Pnle,
> + IN IA32_MAP_ATTRIBUTE *Attribute,
> + IN IA32_MAP_ATTRIBUTE *Mask
> )
> {
> IA32_PAGE_NON_LEAF_ENTRY LocalPnle;
> @@ -231,7 +231,7 @@ PageTableLibSetPnle (
> LocalPnle.Bits.WriteThrough = 0;
> LocalPnle.Bits.CacheDisabled = 0;
> if (Pnle->Uint64 != LocalPnle.Uint64) {
> - Pnle->Uint64 = LocalPnle.Uint64;
> + *(volatile UINT64 *)&(Pnle->Uint64) = LocalPnle.Uint64;
> }
> }
>
> --
> 2.31.1.windows.1
>
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^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [edk2-devel] [PATCH] UefiCpuPkg: code refine
2024-02-08 2:19 [edk2-devel] [PATCH] UefiCpuPkg: code refine Zhou Jianfeng
2024-02-09 9:56 ` Laszlo Ersek
@ 2024-02-19 3:05 ` Ni, Ray
2024-02-19 3:18 ` Michael D Kinney
1 sibling, 1 reply; 4+ messages in thread
From: Ni, Ray @ 2024-02-19 3:05 UTC (permalink / raw)
To: Zhou, Jianfeng, devel@edk2.groups.io
Cc: Laszlo Ersek, Kumar, Rahul R, Gerd Hoffmann
> - PleB->Uint64 = LocalPleB.Uint64;
>
> + *(volatile UINT64 *)&(PleB->Uint64) = LocalPleB.Uint64;
Jianfeng,
If "volatile" is to tell compiler to generate single "mov" instruction for
the assignment.
I am curious how it works in 32bit env where the general purpose registers are
32bit width?
Thanks,
Ray
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* Re: [edk2-devel] [PATCH] UefiCpuPkg: code refine
2024-02-19 3:05 ` Ni, Ray
@ 2024-02-19 3:18 ` Michael D Kinney
0 siblings, 0 replies; 4+ messages in thread
From: Michael D Kinney @ 2024-02-19 3:18 UTC (permalink / raw)
To: devel@edk2.groups.io, Ni, Ray, Zhou, Jianfeng
Cc: Laszlo Ersek, Kumar, Rahul R, Gerd Hoffmann, Kinney, Michael D
volatile means do not optimize into a register. The compiler must perform the
actual memory access every time.
Mike
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Ni, Ray
> Sent: Sunday, February 18, 2024 7:06 PM
> To: Zhou, Jianfeng <jianfeng.zhou@intel.com>; devel@edk2.groups.io
> Cc: Laszlo Ersek <lersek@redhat.com>; Kumar, Rahul R
> <rahul.r.kumar@intel.com>; Gerd Hoffmann <kraxel@redhat.com>
> Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg: code refine
>
>
> > - PleB->Uint64 = LocalPleB.Uint64;
> >
> > + *(volatile UINT64 *)&(PleB->Uint64) = LocalPleB.Uint64;
>
> Jianfeng,
> If "volatile" is to tell compiler to generate single "mov" instruction
> for
> the assignment.
>
> I am curious how it works in 32bit env where the general purpose
> registers are
> 32bit width?
>
> Thanks,
> Ray
>
>
>
>
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2024-02-09 9:56 ` Laszlo Ersek
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