Re: [edk2-devel] [PATCH] Fix variables may be used uninitialize

["Ni, Ray" <ray.ni@intel.com>]

Wesley,
When applying the patch in my local tree, I found your patch is using unix style of EOL.

Can you please send a V2 patch that uses the windows style of EOL?

Thanks,
Ray

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Ni, Ray
Sent: Monday, July 19, 2021 11:15 AM
To: Hsu, WesleyX <wesleyx.hsu@intel.com>; devel@edk2.groups.io
Cc: Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
Subject: Re: [edk2-devel] [PATCH] Fix variables may be used uninitialize

Reviewed-by: Ray Ni <ray.ni@intel.com>

-----Original Message-----
From: Hsu, WesleyX <wesleyx.hsu@intel.com> 
Sent: Friday, July 16, 2021 2:38 PM
To: devel@edk2.groups.io
Cc: Hsu, WesleyX <wesleyx.hsu@intel.com>; Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
Subject: [PATCH] Fix variables may be used uninitialize

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3491

Initialize variables may be used uninitialized after adding "-ffat-lto-objects" option in GCC5 tool chain.

Change-Id: Iec8c9a884bac5cf1ce7258867c074c4668e5fa44
Signed-off-by: WesleyX Hsu <wesleyx.hsu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
---
 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c | 5 +++++
 Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c     | 7 ++++++-
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c
index 341e2beb..2a5fa637 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/Translat
+++ ionTable.c
@@ -107,6 +107,11 @@ CreateSecondLevelPagingEntryTable (
   UINT64                                EndAddress;
   BOOLEAN                               Is5LevelPaging;
 
+  Lvl4PagesStart     = 0;
+  Lvl4PagesEnd       = 0;
+  Lvl4PtEntry        = NULL;
+  Lvl5PtEntry        = NULL;
+
   if (MemoryLimit == 0) {
     return EFI_SUCCESS;
   }
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
index d152039f..01375139 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationT
+++ able.c
@@ -133,7 +133,7 @@ CreateContextEntry (
       mVtdUnitInformation[VtdIndex].Is5LevelPaging = TRUE;
       if ((mAcpiDmarTable->HostAddressWidth <= 48) &&
           ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) != 0)) {
-        mVtdUnitInformation[VtdIndex].Is5LevelPaging = FALSE;
+        mVtdUnitInformation[VtdIndex].Is5LevelPaging = FALSE;
       }
     } else if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
       DEBUG((DEBUG_ERROR, "!!!! Page-table type is not supported on VTD %d !!!!\n", VtdIndex)); @@ -195,6 +195,11 @@ CreateSecondLevelPagingEntryTable (
   UINT64                         BaseAddress;
   UINT64                         EndAddress;
 
+  Lvl4PagesStart     = 0;
+  Lvl4PagesEnd       = 0;
+  Lvl4PtEntry        = NULL;
+  Lvl5PtEntry        = NULL;
+
   if (MemoryLimit == 0) {
     return EFI_SUCCESS;
   }
--
2.26.2.windows.1