From: "Ni, Ray" <ray.ni@intel.com>
To: "Li, Daoxiang" <daoxiang.li@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Dong, Eric" <eric.dong@intel.com>,
Laszlo Ersek <lersek@redhat.com>,
"Kumar, Rahul1" <rahul1.kumar@intel.com>
Subject: Re: [PATCH v3 1/1] UefiCpuPkg/CpuCommonFeaturesLib: Update processor location info
Date: Wed, 2 Jun 2021 02:41:37 +0000 [thread overview]
Message-ID: <CO1PR11MB4930168154E37379D65688068C3D9@CO1PR11MB4930.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20210602022503.1447-1-daoxiang.li@intel.com>
When reviewing V2, I only focused on whether the C code change is good.
I am ok that this patch contains not just processor location check logic update, but also updates to comments
that are not related to the location check.
2 minor comments:
1. Change the commit message title to "UefiCpuPkg/CpuCommonFeaturesLib: correct the CPU location check"
2. Update the commit message body to mention the other changes you did to comments.
> -----Original Message-----
> From: Li, Daoxiang <daoxiang.li@intel.com>
> Sent: Wednesday, June 2, 2021 10:25 AM
> To: devel@edk2.groups.io
> Cc: Li, Daoxiang <daoxiang.li@intel.com>; Dong, Eric <eric.dong@intel.com>;
> Ni, Ray <ray.ni@intel.com>; Laszlo Ersek <lersek@redhat.com>; Kumar,
> Rahul1 <rahul1.kumar@intel.com>
> Subject: [PATCH v3 1/1] UefiCpuPkg/CpuCommonFeaturesLib: Update
> processor location info
>
> From: Daoxiang Li <daoxiang.li@intel.com>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3424
>
> Processor location information check needs to updated
> When Core 0 is disabled
>
> Signed-off-by: Daoxiang Li <daoxiang.li@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Rahul Kumar <rahul1.kumar@intel.com>
> ---
> UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c | 4 ++--
> UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c | 4 ++--
> UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c | 6 +++---
> 3 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c
> b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c
> index e6e5db75917c..6f9685733202 100644
> --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c
> +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c
> @@ -63,9 +63,9 @@ C1eInitialize (
> {
>
> //
>
> // The scope of C1EEnable bit in the MSR_NEHALEM_POWER_CTL is
> Package, only program
>
> - // MSR_FEATURE_CONFIG for thread 0 core 0 in each package.
>
> + // MSR_NEHALEM_POWER_CTL once for each package.
>
> //
>
> - if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo-
> >ProcessorInfo.Location.Core != 0)) {
>
> + if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) {
>
> return RETURN_SUCCESS;
>
> }
>
>
>
> diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
> b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
> index bb5d983d1f4b..a3a2861cee5b 100644
> --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
> +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
> @@ -152,10 +152,10 @@ McaInitialize (
>
>
> //
>
> // The scope of MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS is package
> for below processor type, only program
>
> - // MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS for thread 0 core 0 in
> each package.
>
> + // MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS once for each package.
>
> //
>
> if (IS_NEHALEM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo-
> >DisplayModel)) {
>
> - if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo-
> >ProcessorInfo.Location.Core != 0)) {
>
> + if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) {
>
> return RETURN_SUCCESS;
>
> }
>
> }
>
> diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c
> b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c
> index 8450c7ea3eaf..3c4c1bc706ba 100644
> --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c
> +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c
> @@ -130,10 +130,10 @@ PpinInitialize (
> // Support function already check the processor which support PPIN
> feature, so this function not need
>
> // to check the processor again.
>
> //
>
> - // The scope of the MSR_IVY_BRIDGE_PPIN_CTL is package level, only
> program MSR_IVY_BRIDGE_PPIN_CTL for
>
> - // thread 0 core 0 in each package.
>
> + // The scope of the MSR_IVY_BRIDGE_PPIN_CTL is package level, only
> program MSR_IVY_BRIDGE_PPIN_CTL
>
> + // once for each package.
>
> //
>
> - if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo-
> >ProcessorInfo.Location.Core != 0)) {
>
> + if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) {
>
> return RETURN_SUCCESS;
>
> }
>
>
>
> --
> 2.28.0.windows.1
next prev parent reply other threads:[~2021-06-02 2:41 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-02 2:25 [PATCH v3 1/1] UefiCpuPkg/CpuCommonFeaturesLib: Update processor location info Li, Daoxiang
2021-06-02 2:41 ` Ni, Ray [this message]
2021-06-02 2:48 ` [edk2-devel] " Li, Daoxiang
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