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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ray Ni I merged the patch with the "#ifndef .." removed. > -----Original Message----- > From: Lou, Yun > Sent: Thursday, September 16, 2021 5:27 PM > To: devel@edk2.groups.io > Cc: Lou, Yun ; Ni, Ray ; Dong, Eric = ; Laszlo Ersek > ; Kumar, Rahul1 > Subject: [PATCH v2 1/2] UefiCpuPkg: Refactor initialization of CPU featur= es during S3 resume >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3621 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3631 >=20 > Refactor initialization of CPU features during S3 resume. >=20 > In addition, the macro ACPI_CPU_DATA_STRUCTURE_UPDATE is used to fix > incompatibility issue caused by ACPI_CPU_DATA structure update. It will > be removed after all the platform code uses new ACPI_CPU_DATA structure. >=20 > Signed-off-by: Jason Lou > Cc: Ray Ni > Cc: Eric Dong > Cc: Laszlo Ersek > Cc: Rahul Kumar > --- > OvmfPkg/CpuS3DataDxe/CpuS3Data.c | 7= +- > UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c | 7= +- > UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 12= +- > UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c | 18= +-- > UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 160= +++++++++++--------- > UefiCpuPkg/Include/AcpiCpuData.h | 91= ++++++----- > 6 files changed, 167 insertions(+), 128 deletions(-) >=20 > diff --git a/OvmfPkg/CpuS3DataDxe/CpuS3Data.c b/OvmfPkg/CpuS3DataDxe/CpuS= 3Data.c > index 5ffe1f3cd7..de20d87567 100644 > --- a/OvmfPkg/CpuS3DataDxe/CpuS3Data.c > +++ b/OvmfPkg/CpuS3DataDxe/CpuS3Data.c > @@ -9,7 +9,7 @@ number of CPUs reported by the MP Services Protocol, so t= his module does not > support hot plug CPUs. This module can be copied into a CPU specific pa= ckage >=20 > and customized if these additional features are required. >=20 >=20 >=20 > -Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.
>=20 > +Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.
>=20 > Copyright (c) 2015 - 2020, Red Hat, Inc. >=20 >=20 >=20 > SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > @@ -252,10 +252,7 @@ CpuS3DataInitialize ( > AcpiCpuDataEx->IdtrProfile.Base =3D (UINTN)Idt; >=20 >=20 >=20 > if (OldAcpiCpuData !=3D NULL) { >=20 > - AcpiCpuData->RegisterTable =3D OldAcpiCpuData->RegisterTab= le; >=20 > - AcpiCpuData->PreSmmInitRegisterTable =3D OldAcpiCpuData->PreSmmInitR= egisterTable; >=20 > - AcpiCpuData->ApLocation =3D OldAcpiCpuData->ApLocation; >=20 > - CopyMem (&AcpiCpuData->CpuStatus, &OldAcpiCpuData->CpuStatus, sizeof= (CPU_STATUS_INFORMATION)); >=20 > + CopyMem (&AcpiCpuData->CpuFeatureInitData, &OldAcpiCpuData->CpuFeatu= reInitData, sizeof > (CPU_FEATURE_INIT_DATA)); >=20 > } >=20 >=20 >=20 > // >=20 > diff --git a/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c b/UefiCpuPkg/CpuS3DataDx= e/CpuS3Data.c > index 078af36cfb..61ec7c44b2 100644 > --- a/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c > +++ b/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c > @@ -9,7 +9,7 @@ number of CPUs reported by the MP Services Protocol, so t= his module does not > support hot plug CPUs. This module can be copied into a CPU specific pa= ckage >=20 > and customized if these additional features are required. >=20 >=20 >=20 > -Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.
>=20 > +Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.
>=20 > Copyright (c) 2015, Red Hat, Inc. >=20 >=20 >=20 > SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > @@ -247,10 +247,7 @@ CpuS3DataInitialize ( > AcpiCpuDataEx->IdtrProfile.Base =3D (UINTN)Idt; >=20 >=20 >=20 > if (OldAcpiCpuData !=3D NULL) { >=20 > - AcpiCpuData->RegisterTable =3D OldAcpiCpuData->RegisterTab= le; >=20 > - AcpiCpuData->PreSmmInitRegisterTable =3D OldAcpiCpuData->PreSmmInitR= egisterTable; >=20 > - AcpiCpuData->ApLocation =3D OldAcpiCpuData->ApLocation; >=20 > - CopyMem (&AcpiCpuData->CpuStatus, &OldAcpiCpuData->CpuStatus, sizeof= (CPU_STATUS_INFORMATION)); >=20 > + CopyMem (&AcpiCpuData->CpuFeatureInitData, &OldAcpiCpuData->CpuFeatu= reInitData, sizeof > (CPU_FEATURE_INIT_DATA)); >=20 > } >=20 >=20 >=20 > // >=20 > diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitial= ize.c > b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c > index 57511c4efa..6e2ab79518 100644 > --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c > +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c > @@ -1,7 +1,7 @@ > /** @file >=20 > CPU Features Initialize functions. >=20 >=20 >=20 > - Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.
>=20 > + Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.
>=20 > SPDX-License-Identifier: BSD-2-Clause-Patent >=20 >=20 >=20 > **/ >=20 > @@ -152,10 +152,10 @@ CpuInitDataInitialize ( > ASSERT (AcpiCpuData !=3D NULL); >=20 > CpuFeaturesData->AcpiCpuData=3D AcpiCpuData; >=20 >=20 >=20 > - CpuStatus =3D &AcpiCpuData->CpuStatus; >=20 > + CpuStatus =3D &AcpiCpuData->CpuFeatureInitData.CpuStatus; >=20 > Location =3D AllocateZeroPool (sizeof (EFI_CPU_PHYSICAL_LOCATION) * Nu= mberOfCpus); >=20 > ASSERT (Location !=3D NULL); >=20 > - AcpiCpuData->ApLocation =3D (EFI_PHYSICAL_ADDRESS)(UINTN)Location; >=20 > + AcpiCpuData->CpuFeatureInitData.ApLocation =3D (EFI_PHYSICAL_ADDRESS)(= UINTN)Location; >=20 >=20 >=20 > for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorN= umber++) { >=20 > InitOrder =3D &CpuFeaturesData->InitOrder[ProcessorNumber]; >=20 > @@ -1131,7 +1131,7 @@ SetProcessorRegister ( > CpuFeaturesData =3D (CPU_FEATURES_DATA *) Buffer; >=20 > AcpiCpuData =3D CpuFeaturesData->AcpiCpuData; >=20 >=20 >=20 > - RegisterTables =3D (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->RegisterT= able; >=20 > + RegisterTables =3D (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->CpuFeatur= eInitData.RegisterTable; >=20 >=20 >=20 > InitApicId =3D GetInitialApicId (); >=20 > RegisterTable =3D NULL; >=20 > @@ -1147,8 +1147,8 @@ SetProcessorRegister ( >=20 >=20 > ProgramProcessorRegister ( >=20 > RegisterTable, >=20 > - (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)AcpiCpuData->ApLocation + ProcIn= dex, >=20 > - &AcpiCpuData->CpuStatus, >=20 > + (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)AcpiCpuData->CpuFeatureInitData.= ApLocation + ProcIndex, >=20 > + &AcpiCpuData->CpuFeatureInitData.CpuStatus, >=20 > &CpuFeaturesData->CpuFlags >=20 > ); >=20 > } >=20 > diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeature= sLib.c > b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c > index 60daa5cc87..e6ef9c602d 100644 > --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c > +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c > @@ -952,8 +952,8 @@ GetAcpiCpuData ( > AcpiCpuData->NumberOfCpus =3D (UINT32)NumberOfCpus; >=20 > } >=20 >=20 >=20 > - if (AcpiCpuData->RegisterTable =3D=3D 0 || >=20 > - AcpiCpuData->PreSmmInitRegisterTable =3D=3D 0) { >=20 > + if (AcpiCpuData->CpuFeatureInitData.RegisterTable =3D=3D 0 || >=20 > + AcpiCpuData->CpuFeatureInitData.PreSmmInitRegisterTable =3D=3D 0) = { >=20 > // >=20 > // Allocate buffer for empty RegisterTable and PreSmmInitRegisterTab= le for all CPUs >=20 > // >=20 > @@ -976,11 +976,11 @@ GetAcpiCpuData ( > RegisterTable[NumberOfCpus + Index].AllocatedSize =3D 0; >=20 > RegisterTable[NumberOfCpus + Index].RegisterTableEntry =3D 0; >=20 > } >=20 > - if (AcpiCpuData->RegisterTable =3D=3D 0) { >=20 > - AcpiCpuData->RegisterTable =3D (EFI_PHYSICAL_ADDRESS)(UINTN)Regist= erTable; >=20 > + if (AcpiCpuData->CpuFeatureInitData.RegisterTable =3D=3D 0) { >=20 > + AcpiCpuData->CpuFeatureInitData.RegisterTable =3D (EFI_PHYSICAL_AD= DRESS)(UINTN)RegisterTable; >=20 > } >=20 > - if (AcpiCpuData->PreSmmInitRegisterTable =3D=3D 0) { >=20 > - AcpiCpuData->PreSmmInitRegisterTable =3D (EFI_PHYSICAL_ADDRESS)(UI= NTN)(RegisterTable + NumberOfCpus); >=20 > + if (AcpiCpuData->CpuFeatureInitData.PreSmmInitRegisterTable =3D=3D 0= ) { >=20 > + AcpiCpuData->CpuFeatureInitData.PreSmmInitRegisterTable =3D (EFI_P= HYSICAL_ADDRESS)(UINTN)(RegisterTable + > NumberOfCpus); >=20 > } >=20 > } >=20 >=20 >=20 > @@ -1063,9 +1063,9 @@ CpuRegisterTableWriteWorker ( > CpuFeaturesData =3D GetCpuFeaturesData (); >=20 > if (CpuFeaturesData->RegisterTable =3D=3D NULL) { >=20 > AcpiCpuData =3D GetAcpiCpuData (); >=20 > - ASSERT ((AcpiCpuData !=3D NULL) && (AcpiCpuData->RegisterTable !=3D = 0)); >=20 > - CpuFeaturesData->RegisterTable =3D (CPU_REGISTER_TABLE *) (UINTN) Ac= piCpuData->RegisterTable; >=20 > - CpuFeaturesData->PreSmmRegisterTable =3D (CPU_REGISTER_TABLE *) (UIN= TN) AcpiCpuData->PreSmmInitRegisterTable; >=20 > + ASSERT ((AcpiCpuData !=3D NULL) && (AcpiCpuData->CpuFeatureInitData.= RegisterTable !=3D 0)); >=20 > + CpuFeaturesData->RegisterTable =3D (CPU_REGISTER_TABLE *) (UINTN) Ac= piCpuData->CpuFeatureInitData.RegisterTable; >=20 > + CpuFeaturesData->PreSmmRegisterTable =3D (CPU_REGISTER_TABLE *) (UIN= TN) AcpiCpuData- > >CpuFeatureInitData.PreSmmInitRegisterTable; >=20 > } >=20 >=20 >=20 > if (PreSmmFlag) { >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSm= m/CpuS3.c > index ab7f39aa2b..2873cba083 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c > @@ -476,16 +476,19 @@ SetRegister ( > IN BOOLEAN PreSmmRegisterTable >=20 > ) >=20 > { >=20 > + CPU_FEATURE_INIT_DATA *FeatureInitData; >=20 > CPU_REGISTER_TABLE *RegisterTable; >=20 > CPU_REGISTER_TABLE *RegisterTables; >=20 > UINT32 InitApicId; >=20 > UINTN ProcIndex; >=20 > UINTN Index; >=20 >=20 >=20 > + FeatureInitData =3D &mAcpiCpuData.CpuFeatureInitData; >=20 > + >=20 > if (PreSmmRegisterTable) { >=20 > - RegisterTables =3D (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.PreSmmI= nitRegisterTable; >=20 > + RegisterTables =3D (CPU_REGISTER_TABLE *)(UINTN)FeatureInitData->Pre= SmmInitRegisterTable; >=20 > } else { >=20 > - RegisterTables =3D (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.Registe= rTable; >=20 > + RegisterTables =3D (CPU_REGISTER_TABLE *)(UINTN)FeatureInitData->Reg= isterTable; >=20 > } >=20 > if (RegisterTables =3D=3D NULL) { >=20 > return; >=20 > @@ -503,18 +506,18 @@ SetRegister ( > } >=20 > ASSERT (RegisterTable !=3D NULL); >=20 >=20 >=20 > - if (mAcpiCpuData.ApLocation !=3D 0) { >=20 > + if (FeatureInitData->ApLocation !=3D 0) { >=20 > ProgramProcessorRegister ( >=20 > RegisterTable, >=20 > - (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)mAcpiCpuData.ApLocation + Proc= Index, >=20 > - &mAcpiCpuData.CpuStatus, >=20 > + (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)FeatureInitData->ApLocation + = ProcIndex, >=20 > + &FeatureInitData->CpuStatus, >=20 > &mCpuFlags >=20 > ); >=20 > } else { >=20 > ProgramProcessorRegister ( >=20 > RegisterTable, >=20 > NULL, >=20 > - &mAcpiCpuData.CpuStatus, >=20 > + &FeatureInitData->CpuStatus, >=20 > &mCpuFlags >=20 > ); >=20 > } >=20 > @@ -1010,6 +1013,71 @@ IsRegisterTableEmpty ( > return TRUE; >=20 > } >=20 >=20 >=20 > +/** >=20 > + Copy the data used to initialize processor register into SMRAM. >=20 > + >=20 > + @param[in,out] CpuFeatureInitDataDst Pointer to the destination CPU= _FEATURE_INIT_DATA structure. >=20 > + @param[in] CpuFeatureInitDataSrc Pointer to the source CPU_FEAT= URE_INIT_DATA structure. >=20 > + >=20 > +**/ >=20 > +VOID >=20 > +CopyCpuFeatureInitDatatoSmram ( >=20 > + IN OUT CPU_FEATURE_INIT_DATA *CpuFeatureInitDataDst, >=20 > + IN CPU_FEATURE_INIT_DATA *CpuFeatureInitDataSrc >=20 > + ) >=20 > +{ >=20 > + CPU_STATUS_INFORMATION *CpuStatus; >=20 > + >=20 > + if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInit= DataSrc->PreSmmInitRegisterTable, > mAcpiCpuData.NumberOfCpus)) { >=20 > + CpuFeatureInitDataDst->PreSmmInitRegisterTable =3D (EFI_PHYSICAL_ADD= RESS)(UINTN)AllocatePool > (mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE)); >=20 > + ASSERT (CpuFeatureInitDataDst->PreSmmInitRegisterTable !=3D 0); >=20 > + >=20 > + CopyRegisterTable ( >=20 > + (CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataDst->PreSmmInitRegi= sterTable, >=20 > + (CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataSrc->PreSmmInitRegi= sterTable, >=20 > + mAcpiCpuData.NumberOfCpus >=20 > + ); >=20 > + } >=20 > + >=20 > + if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInit= DataSrc->RegisterTable, > mAcpiCpuData.NumberOfCpus)) { >=20 > + CpuFeatureInitDataDst->RegisterTable =3D (EFI_PHYSICAL_ADDRESS)(UINT= N)AllocatePool (mAcpiCpuData.NumberOfCpus * > sizeof (CPU_REGISTER_TABLE)); >=20 > + ASSERT (CpuFeatureInitDataDst->RegisterTable !=3D 0); >=20 > + >=20 > + CopyRegisterTable ( >=20 > + (CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataDst->RegisterTable, >=20 > + (CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataSrc->RegisterTable, >=20 > + mAcpiCpuData.NumberOfCpus >=20 > + ); >=20 > + } >=20 > + >=20 > + CpuStatus =3D &CpuFeatureInitDataDst->CpuStatus; >=20 > + CopyMem (CpuStatus, &CpuFeatureInitDataSrc->CpuStatus, sizeof (CPU_STA= TUS_INFORMATION)); >=20 > + >=20 > + if (CpuFeatureInitDataSrc->CpuStatus.ThreadCountPerPackage !=3D 0) { >=20 > + CpuStatus->ThreadCountPerPackage =3D (EFI_PHYSICAL_ADDRESS)(UINTN)Al= locateCopyPool ( >=20 > + sizeof (UINT32) * CpuStatus-= >PackageCount, >=20 > + (UINT32 *)(UINTN)CpuFeatureI= nitDataSrc->CpuStatus.ThreadCountPerPackage >=20 > + ); >=20 > + ASSERT (CpuStatus->ThreadCountPerPackage !=3D 0); >=20 > + } >=20 > + >=20 > + if (CpuFeatureInitDataSrc->CpuStatus.ThreadCountPerCore !=3D 0) { >=20 > + CpuStatus->ThreadCountPerCore =3D (EFI_PHYSICAL_ADDRESS)(UINTN)Alloc= ateCopyPool ( >=20 > + sizeof (UINT8) * (CpuStatus-= >PackageCount * CpuStatus->MaxCoreCount), >=20 > + (UINT32 *)(UINTN)CpuFeatureI= nitDataSrc->CpuStatus.ThreadCountPerCore >=20 > + ); >=20 > + ASSERT (CpuStatus->ThreadCountPerCore !=3D 0); >=20 > + } >=20 > + >=20 > + if (CpuFeatureInitDataSrc->ApLocation !=3D 0) { >=20 > + CpuFeatureInitDataDst->ApLocation =3D (EFI_PHYSICAL_ADDRESS)(UINTN)A= llocateCopyPool ( >=20 > + mAcpiCpuData.NumberOfCpus * sizeof (EFI_= CPU_PHYSICAL_LOCATION), >=20 > + (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)CpuF= eatureInitDataSrc->ApLocation >=20 > + ); >=20 > + ASSERT (CpuFeatureInitDataDst->ApLocation !=3D 0); >=20 > + } >=20 > +} >=20 > + >=20 > /** >=20 > Get ACPI CPU data. >=20 >=20 >=20 > @@ -1064,39 +1132,13 @@ GetAcpiCpuData ( >=20 >=20 > CopyMem ((VOID *)(UINTN)mAcpiCpuData.IdtrProfile, (VOID *)(UINTN)AcpiC= puData->IdtrProfile, sizeof (IA32_DESCRIPTOR)); >=20 >=20 >=20 > - if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->P= reSmmInitRegisterTable, > mAcpiCpuData.NumberOfCpus)) { >=20 > - mAcpiCpuData.PreSmmInitRegisterTable =3D (EFI_PHYSICAL_ADDRESS)(UINT= N)AllocatePool (mAcpiCpuData.NumberOfCpus * > sizeof (CPU_REGISTER_TABLE)); >=20 > - ASSERT (mAcpiCpuData.PreSmmInitRegisterTable !=3D 0); >=20 > - >=20 > - CopyRegisterTable ( >=20 > - (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.PreSmmInitRegisterTable, >=20 > - (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->PreSmmInitRegisterTable, >=20 > - mAcpiCpuData.NumberOfCpus >=20 > - ); >=20 > - } else { >=20 > - mAcpiCpuData.PreSmmInitRegisterTable =3D 0; >=20 > - } >=20 > - >=20 > - if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->R= egisterTable, mAcpiCpuData.NumberOfCpus)) { >=20 > - mAcpiCpuData.RegisterTable =3D (EFI_PHYSICAL_ADDRESS)(UINTN)Allocate= Pool (mAcpiCpuData.NumberOfCpus * sizeof > (CPU_REGISTER_TABLE)); >=20 > - ASSERT (mAcpiCpuData.RegisterTable !=3D 0); >=20 > - >=20 > - CopyRegisterTable ( >=20 > - (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.RegisterTable, >=20 > - (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->RegisterTable, >=20 > - mAcpiCpuData.NumberOfCpus >=20 > - ); >=20 > - } else { >=20 > - mAcpiCpuData.RegisterTable =3D 0; >=20 > - } >=20 > - >=20 > // >=20 > // Copy AP's GDT, IDT and Machine Check handler into SMRAM. >=20 > // >=20 > Gdtr =3D (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.GdtrProfile; >=20 > Idtr =3D (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.IdtrProfile; >=20 >=20 >=20 > - GdtForAp =3D AllocatePool ((Gdtr->Limit + 1) + (Idtr->Limit + 1) + mA= cpiCpuData.ApMachineCheckHandlerSize); >=20 > + GdtForAp =3D AllocatePool ((Gdtr->Limit + 1) + (Idtr->Limit + 1) + mAc= piCpuData.ApMachineCheckHandlerSize); >=20 > ASSERT (GdtForAp !=3D NULL); >=20 > IdtForAp =3D (VOID *) ((UINTN)GdtForAp + (Gdtr->Limit + 1)); >=20 > MachineCheckHandlerForAp =3D (VOID *) ((UINTN)IdtForAp + (Idtr->Limit = + 1)); >=20 > @@ -1109,41 +1151,23 @@ GetAcpiCpuData ( > Idtr->Base =3D (UINTN)IdtForAp; >=20 > mAcpiCpuData.ApMachineCheckHandlerBase =3D (EFI_PHYSICAL_ADDRESS)(UINT= N)MachineCheckHandlerForAp; >=20 >=20 >=20 > - CpuStatus =3D &mAcpiCpuData.CpuStatus; >=20 > - CopyMem (CpuStatus, &AcpiCpuData->CpuStatus, sizeof (CPU_STATUS_INFORM= ATION)); >=20 > - if (AcpiCpuData->CpuStatus.ThreadCountPerPackage !=3D 0) { >=20 > - CpuStatus->ThreadCountPerPackage =3D (EFI_PHYSICAL_ADDRESS)(UINTN)Al= locateCopyPool ( >=20 > - sizeof (UINT32) * CpuStatus-= >PackageCount, >=20 > - (UINT32 *)(UINTN)AcpiCpuData= ->CpuStatus.ThreadCountPerPackage >=20 > - ); >=20 > - ASSERT (CpuStatus->ThreadCountPerPackage !=3D 0); >=20 > - } >=20 > - if (AcpiCpuData->CpuStatus.ThreadCountPerCore !=3D 0) { >=20 > - CpuStatus->ThreadCountPerCore =3D (EFI_PHYSICAL_ADDRESS)(UINTN)Alloc= ateCopyPool ( >=20 > - sizeof (UINT8) * (CpuStatus-= >PackageCount * CpuStatus->MaxCoreCount), >=20 > - (UINT32 *)(UINTN)AcpiCpuData= ->CpuStatus.ThreadCountPerCore >=20 > - ); >=20 > - ASSERT (CpuStatus->ThreadCountPerCore !=3D 0); >=20 > - } >=20 > - if (AcpiCpuData->ApLocation !=3D 0) { >=20 > - mAcpiCpuData.ApLocation =3D (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCop= yPool ( >=20 > - mAcpiCpuData.NumberOfCpus * sizeof (EFI_= CPU_PHYSICAL_LOCATION), >=20 > - (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)Acpi= CpuData->ApLocation >=20 > - ); >=20 > - ASSERT (mAcpiCpuData.ApLocation !=3D 0); >=20 > - } >=20 > - if (CpuStatus->PackageCount !=3D 0) { >=20 > - mCpuFlags.CoreSemaphoreCount =3D AllocateZeroPool ( >=20 > - sizeof (UINT32) * CpuStatus->Packag= eCount * >=20 > - CpuStatus->MaxCoreCount * CpuStatus= ->MaxThreadCount >=20 > - ); >=20 > - ASSERT (mCpuFlags.CoreSemaphoreCount !=3D NULL); >=20 > - mCpuFlags.PackageSemaphoreCount =3D AllocateZeroPool ( >=20 > - sizeof (UINT32) * CpuStatus->Pac= kageCount * >=20 > - CpuStatus->MaxCoreCount * CpuSta= tus->MaxThreadCount >=20 > - ); >=20 > - ASSERT (mCpuFlags.PackageSemaphoreCount !=3D NULL); >=20 > - } >=20 > + ZeroMem (&mAcpiCpuData.CpuFeatureInitData, sizeof (CPU_FEATURE_INIT_DA= TA)); >=20 > + CopyCpuFeatureInitDatatoSmram (&mAcpiCpuData.CpuFeatureInitData, &Acpi= CpuData->CpuFeatureInitData); >=20 > + >=20 > + CpuStatus =3D &mAcpiCpuData.CpuFeatureInitData.CpuStatus; >=20 > + >=20 > + mCpuFlags.CoreSemaphoreCount =3D AllocateZeroPool ( >=20 > + sizeof (UINT32) * CpuStatus->PackageC= ount * >=20 > + CpuStatus->MaxCoreCount * CpuStatus->= MaxThreadCount >=20 > + ); >=20 > + ASSERT (mCpuFlags.CoreSemaphoreCount !=3D NULL); >=20 > + >=20 > + mCpuFlags.PackageSemaphoreCount =3D AllocateZeroPool ( >=20 > + sizeof (UINT32) * CpuStatus->Packa= geCount * >=20 > + CpuStatus->MaxCoreCount * CpuStatu= s->MaxThreadCount >=20 > + ); >=20 > + ASSERT (mCpuFlags.PackageSemaphoreCount !=3D NULL); >=20 > + >=20 > InitializeSpinLock((SPIN_LOCK*) &mCpuFlags.MemoryMappedLock); >=20 > } >=20 >=20 >=20 > diff --git a/UefiCpuPkg/Include/AcpiCpuData.h b/UefiCpuPkg/Include/AcpiCp= uData.h > index 62a01b2c6b..2fa8801d1f 100644 > --- a/UefiCpuPkg/Include/AcpiCpuData.h > +++ b/UefiCpuPkg/Include/AcpiCpuData.h > @@ -1,7 +1,7 @@ > /** @file >=20 > Definitions for CPU S3 data. >=20 >=20 >=20 > -Copyright (c) 2013 - 2020, Intel Corporation. All rights reserved.
>=20 > +Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.
>=20 > SPDX-License-Identifier: BSD-2-Clause-Patent >=20 >=20 >=20 > **/ >=20 > @@ -9,6 +9,15 @@ SPDX-License-Identifier: BSD-2-Clause-Patent > #ifndef _ACPI_CPU_DATA_H_ >=20 > #define _ACPI_CPU_DATA_H_ >=20 >=20 >=20 > +// >=20 > +// This macro definition is used to fix incompatibility issue caused by >=20 > +// ACPI_CPU_DATA structure update. It will be removed after all the plat= form >=20 > +// code uses new ACPI_CPU_DATA structure. >=20 > +// >=20 > +#ifndef ACPI_CPU_DATA_STRUCTURE_UPDATE >=20 > +#define ACPI_CPU_DATA_STRUCTURE_UPDATE >=20 > +#endif >=20 > + >=20 > // >=20 > // Register types in register table >=20 > // >=20 > @@ -118,6 +127,49 @@ typedef struct { > EFI_PHYSICAL_ADDRESS RegisterTableEntry; >=20 > } CPU_REGISTER_TABLE; >=20 >=20 >=20 > +// >=20 > +// Data structure that is used for CPU feature initialization during ACP= I S3 >=20 > +// resume. >=20 > +// >=20 > +typedef struct { >=20 > + // >=20 > + // Physical address of an array of CPU_REGISTER_TABLE structures, with >=20 > + // NumberOfCpus entries. If a register table is not required, then th= e >=20 > + // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set = to 0. >=20 > + // If TableLength is > 0, then elements of RegisterTableEntry are used= to >=20 > + // initialize the CPU that matches InitialApicId, during an ACPI S3 re= sume, >=20 > + // before SMBASE relocation is performed. >=20 > + // If a register table is not required for any one of the CPUs, then >=20 > + // PreSmmInitRegisterTable may be set to 0. >=20 > + // >=20 > + EFI_PHYSICAL_ADDRESS PreSmmInitRegisterTable; >=20 > + // >=20 > + // Physical address of an array of CPU_REGISTER_TABLE structures, with >=20 > + // NumberOfCpus entries. If a register table is not required, then th= e >=20 > + // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set = to 0. >=20 > + // If TableLength is > 0, then elements of RegisterTableEntry are used= to >=20 > + // initialize the CPU that matches InitialApicId, during an ACPI S3 re= sume, >=20 > + // after SMBASE relocation is performed. >=20 > + // If a register table is not required for any one of the CPUs, then >=20 > + // RegisterTable may be set to 0. >=20 > + // >=20 > + EFI_PHYSICAL_ADDRESS RegisterTable; >=20 > + // >=20 > + // CPU information which is required when set the register table. >=20 > + // >=20 > + CPU_STATUS_INFORMATION CpuStatus; >=20 > + // >=20 > + // Location info for each AP. >=20 > + // It points to an array which saves all APs location info. >=20 > + // The array count is the AP count in this CPU. >=20 > + // >=20 > + // If the platform does not support MSR setting at S3 resume, and >=20 > + // therefore it doesn't need the dependency semaphores, it should set >=20 > + // this field to 0. >=20 > + // >=20 > + EFI_PHYSICAL_ADDRESS ApLocation; >=20 > +} CPU_FEATURE_INIT_DATA; >=20 > + >=20 > // >=20 > // Data structure that is required for ACPI S3 resume. The PCD >=20 > // PcdCpuS3DataAddress must be set to the physical address where this st= ructure >=20 > @@ -172,28 +224,6 @@ typedef struct { > // >=20 > EFI_PHYSICAL_ADDRESS MtrrTable; >=20 > // >=20 > - // Physical address of an array of CPU_REGISTER_TABLE structures, with >=20 > - // NumberOfCpus entries. If a register table is not required, then th= e >=20 > - // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set = to 0. >=20 > - // If TableLength is > 0, then elements of RegisterTableEntry are used= to >=20 > - // initialize the CPU that matches InitialApicId, during an ACPI S3 re= sume, >=20 > - // before SMBASE relocation is performed. >=20 > - // If a register table is not required for any one of the CPUs, then >=20 > - // PreSmmInitRegisterTable may be set to 0. >=20 > - // >=20 > - EFI_PHYSICAL_ADDRESS PreSmmInitRegisterTable; >=20 > - // >=20 > - // Physical address of an array of CPU_REGISTER_TABLE structures, with >=20 > - // NumberOfCpus entries. If a register table is not required, then th= e >=20 > - // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set = to 0. >=20 > - // If TableLength is > 0, then elements of RegisterTableEntry are used= to >=20 > - // initialize the CPU that matches InitialApicId, during an ACPI S3 re= sume, >=20 > - // after SMBASE relocation is performed. >=20 > - // If a register table is not required for any one of the CPUs, then >=20 > - // RegisterTable may be set to 0. >=20 > - // >=20 > - EFI_PHYSICAL_ADDRESS RegisterTable; >=20 > - // >=20 > // Physical address of a buffer that contains the machine check handle= r that >=20 > // is used during an ACPI S3 Resume. In order for this machine check >=20 > // handler to be active on an AP during an ACPI S3 resume, the machine= check >=20 > @@ -208,19 +238,10 @@ typedef struct { > // >=20 > UINT32 ApMachineCheckHandlerSize; >=20 > // >=20 > - // CPU information which is required when set the register table. >=20 > - // >=20 > - CPU_STATUS_INFORMATION CpuStatus; >=20 > - // >=20 > - // Location info for each AP. >=20 > - // It points to an array which saves all APs location info. >=20 > - // The array count is the AP count in this CPU. >=20 > - // >=20 > - // If the platform does not support MSR setting at S3 resume, and >=20 > - // therefore it doesn't need the dependency semaphores, it should set >=20 > - // this field to 0. >=20 > + // Data structure that is used for CPU feature initialization during A= CPI S3 >=20 > + // resume. >=20 > // >=20 > - EFI_PHYSICAL_ADDRESS ApLocation; >=20 > + CPU_FEATURE_INIT_DATA CpuFeatureInitData; >=20 > } ACPI_CPU_DATA; >=20 >=20 >=20 > #endif >=20 > -- > 2.28.0.windows.1