* Re: [PATCH v2 1/1] UefiCpuPkg/CpuCommonFeaturesLib: Update processor location info [not found] <20210601072451.1329-1-daoxiang.li@intel.com> @ 2021-06-01 8:03 ` Laszlo Ersek 2021-06-01 15:24 ` Ni, Ray 1 sibling, 0 replies; 3+ messages in thread From: Laszlo Ersek @ 2021-06-01 8:03 UTC (permalink / raw) To: Daoxiang, devel; +Cc: Eric Dong, Ray Ni, Rahul Kumar On 06/01/21 09:24, Daoxiang wrote: > From: Daoxiang Li <daoxiang.li@intel.com> > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3424 > > Processor location information check needs to updated > When Core 0 is disabled > > Signed-off-by: Daoxiang Li <daoxiang.li@intel.com> > CC: Eric Dong <eric.dong@intel.com> > CC: Ray Ni <ray.ni@intel.com> > CC: Laszlo Ersek <lersek@redhat.com> > CC: Rahul Kumar <rahul1.kumar@intel.com> > --- > UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c | 4 ++-- > UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c | 4 ++-- > UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c | 6 +++--- > 3 files changed, 7 insertions(+), 7 deletions(-) I defer this to Eric, Ray, and Rahul. Thanks Laszlo > > diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c > index e6e5db75917c..c867802f0bb0 100644 > --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c > +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c > @@ -63,9 +63,9 @@ C1eInitialize ( > { > // > // The scope of C1EEnable bit in the MSR_NEHALEM_POWER_CTL is Package, only program > - // MSR_FEATURE_CONFIG for thread 0 core 0 in each package. > + // MSR_FEATURE_CONFIG once for each package. > // > - if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo->ProcessorInfo.Location.Core != 0)) { > + if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) { > return RETURN_SUCCESS; > } > > diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c > index bb5d983d1f4b..a3a2861cee5b 100644 > --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c > +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c > @@ -152,10 +152,10 @@ McaInitialize ( > > // > // The scope of MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS is package for below processor type, only program > - // MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS for thread 0 core 0 in each package. > + // MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS once for each package. > // > if (IS_NEHALEM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) { > - if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo->ProcessorInfo.Location.Core != 0)) { > + if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) { > return RETURN_SUCCESS; > } > } > diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c > index 8450c7ea3eaf..3c4c1bc706ba 100644 > --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c > +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c > @@ -130,10 +130,10 @@ PpinInitialize ( > // Support function already check the processor which support PPIN feature, so this function not need > // to check the processor again. > // > - // The scope of the MSR_IVY_BRIDGE_PPIN_CTL is package level, only program MSR_IVY_BRIDGE_PPIN_CTL for > - // thread 0 core 0 in each package. > + // The scope of the MSR_IVY_BRIDGE_PPIN_CTL is package level, only program MSR_IVY_BRIDGE_PPIN_CTL > + // once for each package. > // > - if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo->ProcessorInfo.Location.Core != 0)) { > + if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) { > return RETURN_SUCCESS; > } > > ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2 1/1] UefiCpuPkg/CpuCommonFeaturesLib: Update processor location info [not found] <20210601072451.1329-1-daoxiang.li@intel.com> 2021-06-01 8:03 ` [PATCH v2 1/1] UefiCpuPkg/CpuCommonFeaturesLib: Update processor location info Laszlo Ersek @ 2021-06-01 15:24 ` Ni, Ray 2021-06-02 2:05 ` [edk2-devel] " Zeng, Star 1 sibling, 1 reply; 3+ messages in thread From: Ni, Ray @ 2021-06-01 15:24 UTC (permalink / raw) To: Li, Daoxiang, devel@edk2.groups.io Cc: Dong, Eric, Laszlo Ersek, Kumar, Rahul1 Reviewed-by: Ray Ni <ray.ni@intel.com> > -----Original Message----- > From: Li, Daoxiang <daoxiang.li@intel.com> > Sent: Tuesday, June 1, 2021 3:25 PM > To: devel@edk2.groups.io > Cc: Li, Daoxiang <daoxiang.li@intel.com>; Dong, Eric <eric.dong@intel.com>; Ni, Ray <ray.ni@intel.com>; Laszlo Ersek > <lersek@redhat.com>; Kumar, Rahul1 <rahul1.kumar@intel.com> > Subject: [PATCH v2 1/1] UefiCpuPkg/CpuCommonFeaturesLib: Update processor location info > > From: Daoxiang Li <daoxiang.li@intel.com> > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3424 > > Processor location information check needs to updated > When Core 0 is disabled > > Signed-off-by: Daoxiang Li <daoxiang.li@intel.com> > CC: Eric Dong <eric.dong@intel.com> > CC: Ray Ni <ray.ni@intel.com> > CC: Laszlo Ersek <lersek@redhat.com> > CC: Rahul Kumar <rahul1.kumar@intel.com> > --- > UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c | 4 ++-- > UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c | 4 ++-- > UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c | 6 +++--- > 3 files changed, 7 insertions(+), 7 deletions(-) > > diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c > index e6e5db75917c..c867802f0bb0 100644 > --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c > +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c > @@ -63,9 +63,9 @@ C1eInitialize ( > { > > // > > // The scope of C1EEnable bit in the MSR_NEHALEM_POWER_CTL is Package, only program > > - // MSR_FEATURE_CONFIG for thread 0 core 0 in each package. > > + // MSR_FEATURE_CONFIG once for each package. > > // > > - if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo->ProcessorInfo.Location.Core != 0)) { > > + if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) { > > return RETURN_SUCCESS; > > } > > > > diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c > index bb5d983d1f4b..a3a2861cee5b 100644 > --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c > +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c > @@ -152,10 +152,10 @@ McaInitialize ( > > > // > > // The scope of MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS is package for below processor type, only program > > - // MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS for thread 0 core 0 in each package. > > + // MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS once for each package. > > // > > if (IS_NEHALEM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) { > > - if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo->ProcessorInfo.Location.Core != 0)) { > > + if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) { > > return RETURN_SUCCESS; > > } > > } > > diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c > index 8450c7ea3eaf..3c4c1bc706ba 100644 > --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c > +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c > @@ -130,10 +130,10 @@ PpinInitialize ( > // Support function already check the processor which support PPIN feature, so this function not need > > // to check the processor again. > > // > > - // The scope of the MSR_IVY_BRIDGE_PPIN_CTL is package level, only program MSR_IVY_BRIDGE_PPIN_CTL for > > - // thread 0 core 0 in each package. > > + // The scope of the MSR_IVY_BRIDGE_PPIN_CTL is package level, only program MSR_IVY_BRIDGE_PPIN_CTL > > + // once for each package. > > // > > - if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo->ProcessorInfo.Location.Core != 0)) { > > + if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) { > > return RETURN_SUCCESS; > > } > > > > -- > 2.28.0.windows.1 ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [edk2-devel] [PATCH v2 1/1] UefiCpuPkg/CpuCommonFeaturesLib: Update processor location info 2021-06-01 15:24 ` Ni, Ray @ 2021-06-02 2:05 ` Zeng, Star 0 siblings, 0 replies; 3+ messages in thread From: Zeng, Star @ 2021-06-02 2:05 UTC (permalink / raw) To: devel@edk2.groups.io, Ni, Ray, Li, Daoxiang Cc: Dong, Eric, Laszlo Ersek, Kumar, Rahul1, Zeng, Star In C1e.c, the MSR_FEATURE_CONFIG is better to be corrected to MSR_NEHALEM_POWER_CTL. Thanks, Star -----Original Message----- From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Ni, Ray Sent: Tuesday, June 1, 2021 11:25 PM To: Li, Daoxiang <daoxiang.li@intel.com>; devel@edk2.groups.io Cc: Dong, Eric <eric.dong@intel.com>; Laszlo Ersek <lersek@redhat.com>; Kumar, Rahul1 <rahul1.kumar@intel.com> Subject: Re: [edk2-devel] [PATCH v2 1/1] UefiCpuPkg/CpuCommonFeaturesLib: Update processor location info Reviewed-by: Ray Ni <ray.ni@intel.com> > -----Original Message----- > From: Li, Daoxiang <daoxiang.li@intel.com> > Sent: Tuesday, June 1, 2021 3:25 PM > To: devel@edk2.groups.io > Cc: Li, Daoxiang <daoxiang.li@intel.com>; Dong, Eric > <eric.dong@intel.com>; Ni, Ray <ray.ni@intel.com>; Laszlo Ersek > <lersek@redhat.com>; Kumar, Rahul1 <rahul1.kumar@intel.com> > Subject: [PATCH v2 1/1] UefiCpuPkg/CpuCommonFeaturesLib: Update > processor location info > > From: Daoxiang Li <daoxiang.li@intel.com> > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3424 > > Processor location information check needs to updated When Core 0 is > disabled > > Signed-off-by: Daoxiang Li <daoxiang.li@intel.com> > CC: Eric Dong <eric.dong@intel.com> > CC: Ray Ni <ray.ni@intel.com> > CC: Laszlo Ersek <lersek@redhat.com> > CC: Rahul Kumar <rahul1.kumar@intel.com> > --- > UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c | 4 ++-- > UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c | 4 ++-- > UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c | 6 +++--- > 3 files changed, 7 insertions(+), 7 deletions(-) > > diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c > index e6e5db75917c..c867802f0bb0 100644 > --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c > +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c > @@ -63,9 +63,9 @@ C1eInitialize ( > { > > // > > // The scope of C1EEnable bit in the MSR_NEHALEM_POWER_CTL is > Package, only program > > - // MSR_FEATURE_CONFIG for thread 0 core 0 in each package. > > + // MSR_FEATURE_CONFIG once for each package. > > // > > - if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || > (CpuInfo->ProcessorInfo.Location.Core != 0)) { > > + if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) { > > return RETURN_SUCCESS; > > } > > > > diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c > index bb5d983d1f4b..a3a2861cee5b 100644 > --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c > +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c > @@ -152,10 +152,10 @@ McaInitialize ( > > > // > > // The scope of MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS is package for > below processor type, only program > > - // MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS for thread 0 core 0 in each package. > > + // MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS once for each package. > > // > > if (IS_NEHALEM_PROCESSOR (CpuInfo->DisplayFamily, > CpuInfo->DisplayModel)) { > > - if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo->ProcessorInfo.Location.Core != 0)) { > > + if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) { > > return RETURN_SUCCESS; > > } > > } > > diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c > index 8450c7ea3eaf..3c4c1bc706ba 100644 > --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c > +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c > @@ -130,10 +130,10 @@ PpinInitialize ( > // Support function already check the processor which support PPIN > feature, so this function not need > > // to check the processor again. > > // > > - // The scope of the MSR_IVY_BRIDGE_PPIN_CTL is package level, only > program MSR_IVY_BRIDGE_PPIN_CTL for > > - // thread 0 core 0 in each package. > > + // The scope of the MSR_IVY_BRIDGE_PPIN_CTL is package level, only > + program MSR_IVY_BRIDGE_PPIN_CTL > > + // once for each package. > > // > > - if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || > (CpuInfo->ProcessorInfo.Location.Core != 0)) { > > + if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) { > > return RETURN_SUCCESS; > > } > > > > -- > 2.28.0.windows.1 ^ permalink raw reply [flat|nested] 3+ messages in thread
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2021-06-01 8:03 ` [PATCH v2 1/1] UefiCpuPkg/CpuCommonFeaturesLib: Update processor location info Laszlo Ersek
2021-06-01 15:24 ` Ni, Ray
2021-06-02 2:05 ` [edk2-devel] " Zeng, Star
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