public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed
From: "Ni, Ray" <ray.ni@intel.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
	"Ni, Ray" <ray.ni@intel.com>
Cc: "Chaganty, Rangasai V" <rangasai.v.chaganty@intel.com>
Subject: Re: [edk2-devel] [PATCH] IntelSiliconPkg: Define PCDs for microcode location in flash
Date: Fri, 26 Mar 2021 06:49:29 +0000	[thread overview]
Message-ID: <CO1PR11MB49308FC6166509DBA99D60D38C619@CO1PR11MB4930.namprd11.prod.outlook.com> (raw)
In-Reply-To: <166FD19F7613DF94.8397@groups.io>

Please ignore the "Change-Id" in the commit message.
I will remove that when checking in.

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Ni, Ray
> Sent: Friday, March 26, 2021 2:48 PM
> To: devel@edk2.groups.io
> Cc: Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
> Subject: [edk2-devel] [PATCH] IntelSiliconPkg: Define PCDs for microcode location in flash
> 
> 3 PCDs are defined assuming that microcode is put in the end of a FV:
> PcdFlashFvMicrocodeBase: The base address of the microcode FV
> PcdFlashFvMicrocodeSize: The size of the microcode FV
> PcdFlashMicrocodeOffset: The microcode offset relative to the FV
>                          base address
> 
> The 3 new PCDs are to replace the following existing PCDs in
> MinPlatformPkg and IntelFsp2WrapperPkg.
> 
> The ones in MinPlatformPkg will be removed in a separate patch.
> The ones in IntelFsp2WrapperPkg will be re-positioned as only using
> inside IntelFsp2WrapperPkg\Library\SecFspWrapperPlatformSecLibSample.
> 
> Defining PCDs in IntelSiliconPkg is because certain close-source
> silicon code depends on these PCDs but the silicon code cannot depend
> on MinPlatformPkg.
> 
> MinPlatformPkg contains the below 3 PCDs:
> PcdFlashFvMicrocodeBase:   Same meaning as
>                            IntelSiliconPkg.PcdFlashFvMicrocodeBase
> PcdFlashFvMicrocodeSize:   Same meaning as
>                            IntelSiliconPkg.PcdFlashFvMicrocodeSize
> PcdFlashFvMicrocodeOffset: The FV offset relative to the firmware
>                            base address.
> Note: MinPlatformPkg doesn't contain the PCD that tells the microcode
> offset relative to the FV base address.
> 
> IntelFsp2WrapperPkg contains the below 3 PCDs:
> PcdCpuMicrocodePatchAddress:    Same meaning as
>                              IntelSiliconPkg.PcdFlashFvMicrocodeBase
> PcdCpuMicrocodePatchRegionSize: Same meaning as
>                              IntelSiliconPkg.PcdFlashFvMicrocodeSize
> PcdFlashMicrocodeOffset:        Same meaning as
>                              IntelSiliconPkg.PcdFlashMicrocodeOffset
> 
> Change-Id: I708abfa4a9309cbaedd5c4e4f483ec9f0d5e7625
> Reviewed-by: Ray Ni <ray.ni@intel.com>
> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
> ---
>  Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 9 ++++++++-
>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
> index 4a2cbca5..6611c3af 100644
> --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
> +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
> @@ -3,7 +3,7 @@
>  #
> 
>  # This package provides common open source Intel silicon modules.
> 
>  #
> 
> -# Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>
> 
> +# Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>
> 
>  # SPDX-License-Identifier: BSD-2-Clause-Patent
> 
>  #
> 
>  ##
> 
> @@ -90,6 +90,13 @@
>    # @Prompt Error code for VTd error.
> 
>    gIntelSiliconPkgTokenSpaceGuid.PcdErrorCodeVTdError|0x02008000|UINT32|0x00000005
> 
> 
> 
> +  gIntelSiliconPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0|UINT32|0x00000007
> 
> +  gIntelSiliconPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0|UINT32|0x00000008
> 
> +
> 
> +  ## This is the microcode offset relative to the FV base address.
> 
> +  #  Microcode address equals to PcdFlashFvMicrocodeBase + PcdFlashMicrocodeOffset.
> 
> +  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeOffset|0|UINT32|0x0000000A
> 
> +
> 
>  [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
> 
>    ## This is the GUID of the FFS which contains the Graphics Video BIOS Table (VBT)
> 
>    # The VBT content is stored as a RAW section which is consumed by GOP PEI/UEFI driver.
> 
> --
> 2.27.0.windows.1
> 
> 
> 
> -=-=-=-=-=-=
> Groups.io Links: You receive all messages sent to this group.
> View/Reply Online (#73313): https://edk2.groups.io/g/devel/message/73313
> Mute This Topic: https://groups.io/mt/81622347/1712937
> Group Owner: devel+owner@edk2.groups.io
> Unsubscribe: https://edk2.groups.io/g/devel/unsub [ray.ni@intel.com]
> -=-=-=-=-=-=
> 


       reply	other threads:[~2021-03-26  6:49 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <166FD19F7613DF94.8397@groups.io>
2021-03-26  6:49 ` Ni, Ray [this message]
2021-03-26  7:39   ` [edk2-devel] [PATCH] IntelSiliconPkg: Define PCDs for microcode location in flash Ni, Ray

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-list from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CO1PR11MB49308FC6166509DBA99D60D38C619@CO1PR11MB4930.namprd11.prod.outlook.com \
    --to=devel@edk2.groups.io \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox