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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Is it possible to let SetStaticPageTable() accept another parameter "Physic= alAddressBits" so it doesn't update the global one? Using this way, SetStaticPageTable() can avoid reference the global variabl= e completely. > -----Original Message----- > From: Kun Qin > Sent: Wednesday, April 14, 2021 10:59 AM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Ni, Ray ; Laszlo > Ersek ; Kumar, Rahul1 > Subject: [PATCH v1 1/1] UefiCpuPkg: PiSmmCpuDxeSmm: Not to Change > Bitwidth During Static Paging >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3300 >=20 > Current implementation of SetStaticPageTable routine in PiSmmCpuDxeSmm > driver will check a global variable mPhysicalAddressBits, and eventually > cap any value larger than 39 at 39. >=20 > This global variable is used in ConvertMemoryPageAttributes, which backs > SmmSetMemoryAttributes and SmmClearMemoryAttributes. Thus for a > processor > that supports more than 39 bits width, trying to mark page table regions > higher than 39-bit will always return EFI_UNSUPPROTED. >=20 > This change replaced the changed bitwidth to a stack based variable. >=20 > Cc: Eric Dong > Cc: Ray Ni > Cc: Laszlo Ersek > Cc: Rahul Kumar >=20 > Signed-off-by: Kun Qin > --- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 25 +++++++++++--------- > 1 file changed, 14 insertions(+), 11 deletions(-) >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > index 6902584b1fbd..0caee8a27abe 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > @@ -226,6 +226,7 @@ SetStaticPageTable ( > UINTN IndexOfPml4Entries; > UINTN IndexOfPdpEntries; > UINTN IndexOfPageDirectoryEntr= ies; > + UINT64 PhysicalAddressBits; > UINT64 *PageMapLevel5Entry; > UINT64 *PageMapLevel4Entry; > UINT64 *PageMap; > @@ -237,26 +238,28 @@ SetStaticPageTable ( > // IA-32e paging translates 48-bit linear addresses to 52-bit physical > addresses > // when 5-Level Paging is disabled. > // > - ASSERT (mPhysicalAddressBits <=3D 52); > - if (!m5LevelPagingNeeded && mPhysicalAddressBits > 48) { > - mPhysicalAddressBits =3D 48; > + PhysicalAddressBits =3D mPhysicalAddressBits; > + > + ASSERT (PhysicalAddressBits <=3D 52); > + if (!m5LevelPagingNeeded && PhysicalAddressBits > 48) { > + PhysicalAddressBits =3D 48; > } >=20 > NumberOfPml5EntriesNeeded =3D 1; > - if (mPhysicalAddressBits > 48) { > - NumberOfPml5EntriesNeeded =3D (UINTN) LShiftU64 (1, > mPhysicalAddressBits - 48); > - mPhysicalAddressBits =3D 48; > + if (PhysicalAddressBits > 48) { > + NumberOfPml5EntriesNeeded =3D (UINTN) LShiftU64 (1, > PhysicalAddressBits - 48); > + PhysicalAddressBits =3D 48; > } >=20 > NumberOfPml4EntriesNeeded =3D 1; > - if (mPhysicalAddressBits > 39) { > - NumberOfPml4EntriesNeeded =3D (UINTN) LShiftU64 (1, > mPhysicalAddressBits - 39); > - mPhysicalAddressBits =3D 39; > + if (PhysicalAddressBits > 39) { > + NumberOfPml4EntriesNeeded =3D (UINTN) LShiftU64 (1, > PhysicalAddressBits - 39); > + PhysicalAddressBits =3D 39; > } >=20 > NumberOfPdpEntriesNeeded =3D 1; > - ASSERT (mPhysicalAddressBits > 30); > - NumberOfPdpEntriesNeeded =3D (UINTN) LShiftU64 (1, > mPhysicalAddressBits - 30); > + ASSERT (PhysicalAddressBits > 30); > + NumberOfPdpEntriesNeeded =3D (UINTN) LShiftU64 (1, PhysicalAddressBits > - 30); >=20 > // > // By architecture only one PageMapLevel4 exists - so lets allocate st= orage > for it. > -- > 2.31.0.windows.1