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Thread-Topic: [PATCH v1] MdePkg/Cpuid.h: Define new element in CPUID Leaf(07h) data structure. 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Since Reserved2 and Reserved3 are changed, please use new name Reserved4, 5= , 6. > -----Original Message----- > From: Lou, Yun > Sent: Thursday, April 8, 2021 2:35 PM > To: devel@edk2.groups.io > Cc: Lou, Yun ; Kinney, Michael D > ; Liming Gao ; > Liu, Zhiguang ; Ni, Ray > Subject: [PATCH v1] MdePkg/Cpuid.h: Define new element in CPUID > Leaf(07h) data structure. >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3309 >=20 > Define new element(Hybird) in > CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS > (07h) data structure. >=20 > Signed-off-by: Jason Lou > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > Cc: Ray Ni > --- > MdePkg/Include/Register/Intel/Cpuid.h | 14 +++++++++++--- > 1 file changed, 11 insertions(+), 3 deletions(-) >=20 > diff --git a/MdePkg/Include/Register/Intel/Cpuid.h > b/MdePkg/Include/Register/Intel/Cpuid.h > index 19af99b6af..e7c0fd17e7 100644 > --- a/MdePkg/Include/Register/Intel/Cpuid.h > +++ b/MdePkg/Include/Register/Intel/Cpuid.h > @@ -1550,9 +1550,17 @@ typedef union { > /// >=20 > UINT32 AVX512_4FMAPS:1; >=20 > /// >=20 > - /// [Bit 25:4] Reserved. >=20 > + /// [Bit 14:4] Reserved. >=20 > /// >=20 > - UINT32 Reserved2:22; >=20 > + UINT32 Reserved2:11; >=20 > + /// >=20 > + /// [Bit 15] Hybrid. If 1, the processor is identified as a hybrid p= art. >=20 > + /// >=20 > + UINT32 Hybrid:1; >=20 > + /// >=20 > + /// [Bit 25:16] Reserved. >=20 > + /// >=20 > + UINT32 Reserved3:10; >=20 > /// >=20 > /// [Bit 26] Enumerates support for indirect branch restricted specu= lation >=20 > /// (IBRS) and the indirect branch pre-dictor barrier (IBPB). Proces= sors >=20 > @@ -1581,7 +1589,7 @@ typedef union { > /// >=20 > /// [Bit 30] Reserved. >=20 > /// >=20 > - UINT32 Reserved3:1; >=20 > + UINT32 Reserved4:1; >=20 > /// >=20 > /// [Bit 31] Enumerates support for Speculative Store Bypass Disable > (SSBD). >=20 > /// Processors that set this bit sup-port the IA32_SPEC_CTRL MSR. Th= ey > allow >=20 > -- > 2.28.0.windows.1