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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,yuanhao.xie@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: w59h6ba6iHLyRNRJrc3WTW3bx7686176AA= Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=LrXri7Bc; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; arc=reject ("signature check failed: fail, {[1] = sig:microsoft.com:reject}") Hi Gerd, Could you please review this patch series? Thanks a lot Yuanhao -----Original Message----- From: Xie, Yuanhao =20 Sent: Friday, July 28, 2023 1:18 PM To: devel@edk2.groups.io Cc: Xie, Yuanhao ; Dong, Eric ;= Kumar, Rahul R ; Gerd Hoffmann ; Ni, Ray Subject: [Patch V4 1/4] UefiCpuPkg: Add SendStartupIpiAllExcludingSelf From: Yuanhao Xie Add new API SendStartupIpiAllExcludingSelf(), and modify SendInitSipiSipiAllExcludingSelf() by let it call the new API. Cc: Eric Dong Cc: Rahul Kumar Cc: Gerd Hoffmann Cc: Ray Ni Signed-off-by: Ray Ni Signed-off-by: Yuanhao Xie Reviewed-by: Ray Ni --- UefiCpuPkg/Include/Library/LocalApicLib.h | 17 ++++++++++= ++++++- UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 43 ++++++++++= ++++++++++++++++++++------------- UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 43 ++++++++++= ++++++++++++++++++++------------- 3 files changed, 76 insertions(+), 27 deletions(-) diff --git a/UefiCpuPkg/Include/Library/LocalApicLib.h b/UefiCpuPkg/Include= /Library/LocalApicLib.h index b55d88b0f5..d7c2ad3f70 100644 --- a/UefiCpuPkg/Include/Library/LocalApicLib.h +++ b/UefiCpuPkg/Include/Library/LocalApicLib.h @@ -4,7 +4,7 @@ Local APIC library assumes local APIC is enabled. It does not handles cases where local APIC is disabled. =20 - Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2023, Intel Corporation. All rights=20 + reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -185,6 +185,21 @@ SendInitIpiAllExcludingSelf ( VOID ); =20 +/** + Send a Start-up IPI to all processors excluding self. + This function returns after the IPI has been accepted by the target proc= essors. + if StartupRoutine >=3D 1M, then ASSERT. + if StartupRoutine is not multiple of 4K, then ASSERT. + @param StartupRoutine Points to a start-up routine which is below 1M p= hysical + address and 4K aligned. +**/ + +VOID +EFIAPI +SendStartupIpiAllExcludingSelf ( + IN UINT32 StartupRoutine + ); + /** Send an INIT-Start-up-Start-up IPI sequence to a specified target proces= sor. =20 diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c b/UefiCpuPkg/Li= brary/BaseXApicLib/BaseXApicLib.c index 008b8a070b..d56c6275cc 100644 --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c +++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c @@ -3,7 +3,7 @@ =20 This local APIC library instance supports xAPIC mode only. =20 - Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2023, Intel Corporation. All rights=20 + reserved.
Copyright (c) 2017 - 2020, AMD Inc. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent @@ -497,6 +497,33 @@ SendIn= itIpiAllExcludingSelf ( SendIpi (IcrLow.Uint32, 0); } =20 +/** + Send a Start-up IPI to all processors excluding self. + This function returns after the IPI has been accepted by the target proc= essors. + if StartupRoutine >=3D 1M, then ASSERT. + if StartupRoutine is not multiple of 4K, then ASSERT. + @param StartupRoutine Points to a start-up routine which is below 1M p= hysical + address and 4K aligned. +**/ +VOID +EFIAPI +SendStartupIpiAllExcludingSelf ( + IN UINT32 StartupRoutine + ) +{ + LOCAL_APIC_ICR_LOW IcrLow; + + ASSERT (StartupRoutine < 0x100000); + ASSERT ((StartupRoutine & 0xfff) =3D=3D 0); + + IcrLow.Uint32 =3D 0; + IcrLow.Bits.Vector =3D (StartupRoutine >> 12); + IcrLow.Bits.DeliveryMode =3D LOCAL_APIC_DELIVERY_MODE_STARTUP; + IcrLow.Bits.Level =3D 1; + IcrLow.Bits.DestinationShorthand =3D=20 +LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF; + SendIpi (IcrLow.Uint32, 0); +} + /** Send an INIT-Start-up-Start-up IPI sequence to a specified target proces= sor. =20 @@ -551,22 +578,12 @@ SendInitSipiSipiAllExcludingSelf ( IN UINT32 StartupRoutine ) { - LOCAL_APIC_ICR_LOW IcrLow; - - ASSERT (StartupRoutine < 0x100000); - ASSERT ((StartupRoutine & 0xfff) =3D=3D 0); - SendInitIpiAllExcludingSelf (); MicroSecondDelay (PcdGet32 (PcdCpuInitIpiDelayInMicroSeconds)); - IcrLow.Uint32 =3D 0; - IcrLow.Bits.Vector =3D (StartupRoutine >> 12); - IcrLow.Bits.DeliveryMode =3D LOCAL_APIC_DELIVERY_MODE_STARTUP; - IcrLow.Bits.Level =3D 1; - IcrLow.Bits.DestinationShorthand =3D LOCAL_APIC_DESTINATION_SHORTHAND_AL= L_EXCLUDING_SELF; - SendIpi (IcrLow.Uint32, 0); + SendStartupIpiAllExcludingSelf (StartupRoutine); if (!StandardSignatureIsAuthenticAMD ()) { MicroSecondDelay (200); - SendIpi (IcrLow.Uint32, 0); + SendStartupIpiAllExcludingSelf (StartupRoutine); } } =20 diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/U= efiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c index 0ba0499631..aa4eb11181 100644 --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c +++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c @@ -4,7 +4,7 @@ This local APIC library instance supports x2APIC capable processors which have xAPIC and x2APIC modes. =20 - Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2023, Intel Corporation. All rights=20 + reserved.
Copyright (c) 2017 - 2020, AMD Inc. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent @@ -736,6 +736,33 @@ SendIn= itIpiAllExcludingSelf ( SendIpi (IcrLow.Uint32, 0); } =20 +/** + Send a Start-up IPI to all processors excluding self. + This function returns after the IPI has been accepted by the target proc= essors. + if StartupRoutine >=3D 1M, then ASSERT. + if StartupRoutine is not multiple of 4K, then ASSERT. + @param StartupRoutine Points to a start-up routine which is below 1M p= hysical + address and 4K aligned. +**/ +VOID +EFIAPI +SendStartupIpiAllExcludingSelf ( + IN UINT32 StartupRoutine + ) +{ + LOCAL_APIC_ICR_LOW IcrLow; + + ASSERT (StartupRoutine < 0x100000); + ASSERT ((StartupRoutine & 0xfff) =3D=3D 0); + + IcrLow.Uint32 =3D 0; + IcrLow.Bits.Vector =3D (StartupRoutine >> 12); + IcrLow.Bits.DeliveryMode =3D LOCAL_APIC_DELIVERY_MODE_STARTUP; + IcrLow.Bits.Level =3D 1; + IcrLow.Bits.DestinationShorthand =3D=20 +LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF; + SendIpi (IcrLow.Uint32, 0); +} + /** Send an INIT-Start-up-Start-up IPI sequence to a specified target proces= sor. =20 @@ -790,22 +817,12 @@ SendInitSipiSipiAllExcludingSelf ( IN UINT32 StartupRoutine ) { - LOCAL_APIC_ICR_LOW IcrLow; - - ASSERT (StartupRoutine < 0x100000); - ASSERT ((StartupRoutine & 0xfff) =3D=3D 0); - SendInitIpiAllExcludingSelf (); MicroSecondDelay (PcdGet32 (PcdCpuInitIpiDelayInMicroSeconds)); - IcrLow.Uint32 =3D 0; - IcrLow.Bits.Vector =3D (StartupRoutine >> 12); - IcrLow.Bits.DeliveryMode =3D LOCAL_APIC_DELIVERY_MODE_STARTUP; - IcrLow.Bits.Level =3D 1; - IcrLow.Bits.DestinationShorthand =3D LOCAL_APIC_DESTINATION_SHORTHAND_AL= L_EXCLUDING_SELF; - SendIpi (IcrLow.Uint32, 0); + SendStartupIpiAllExcludingSelf (StartupRoutine); if (!StandardSignatureIsAuthenticAMD ()) { MicroSecondDelay (200); - SendIpi (IcrLow.Uint32, 0); + SendStartupIpiAllExcludingSelf (StartupRoutine); } } =20 -- 2.36.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#107321): https://edk2.groups.io/g/devel/message/107321 Mute This Topic: https://groups.io/mt/100405490/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-