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From: "Min Xu" <min.m.xu@intel.com>
To: "Annapurve, Vishal" <vannapurve@google.com>,
	"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Kinney, Michael D" <michael.d.kinney@intel.com>,
	"Gao, Liming" <gaoliming@byosoft.com.cn>,
	"Liu, Zhiguang" <zhiguang.liu@intel.com>,
	"Aktas, Erdem" <erdemaktas@google.com>,
	"Yao, Jiewen" <jiewen.yao@intel.com>,
	"Annapurve, Vishal" <vannapurve@google.com>
Subject: Re: [V1 PATCH 1/1] MdePkg: TDX: Correct TDCALL_INFO_RETURN_DATA layout
Date: Thu, 16 Feb 2023 00:10:45 +0000	[thread overview]
Message-ID: <CO1PR11MB5058374105EE2F360CF3B34EC5A09@CO1PR11MB5058.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20230215195042.1094110-1-vannapurve@google.com>

On February 16, 2023 3:51 AM, Vishal Annapurve wrote:
> 
> TDCALL_INFO should return num_vcpus as lower 4 bytes of r8 register
> according to the tdx spec, so reorder num_vcpus and max_vcpus fields to
> match the spec.
> 
> Reference: Table 22.210 TDG.VP.INFO output operands
> https://cdrdv2.intel.com/v1/dl/getContent/733568
> 
> Signed-off-by: Vishal Annapurve <vannapurve@google.com>
> ---
>  MdePkg/Include/IndustryStandard/Tdx.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/MdePkg/Include/IndustryStandard/Tdx.h
> b/MdePkg/Include/IndustryStandard/Tdx.h
> index 81df136184..a17be61353 100644
> --- a/MdePkg/Include/IndustryStandard/Tdx.h
> +++ b/MdePkg/Include/IndustryStandard/Tdx.h
> @@ -111,8 +111,8 @@ typedef struct {
>  typedef struct {
>    UINT64    Gpaw;
>    UINT64    Attributes;
> -  UINT32    MaxVcpus;
>    UINT32    NumVcpus;
> +  UINT32    MaxVcpus;
>    UINT64    Resv[3];
>  } TDCALL_INFO_RETURN_DATA;
> 
Thanks much for the correction.
Reviewed-by: Min Xu <min.m.xu@intel.com>

  reply	other threads:[~2023-02-16  0:10 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-15 19:50 [V1 PATCH 1/1] MdePkg: TDX: Correct TDCALL_INFO_RETURN_DATA layout Vishal Annapurve
2023-02-16  0:10 ` Min Xu [this message]
2023-04-25 18:25   ` Vishal Annapurve

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