Re: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

["Bassa, Damian" <damian.bassa@intel.com>]

[-- Attachment #1: Type: text/plain, Size: 9688 bytes --]

Thank you for input. Submitted V2.

Damian

From: Ni, Ray <ray.ni@intel.com>
Sent: Friday, September 17, 2021 6:31 PM
To: Bassa, Damian <damian.bassa@intel.com>; Wu, Hao A <hao.a.wu@intel.com>; devel@edk2.groups.io
Cc: Kolakowski, Jacek <Jacek.Kolakowski@intel.com>
Subject: RE: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

If a device is a RCiEP, PciIoDev->Parent points to a virtual PCI_IO_DEVICE for the RootComplex.
The PCI_IO_EVICE.Parent equals to NULL for RootComplex.

Which means, we can create a helper function
BOOLEAN IsRootBridge(PciIo) { return (BOOLEAN) (PciIo->Parent == NULL); }

your code can call this helper function.

From: Bassa, Damian <damian.bassa@intel.com<mailto:damian.bassa@intel.com>>
Sent: Friday, September 17, 2021 12:02 AM
To: Ni, Ray <ray.ni@intel.com<mailto:ray.ni@intel.com>>; Wu, Hao A <hao.a.wu@intel.com<mailto:hao.a.wu@intel.com>>; devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Cc: Kolakowski, Jacek <Jacek.Kolakowski@intel.com<mailto:Jacek.Kolakowski@intel.com>>
Subject: RE: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

I was looking for anything that wouldn't include reading register but only thing that distinguish device PCI_IO_DEVICE instances with root bridge instances is population of BusNumberRanges structure.
This technically could be used since this is populated only for root bridges and not devices but using this would be just confusing since there is no self-explanatory field there.
For my knowledge this is best way to tackle this issue. Please let me know if there are have some other worth exploring ideas.

Damian

From: Ni, Ray <ray.ni@intel.com<mailto:ray.ni@intel.com>>
Sent: Wednesday, September 15, 2021 3:21 PM
To: Bassa, Damian <damian.bassa@intel.com<mailto:damian.bassa@intel.com>>; Wu, Hao A <hao.a.wu@intel.com<mailto:hao.a.wu@intel.com>>; devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Subject: RE: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

Extending PciBus to support such case is valid.

But can you check if there is other pure software way to detect whether it's an ECiEP?

From: Bassa, Damian <damian.bassa@intel.com<mailto:damian.bassa@intel.com>>
Sent: Wednesday, September 15, 2021 7:54 PM
To: Wu, Hao A <hao.a.wu@intel.com<mailto:hao.a.wu@intel.com>>; devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Ni, Ray <ray.ni@intel.com<mailto:ray.ni@intel.com>>
Subject: RE: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

Should we consider this workaround? I'm having issues interpreting this part of PCIe spec.
My understanding of this quote is that this capability can exist in but it shouldn't be considered.
I would assume it's possible option that it needs to be considered? Is that wrong?

Damian


From: Wu, Hao A <hao.a.wu@intel.com<mailto:hao.a.wu@intel.com>>
Sent: Wednesday, September 8, 2021 9:17 AM
To: Bassa, Damian <damian.bassa@intel.com<mailto:damian.bassa@intel.com>>; devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Ni, Ray <ray.ni@intel.com<mailto:ray.ni@intel.com>>
Subject: RE: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

Really sorry for the late response.

So this is a workaround for RCiEP device that is not compliant to the PCIe spec:
|>  ARI is an optional capability. This capability must be implemented by each
|>  Function in an ARI Device. It is not applicable to a Root Port, a Switch
|>  Downstream Port, an RCiEP, or a Root Complex Event Collector.

If this the case, could you help to:
* Add a comment that briefly describe this workaround before the newly added code
* Also mention this workaround information in the commit log message.
* Send out a V2 version of the patch?
Thanks in advance.

Hello Ray, please help to raise if you have concern on this.

Best Regards,
Hao Wu

From: Bassa, Damian <damian.bassa@intel.com<mailto:damian.bassa@intel.com>>
Sent: Wednesday, September 1, 2021 1:45 AM
To: Wu, Hao A <hao.a.wu@intel.com<mailto:hao.a.wu@intel.com>>; devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Ni, Ray <ray.ni@intel.com<mailto:ray.ni@intel.com>>
Subject: RE: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

It refers to access to the root port device that doesn't exist in case we are dealing with RCiEP device.
There can be specific case where RCiEP device has ARI extended capability ID (even though it's unsupported in this case).
In such a case PciSearchDevice goes to CreatePciIoDevice through GatherDeviceInfo. And in this case parent is PCI_IO_DEVICE instance created from CreateRootBridge function, which isn't valid PCIe device and doesn't have specific bus, only a range of buses. In that case enumerator tries to use this instance to read operation using default 0 bus number, which isn't correct.

Damian

From: Wu, Hao A <hao.a.wu@intel.com<mailto:hao.a.wu@intel.com>>
Sent: Tuesday, August 31, 2021 6:28 AM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Wu, Hao A <hao.a.wu@intel.com<mailto:hao.a.wu@intel.com>>; Bassa, Damian <damian.bassa@intel.com<mailto:damian.bassa@intel.com>>; Ni, Ray <ray.ni@intel.com<mailto:ray.ni@intel.com>>
Subject: RE: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> <devel@edk2.groups.io<mailto:devel@edk2.groups.io>> On Behalf Of Wu, Hao A
Sent: Tuesday, August 31, 2021 12:25 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Bassa, Damian <damian.bassa@intel.com<mailto:damian.bassa@intel.com>>
Subject: Re: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

Really sorry,

Could you help to provide more information on the below statement?
"undefined parent register accesses"

Thanks in advance.

Best Regards,
Hao Wu

From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> <devel@edk2.groups.io<mailto:devel@edk2.groups.io>> On Behalf Of Bassa, Damian
Sent: Tuesday, August 24, 2021 11:15 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Subject: [edk2-devel] [PATCH] MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP

Before trying to access parent root port to check ARI capabilities,
enumerator should see if Endpoint device is not Root Complex integrated
to avoid undefined parent register accesses in these cases.

Signed-off-by: Damian Bassa damian.bassa@intel.com<mailto:damian.bassa@intel.com>

---
.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c         | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
index db1b35f8ef..6451fb8af9 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
@@ -2153,6 +2153,7 @@ CreatePciIoDevice (
   PCI_IO_DEVICE        *PciIoDevice;
   EFI_PCI_IO_PROTOCOL  *PciIo;
   EFI_STATUS           Status;
+  PCI_REG_PCIE_CAPABILITY Capability;

   PciIoDevice = AllocateZeroPool (sizeof (PCI_IO_DEVICE));
   if (PciIoDevice == NULL) {
@@ -2229,7 +2230,16 @@ CreatePciIoDevice (
     return NULL;
   }

-  if (PcdGetBool (PcdAriSupport)) {
+  PciIo->Pci.Read (
+                PciIo,
+                EfiPciIoWidthUint16,
+                PciIoDevice->PciExpressCapabilityOffset + OFFSET_OF (PCI_CAPABILITY_PCIEXP, Capability),
+                1,
+                &Capability.Uint16
+                );
+
+  if (PcdGetBool (PcdAriSupport) &&
+    Capability.Bits.DevicePortType != PCIE_DEVICE_PORT_TYPE_ROOT_COMPLEX_INTEGRATED_ENDPOINT) {
     //
     // Check if the device is an ARI device.
     //
--
2.27.0.windows.1

________________________________
Intel Technology Poland sp. z o.o.
ul. Słowackiego 173 | 80-298 Gdańsk | Sąd Rejonowy Gdańsk Północ | VII Wydział Gospodarczy Krajowego Rejestru Sądowego - KRS 101882 | NIP 957-07-52-316 | Kapitał zakładowy 200.000 PLN.

Ta wiadomość wraz z załącznikami jest przeznaczona dla określonego adresata i może zawierać informacje poufne. W razie przypadkowego otrzymania tej wiadomości, prosimy o powiadomienie nadawcy oraz trwałe jej usunięcie; jakiekolwiek przeglądanie lub rozpowszechnianie jest zabronione.
This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.


---------------------------------------------------------------------
Intel Technology Poland sp. z o.o.
ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN.
Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wiadomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiekolwiek przegladanie lub rozpowszechnianie jest zabronione.
This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.

[-- Attachment #2: Type: text/html, Size: 21082 bytes --]