Re: [PATCH v2] ArmPkg/TimerDxe: Delay End Of Interrupt Signal

["Ashish Singhal" <ashishsingha@nvidia.com>]

From: Marc Zyngier <maz@kernel.org>
Sent: Tuesday, October 12, 2021 10:27 AM
To: Ashish Singhal <ashishsingha@nvidia.com>
Cc: Shanker Donthineni <sdonthineni@nvidia.com>; Ard Biesheuvel <ardb@kernel.org>; edk2-devel-groups-io <devel@edk2.groups.io>; Leif Lindholm <leif@nuviainc.com>; Ard Biesheuvel <ardb+tianocore@kernel.org>
Subject: Re: [PATCH v2] ArmPkg/TimerDxe: Delay End Of Interrupt Signal 
 
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On Tue, 12 Oct 2021 17:11:36 +0100,
Ashish Singhal <ashishsingha@nvidia.com> wrote:
>
> Marc,
>
> What do you suggest should be the proper fix for getting timer
> interrupts even when ISTATUS bit is not set? Should we ignore them
> the way it is in current implementation? I am OK to file a bug for
> this if you think that is a better way to discuss this.

I don't think there is anything to fix.

Yes, the order in EDKII is odd. No, changing the order doesn't give
any extra guarantee. Spurious interrupts can always happen. Broken (or
slow) HW and bad emulation are more susceptible to it.

Now, how often do you see that? On which HW?

        M.

--
Without deviation from the norm, progress is not possible.

Marc,

We see at least one spurious interrupt after every valid timer interrupt. While both valid and spurious interrupt has the correct source, spurious interrupt does not have ISTATUS bit set. We are seeing this on Silicon and not on the emulation platform. Delaying EOI signal to GIC does take the spurious interrupt out as with the new flow we clear the interrupt before signaling EOI so that next time only a valid interrupt can be triggered and not the old interrupt which was still not cleared while signaling EOI to GIC.

Thanks
Ashish

Thanks
Ashish