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Kinney" Subject: Re: [edk2-devel] [PATCH v4 1/1] ProcessorPkg/Library: Add RiscVEdk2SbiLib Thread-Topic: [edk2-devel] [PATCH v4 1/1] ProcessorPkg/Library: Add RiscVEdk2SbiLib Thread-Index: AQHWOP4mt0m2Nu2ZQ0iFRwyMrbxinKjervAAgAbjXEA= Date: Tue, 23 Jun 2020 02:08:48 +0000 Message-ID: References: <20200602165152.9823-1-daniel.schaefer@hpe.com> <20200602165152.9823-2-daniel.schaefer@hpe.com> <20200618164942.GB6739@vanye> In-Reply-To: <20200618164942.GB6739@vanye> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: nuviainc.com; dkim=none (message not signed) header.d=none;nuviainc.com; dmarc=none action=none header.from=hpe.com; x-originating-ip: [16.242.247.131] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: ebcf7228-6dbe-4726-7db9-08d8171a5dfd x-ms-traffictypediagnostic: CS1PR8401MB0423: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:4714; x-forefront-prvs: 04433051BF x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: LvXviYcJluPbQMg7iBU11WYmFpc4jFFzot0Sg5RR5MivlK5aT/D8wtQJiO5wkfsM32RZWTY6jNErzggE4CtWi97HRoCc4JZEOC4mY2gxKwVz7WpwVzxDA+ib/CxTURmX6h9JpFFENUMJvc57tZNCaCQKjF6iKxu9gksGHi7yvWXz8DPO3ix0L3mMMB9USfaINTbrGK5TmkxUmOkru9YexExONRenpdIe50XTQ34GohDW71rkzVX/z5vliieTSQhPbHbHRte9edQXObe47b+yfLmvcmNgazx5OiUxTf5PSOJVcz2uMK99TdW7yxVOZ++hUxoxo1kPw3nYZygVIkc4PiYKMPHD5l1YI/LX6YAKpXBQDweqQbooO6Wz55YuodFOmDjyQwBSsTu5r3Ms6qWQsQ== x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CS1PR8401MB1144.NAMPRD84.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFTY:;SFS:(366004)(136003)(396003)(346002)(376002)(39860400002)(5660300002)(9686003)(26005)(316002)(52536014)(2906002)(64756008)(33656002)(55016002)(30864003)(66476007)(66446008)(71200400001)(86362001)(8936002)(478600001)(53546011)(6506007)(66946007)(66556008)(966005)(110136005)(54906003)(186003)(76116006)(83380400001)(8676002)(4326008)(6636002)(19627235002)(7696005)(579004)(559001);DIR:OUT;SFP:1102; x-ms-exchange-antispam-messagedata: ELLO4uNq3CPiYbCzxeblGtDgmcLHQxGeDABkwAZ8yyYhK9RyRUd26QOk2eG3SVx3kBMMU1qSfbQ3OCxNGLJwuk1vh3s9/hwaE3gBbe1s5726sOaF87zF0vQpMhw6UxRSew5SWFrN7lL8M0niFRbE/udCNzCvfPHg+nV/A7M1/ctB1GaY5lr7de1282FEk2PXQ7QTMQaOXV2/vdrpor8O+jy98x6cJthhrP0d3jfvN5kcnMPhj6fmbQigXsssN0T7BttgA7CH7frlgRpQKxXdWCzOy/jlhKa8RaOqw0t7C63AzS/su91so13JW67ryDN770m4PeXhHNgYZRCyq70HKjNRXKjAnDZetBGXIGvcZ9sOJpUGVDSgs1Mu5zhkiJlYz8PzIL6DsBh0XEDuwIYGmg3KYGDy5VRVC1zngtLecLHQ0QcRbvYuOkNA4TeJjA7d3lls4ZszoFrDWilIZZGhMYMUPYCmI0/V//4GxVMoQw64xkO42PNC7tIr7gb1mOQK X-MS-Exchange-CrossTenant-Network-Message-Id: ebcf7228-6dbe-4726-7db9-08d8171a5dfd X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Jun 2020 02:08:48.4228 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 105b2061-b669-4b31-92ac-24d304d195dc X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 6o8dxUNGXGtG8Slx7tFRoqZwcZ+6UzzvPUgAnvYW8LXsnqQwRpBKAkW71dGswaUi/CKqPFaANKoDYTGonkBfgA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CS1PR8401MB0423 X-OriginatorOrg: hpe.com X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216,18.0.687 definitions=2020-06-22_16:2020-06-22,2020-06-22 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 spamscore=0 priorityscore=1501 cotscore=-2147483648 suspectscore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 adultscore=0 bulkscore=0 impostorscore=0 mlxlogscore=999 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2004280000 definitions=main-2006230013 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Thanks for spent time on reviewing this. Yes, we can have further discussio= ns on where to merge RISC-V code. For now, we will merge those code to edk2= -platforms master branch as the temporary home for RISC-V. Another matter regards to the inconsistent naming of "RISC-V", "RiscV" and= etc. brought up by Mike, any one else has the same concerns as Mike of us= ing "RISC-V" as folder name, however "RiscV" as the leading in file name? I still don't think it does matter though, but I would like to see more op= inions on this. Thanks Abner > -----Original Message----- > From: Leif Lindholm [mailto:leif@nuviainc.com] > Sent: Friday, June 19, 2020 12:50 AM > To: devel@edk2.groups.io; Schaefer, Daniel (DualStudy) > > Cc: Chen, Gilbert ; Chang, Abner (HPS SW/FW > Technologist) ; Michael D . Kinney > > Subject: Re: [edk2-devel] [PATCH v4 1/1] ProcessorPkg/Library: Add > RiscVEdk2SbiLib >=20 > On Tue, Jun 02, 2020 at 18:51:52 +0200, Daniel Schaefer wrote: > > Library provides interfaces to invoke SBI ecalls. > > > > Signed-off-by: Daniel Schaefer >=20 > All of my feedback on previous revision addressed - where to actually > *merge* it remains undecided, but for the contents: > Reviewed-by: Leif Lindholm >=20 > Thanks! >=20 > > Cc: Leif Lindholm > > Cc: Gilbert Chen > > Cc: Abner Chang > > Cc: Michael D. Kinney > > --- > > Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.i= nf | > 28 + > > Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h = | 563 > ++++++++++++ > > Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c= | > 897 ++++++++++++++++++++ > > 3 files changed, 1488 insertions(+) > > > > diff --git a/Silicon/RISC- > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf b/Silicon/RIS= C- > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf > > new file mode 100644 > > index 000000000000..665dcbf40e01 > > --- /dev/null > > +++ b/Silicon/RISC- > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf > > @@ -0,0 +1,28 @@ > > +## @file > > +# RISC-V Library to call SBI ecalls > > +# > > +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All > rights reserved.
> > +# > > +# SPDX-License-Identifier: BSD-2-Clause-Patent > > +# > > +## > > + > > +[Defines] > > + INF_VERSION =3D 0x0001001b > > + BASE_NAME =3D RiscVEdk2SbiLib > > + FILE_GUID =3D 0DF1BBBD-F7E5-4E8A-BCF1-9D63D2DD9FDD > > + MODULE_TYPE =3D BASE > > + VERSION_STRING =3D 1.0 > > + LIBRARY_CLASS =3D RiscVEdk2SbiLib > > + > > +[Sources] > > + RiscVEdk2SbiLib.c > > + > > +[Packages] > > + MdePkg/MdePkg.dec > > + Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec > > + Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec > > + > > +[LibraryClasses] > > + BaseLib > > + RiscVOpensbiLib > > diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiL= ib.h > b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h > > new file mode 100644 > > index 000000000000..c1ae3176147f > > --- /dev/null > > +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h > > @@ -0,0 +1,563 @@ > > +/** @file > > + Library to call the RISC-V SBI ecalls > > + > > + Copyright (c) 2020, Hewlett Packard Development LP. All rights > reserved.
> > + > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > + @par Glossary: > > + - Hart - Hardware Thread, similar to a CPU core > > +**/ > > + > > +#ifndef RISCV_SBI_LIB_H_ > > +#define RISCV_SBI_LIB_H_ > > + > > +#include > > +#include > > +#include > > +#include > > + > > +// > > +// EDK2 OpenSBI Firmware extension. > > +// > > +#define SBI_EDK2_FW_EXT (SBI_EXT_FIRMWARE_CODE_BASE_START | > SBI_OPENSBI_IMPID) > > +// > > +// EDK2 OpenSBI Firmware extension functions. > > +// > > +#define SBI_EXT_FW_MSCRATCH_FUNC 0 > > +#define SBI_EXT_FW_MSCRATCH_HARTID_FUNC 1 > > + > > +// > > +// EDK2 OpenSBI firmware extension return status. > > +// > > +typedef struct { > > + UINTN Error; ///< SBI status code > > + UINTN Value; ///< Value returned > > +} SbiRet; > > + > > +/** > > + Get the implemented SBI specification version > > + > > + The minor number of the SBI specification is encoded in the low 24 = bits, > > + with the major number encoded in the next 7 bits. Bit 32 must be 0= and > is > > + reserved for future expansion. > > + > > + @param[out] SpecVersion The Version of the SBI specificati= on. > > +**/ > > +VOID > > +EFIAPI > > +SbiGetSpecVersion ( > > + OUT UINTN *SpecVersion > > + ); > > + > > +/** > > + Get the SBI implementation ID > > + > > + This ID is used to idenetify a specific SBI implementation in order= to work > > + around any quirks it might have. > > + > > + @param[out] ImplId The ID of the SBI implementation. > > +**/ > > +VOID > > +EFIAPI > > +SbiGetImplId ( > > + OUT UINTN *ImplId > > + ); > > + > > +/** > > + Get the SBI implementation version > > + > > + The version of this SBI implementation. > > + The encoding of this number is determined by the specific SBI > implementation. > > + > > + @param[out] ImplVersion The version of the SBI implementat= ion. > > +**/ > > +VOID > > +EFIAPI > > +SbiGetImplVersion ( > > + OUT UINTN *ImplVersion > > + ); > > + > > +/** > > + Probe whether an SBI extension is available > > + > > + ProbeResult is set to 0 if the extension is not available or to an = extension > > + specified value if it is available. > > + > > + @param[in] ExtensionId The extension ID. > > + @param[out] ProbeResult The return value of the probe. > > +**/ > > +VOID > > +EFIAPI > > +SbiProbeExtension ( > > + IN INTN ExtensionId, > > + OUT INTN *ProbeResult > > + ); > > + > > +/** > > + Get the CPU's vendor ID > > + > > + Reads the mvendorid CSR. > > + > > + @param[out] MachineVendorId The CPU's vendor ID. > > +**/ > > +VOID > > +EFIAPI > > +SbiGetMachineVendorId ( > > + OUT UINTN *MachineVendorId > > + ); > > + > > +/** > > + Get the CPU's architecture ID > > + > > + Reads the marchid CSR. > > + > > + @param[out] MachineArchId The CPU's architecture ID. > > +**/ > > +VOID > > +EFIAPI > > +SbiGetMachineArchId ( > > + OUT UINTN *MachineArchId > > + ); > > + > > +/** > > + Get the CPU's implementation ID > > + > > + Reads the mimpid CSR. > > + > > + @param[out] MachineImplId The CPU's implementation ID. > > +**/ > > +VOID > > +EFIAPI > > +SbiGetMachineImplId ( > > + OUT UINTN *MachineImplId > > + ); > > + > > +/** > > + Politely ask the SBI to start a given hart. > > + > > + This call may return before the hart has actually started executing= , if the > > + SBI implementation can guarantee that the hart is actually going to= start. > > + > > + Before the hart jumps to StartAddr, the hart MUST configure PMP if > present > > + and switch to S-mode. > > + > > + @param[in] HartId The id of the hart to start. > > + @param[in] StartAddr The physical address, where the ha= rt starts > > + executing from. > > + @param[in] Priv An XLEN-bit value, which will be i= n register > > + a1 when the hart starts. > > + @retval EFI_SUCCESS Hart was stopped and will start ex= ecuting > from StartAddr. > > + @retval EFI_LOAD_ERROR StartAddr is not valid, possibly d= ue to > following reasons: > > + - It is not a valid physical addr= ess. > > + - The address is prohibited by PM= P to run in > > + supervisor mode. > > + @retval EFI_INVALID_PARAMETER HartId is not a valid hart id > > + @retval EFI_ALREADY_STARTED The hart is already running. > > + @retval other The start request failed for unkno= wn reasons. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiHartStart ( > > + IN UINTN HartId, > > + IN UINTN StartAddr, > > + IN UINTN Priv > > + ); > > + > > +/** > > + Return execution of the calling hart to SBI. > > + > > + MUST be called in S-Mode with user interrupts disabled. > > + This call is not expected to return, unless a failure occurs. > > + > > + @retval EFI_SUCCESS Never occurs. When successful, the= call does > not return. > > + @retval other Failed to stop hard for an unknown= reason. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiHartStop ( > > + ); > > + > > +/** > > + Get the current status of a hart. > > + > > + Since harts can transition between states at any time, the status > retrieved > > + by this function may already be out of date, once it returns. > > + > > + Possible values for HartStatus are: > > + 0: STARTED > > + 1: STOPPED > > + 2: START_REQUEST_PENDING > > + 3: STOP_REQUEST_PENDING > > + > > + @param[out] HartStatus The pointer in which the hart's st= atus is > > + stored. > > + @retval EFI_SUCCESS The operation succeeds. > > + @retval EFI_INVALID_PARAMETER A parameter is invalid. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiHartGetStatus ( > > + IN UINTN HartId, > > + OUT UINTN *HartStatus > > + ); > > + > > +/// > > +/// Timer extension > > +/// > > + > > +/** > > + Clear pending timer interrupt bit and set timer for next event afte= r Time. > > + > > + To clear the timer without scheduling a timer event, set Time to a > > + practically infinite value or mask the timer interrupt by clearing = sie.STIE. > > + > > + @param[in] Time The time offset to the next schedu= led timer > interrupt. > > +**/ > > +VOID > > +EFIAPI > > +SbiSetTimer ( > > + IN UINT64 Time > > + ); > > + > > +/// > > +/// IPI extension > > +/// > > + > > +/** > > + Send IPI to all harts specified in the mask. > > + > > + The interrupts are registered as supervisor software interrupts at = the > > + receiving hart. > > + > > + @param[in] HartMask Scalar bit-vector containing hart = ids > > + @param[in] HartMaskBase The starting hartid from which the= bit- > vector > > + must be computed. If set to -1, Ha= rtMask is > > + ignored and all harts are consider= ed. > > + @retval EFI_SUCCESS IPI was sent to all the targeted h= arts. > > + @retval EFI_INVALID_PARAMETER Either hart_mask_base or any of > the hartid > > + from hart_mask is not valid i.e. e= ither the > > + hartid is not enabled by the platf= orm or is > > + not available to the supervisor. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiSendIpi ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase > > + ); > > + > > +/// > > +/// Remote fence extension > > +/// > > + > > +/** > > + Instructs remote harts to execute a FENCE.I instruction. > > + > > + @param[in] HartMask Scalar bit-vector containing hart = ids > > + @param[in] HartMaskBase The starting hartid from which the= bit- > vector > > + must be computed. If set to -1, Ha= rtMask is > > + ignored and all harts are consider= ed. > > + @retval EFI_SUCCESS IPI was sent to all the targeted h= arts. > > + @retval EFI_INVALID_PARAMETER Either hart_mask_base or any of > the hartid > > + from hart_mask is not valid i.e. e= ither the > > + hartid is not enabled by the platf= orm or is > > + not available to the supervisor. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiRemoteFenceI ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase > > + ); > > + > > +/** > > + Instructs the remote harts to execute one or more SFENCE.VMA > instructions. > > + > > + The SFENCE.VMA covers the range of virtual addresses between > StartAaddr and Size. > > + > > + The remote fence function acts as a full tlb flush if * StartAddr a= nd size > > + are both 0 * size is equal to 2^XLEN-1 > > + > > + @param[in] HartMask Scalar bit-vector containing hart = ids > > + @param[in] HartMaskBase The starting hartid from which the= bit- > vector > > + must be computed. If set to -1, Ha= rtMask is > > + ignored and all harts are consider= ed. > > + @param[in] StartAddr The first address of the affected = range. > > + @param[in] Size How many addresses are affected. > > + @retval EFI_SUCCESS IPI was sent to all the targeted h= arts. > > + @retval EFI_LOAD_ERROR StartAddr or Size is not valid. > > + @retval EFI_INVALID_PARAMETER Either hart_mask_base or any of > the hartid > > + from hart_mask is not valid i.e. e= ither the > > + hartid is not enabled by the platf= orm or is > > + not available to the supervisor. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiRemoteSfenceVma ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase, > > + IN UINTN StartAddr, > > + IN UINTN Size > > + ); > > + > > +/** > > + Instructs the remote harts to execute one or more SFENCE.VMA > instructions. > > + > > + The SFENCE.VMA covers the range of virtual addresses between > StartAaddr and Size. > > + Covers only the given ASID. > > + > > + The remote fence function acts as a full tlb flush if * StartAddr a= nd size > > + are both 0 * size is equal to 2^XLEN-1 > > + > > + @param[in] HartMask Scalar bit-vector containing hart = ids > > + @param[in] HartMaskBase The starting hartid from which the= bit- > vector > > + must be computed. If set to -1, Ha= rtMask is > > + ignored and all harts are consider= ed. > > + @param[in] StartAddr The first address of the affected = range. > > + @param[in] Size How many addresses are affected. > > + @retval EFI_SUCCESS IPI was sent to all the targeted h= arts. > > + @retval EFI_LOAD_ERROR StartAddr or Size is not valid. > > + @retval EFI_INVALID_PARAMETER Either hart_mask_base or any of > the hartid > > + from hart_mask is not valid i.e. e= ither the > > + hartid is not enabled by the platf= orm or is > > + not available to the supervisor. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiRemoteSfenceVmaAsid ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase, > > + IN UINTN StartAddr, > > + IN UINTN Size, > > + IN UINTN Asid > > + ); > > + > > +/** > > + Instructs the remote harts to execute one or more SFENCE.GVMA > instructions. > > + > > + The SFENCE.GVMA covers the range of virtual addresses between > StartAaddr and Size. > > + Covers only the given VMID. > > + This function call is only valid for harts implementing the hypervi= sor > extension. > > + > > + The remote fence function acts as a full tlb flush if * StartAddr a= nd size > > + are both 0 * size is equal to 2^XLEN-1 > > + > > + @param[in] HartMask Scalar bit-vector containing hart = ids > > + @param[in] HartMaskBase The starting hartid from which the= bit- > vector > > + must be computed. If set to -1, Ha= rtMask is > > + ignored and all harts are consider= ed. > > + @param[in] StartAddr The first address of the affected = range. > > + @param[in] Size How many addresses are affected. > > + @retval EFI_SUCCESS IPI was sent to all the targeted h= arts. > > + @retval EFI_LOAD_ERROR StartAddr or Size is not valid. > > + @retval EFI_UNSUPPORTED SBI does not implement this functi= on or > one > > + of the target harts does not suppo= rt the > > + hypervisor extension. > > + @retval EFI_INVALID_PARAMETER Either hart_mask_base or any of > the hartid > > + from hart_mask is not valid i.e. e= ither the > > + hartid is not enabled by the platf= orm or is > > + not available to the supervisor. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiRemoteHfenceGvmaVmid ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase, > > + IN UINTN StartAddr, > > + IN UINTN Size, > > + IN UINTN Vmid > > + ); > > + > > +/** > > + Instructs the remote harts to execute one or more SFENCE.GVMA > instructions. > > + > > + The SFENCE.GVMA covers the range of virtual addresses between > StartAaddr and Size. > > + This function call is only valid for harts implementing the hypervi= sor > extension. > > + > > + The remote fence function acts as a full tlb flush if * StartAddr a= nd size > > + are both 0 * size is equal to 2^XLEN-1 > > + > > + @param[in] HartMask Scalar bit-vector containing hart = ids > > + @param[in] HartMaskBase The starting hartid from which the= bit- > vector > > + must be computed. If set to -1, Ha= rtMask is > > + ignored and all harts are consider= ed. > > + @param[in] StartAddr The first address of the affected = range. > > + @param[in] Size How many addresses are affected. > > + @retval EFI_SUCCESS IPI was sent to all the targeted h= arts. > > + @retval EFI_LOAD_ERROR StartAddr or Size is not valid. > > + @retval EFI_UNSUPPORTED SBI does not implement this functi= on or > one > > + of the target harts does not suppo= rt the > > + hypervisor extension. > > + @retval EFI_INVALID_PARAMETER Either hart_mask_base or any of > the hartid > > + from hart_mask is not valid i.e. e= ither the > > + hartid is not enabled by the platf= orm or is > > + not available to the supervisor. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiRemoteHfenceGvma ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase, > > + IN UINTN StartAddr, > > + IN UINTN Size > > + ); > > + > > +/** > > + Instructs the remote harts to execute one or more SFENCE.VVMA > instructions. > > + > > + The SFENCE.GVMA covers the range of virtual addresses between > StartAaddr and Size. > > + Covers only the given ASID. > > + This function call is only valid for harts implementing the hypervi= sor > extension. > > + > > + The remote fence function acts as a full tlb flush if * StartAddr a= nd size > > + are both 0 * size is equal to 2^XLEN-1 > > + > > + @param[in] HartMask Scalar bit-vector containing hart = ids > > + @param[in] HartMaskBase The starting hartid from which the= bit- > vector > > + must be computed. If set to -1, Ha= rtMask is > > + ignored and all harts are consider= ed. > > + @param[in] StartAddr The first address of the affected = range. > > + @param[in] Size How many addresses are affected. > > + @retval EFI_SUCCESS IPI was sent to all the targeted h= arts. > > + @retval EFI_LOAD_ERROR StartAddr or Size is not valid. > > + @retval EFI_UNSUPPORTED SBI does not implement this functi= on or > one > > + of the target harts does not suppo= rt the > > + hypervisor extension. > > + @retval EFI_INVALID_PARAMETER Either hart_mask_base or any of > the hartid > > + from hart_mask is not valid i.e. e= ither the > > + hartid is not enabled by the platf= orm or is > > + not available to the supervisor. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiRemoteHfenceVvmaAsid ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase, > > + IN UINTN StartAddr, > > + IN UINTN Size, > > + IN UINTN Asid > > + ); > > + > > +/** > > + Instructs the remote harts to execute one or more SFENCE.VVMA > instructions. > > + > > + The SFENCE.GVMA covers the range of virtual addresses between > StartAaddr and Size. > > + This function call is only valid for harts implementing the hypervi= sor > extension. > > + > > + The remote fence function acts as a full tlb flush if * StartAddr a= nd size > > + are both 0 * size is equal to 2^XLEN-1 > > + > > + @param[in] HartMask Scalar bit-vector containing hart = ids > > + @param[in] HartMaskBase The starting hartid from which the= bit- > vector > > + must be computed. If set to -1, Ha= rtMask is > > + ignored and all harts are consider= ed. > > + @param[in] StartAddr The first address of the affected = range. > > + @param[in] Size How many addresses are affected. > > + @retval EFI_SUCCESS IPI was sent to all the targeted h= arts. > > + @retval EFI_LOAD_ERROR StartAddr or Size is not valid. > > + @retval EFI_UNSUPPORTED SBI does not implement this functi= on or > one > > + of the target harts does not suppo= rt the > > + hypervisor extension. > > + @retval EFI_INVALID_PARAMETER Either hart_mask_base or any of > the hartid > > + from hart_mask is not valid i.e. e= ither the > > + hartid is not enabled by the platf= orm or is > > + not available to the supervisor. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiRemoteHfenceVvma ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase, > > + IN UINTN StartAddr, > > + IN UINTN Size > > + ); > > + > > +/// > > +/// Vendor Specific extension space: Extension Ids 0x09000000 through > 0x09FFFFFF > > +/// > > + > > +/** > > + Call a function in a vendor defined SBI extension > > + > > + ASSERT() if the ExtensionId is not in the designated SBI Vendor Ext= ension > > + Space. > > + > > + @param[in] ExtensionId The SBI vendor extension ID. > > + @param[in] FunctionId The function ID to call in this ex= tension. > > + @param[in] NumArgs How many arguments are passed. > > + @param[in] ... Actual Arguments to the function. > > + @retval EFI_SUCCESS if the SBI function was called and it was succe= ssful > > + @retval EFI_INVALID_PARAMETER if NumArgs exceeds 6 > > + @retval others if the called SBI function returns an error > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiVendorCall ( > > + IN UINTN ExtensionId, > > + IN UINTN FunctionId, > > + IN UINTN NumArgs, > > + ... > > + ); > > + > > +/// > > +/// Firmware SBI Extension > > +/// > > +/// This SBI Extension is defined and used by EDK2 only in order to b= e able > to > > +/// run PI and DXE phase in S-Mode. > > +/// > > + > > +/** > > + Get scratch space of the current hart. > > + > > + Please consider using the wrapper SbiGetFirmwareContext if you only > need to > > + access the firmware context. > > + > > + @param[out] ScratchSpace The scratch space pointer. > > + @retval EFI_SUCCESS The operation succeeds. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiGetMscratch ( > > + OUT SBI_SCRATCH **ScratchSpace > > + ); > > + > > +/** > > + Get scratch space of the given hart id. > > + > > + @param[in] HartId The hart id. > > + @param[out] ScratchSpace The scratch space pointer. > > + @retval EFI_SUCCESS The operation succeeds. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiGetMscratchHartid ( > > + IN UINTN HartId, > > + OUT SBI_SCRATCH **ScratchSpace > > + ); > > + > > +/** > > + Get firmware context of the calling hart. > > + > > + @param[out] FirmwareContext The firmware context pointer. > > + @retval EFI_SUCCESS The operation succeeds. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiGetFirmwareContext ( > > + OUT EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT **FirmwareContext > > + ); > > + > > +/** > > + Set firmware context of the calling hart. > > + > > + @param[in] FirmwareContext The firmware context pointer. > > + @retval EFI_SUCCESS The operation succeeds. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiSetFirmwareContext ( > > + IN EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext > > + ); > > + > > +#endif > > diff --git a/Silicon/RISC- > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c b/Silicon/RISC- > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c > > new file mode 100644 > > index 000000000000..0df505d2675b > > --- /dev/null > > +++ b/Silicon/RISC- > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c > > @@ -0,0 +1,897 @@ > > +/** @file > > + Instance of the SBI ecall library. > > + > > + It allows calling an SBI function via an ecall from S-Mode. > > + > > + The legacy extensions are not included because they are not necessa= ry. > > + They would be: > > + - SbiLegacySetTimer -> Use SbiSetTimer > > + - SbiLegacyConsolePutChar -> No replacement - Use regular UEFI > functions > > + - SbiLegacyConsoleGetChar -> No replacement - Use regular UEFI > functions > > + - SbiLegacyClearIpi -> Write 0 to SSIP > > + - SbiLegacySendIpi -> Use SbiSendIpi > > + - SbiLegacyRemoteFenceI -> Use SbiRemoteFenceI > > + - SbiLegacyRemoteSfenceVma -> Use SbiRemoteSfenceVma > > + - SbiLegacyRemoteSfenceVmaAsid -> Use SbiRemoteSfenceVmaAsid > > + - SbiLegacyShutdown -> Wait for new System Reset extensi= on > > + > > + Copyright (c) 2020, Hewlett Packard Development LP. All rights > reserved.
> > + SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > + @par Revision Reference: > > + - OpenSBI Version 0.6 > > +**/ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > + > > +// > > +// Maximum arguments for SBI ecall > > +// It's possible to pass more but no SBI call uses more as of SBI 0.2= . > > +// The additional arguments would have to be passed on the stack inst= ead > of as > > +// registers, like it's done now. > > +// > > +#define SBI_CALL_MAX_ARGS 6 > > + > > +/** > > + Call SBI call using ecall instruction. > > + > > + Asserts when NumArgs exceeds SBI_CALL_MAX_ARGS. > > + > > + @param[in] ExtId SBI extension ID. > > + @param[in] FuncId SBI function ID. > > + @param[in] NumArgs Number of arguments to pass to the ecall. > > + @param[in] ... Argument list for the ecall. > > + > > + @retval Returns SbiRet structure with value and error code. > > + > > +**/ > > +STATIC > > +SbiRet > > +EFIAPI > > +SbiCall( > > + IN UINTN ExtId, > > + IN UINTN FuncId, > > + IN UINTN NumArgs, > > + ... > > + ) > > +{ > > + UINTN I; > > + SbiRet Ret; > > + UINTN Args[SBI_CALL_MAX_ARGS]; > > + VA_LIST ArgList; > > + VA_START (ArgList, NumArgs); > > + > > + ASSERT (NumArgs <=3D SBI_CALL_MAX_ARGS); > > + > > + for (I =3D 0; I < SBI_CALL_MAX_ARGS; I++) { > > + if (I < NumArgs) { > > + Args[I] =3D VA_ARG (ArgList, UINTN); > > + } else { > > + // Default to 0 for all arguments that are not given > > + Args[I] =3D 0; > > + } > > + } > > + > > + VA_END(ArgList); > > + > > + register UINTN a0 asm ("a0") =3D Args[0]; > > + register UINTN a1 asm ("a1") =3D Args[1]; > > + register UINTN a2 asm ("a2") =3D Args[2]; > > + register UINTN a3 asm ("a3") =3D Args[3]; > > + register UINTN a4 asm ("a4") =3D Args[4]; > > + register UINTN a5 asm ("a5") =3D Args[5]; > > + register UINTN a6 asm ("a6") =3D (UINTN)(FuncId); > > + register UINTN a7 asm ("a7") =3D (UINTN)(ExtId); > > + asm volatile ("ecall" \ > > + : "+r" (a0), "+r" (a1) \ > > + : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7)= \ > > + : "memory"); \ > > + Ret.Error =3D a0; > > + Ret.Value =3D a1; > > + return Ret; > > +} > > + > > +/** > > + Translate SBI error code to EFI status. > > + > > + @param[in] SbiError SBI error code > > + @retval EFI_STATUS > > +**/ > > + > > +STATIC > > +EFI_STATUS > > +EFIAPI > > +TranslateError( > > + IN UINTN SbiError > > + ) > > +{ > > + switch (SbiError) { > > + case SBI_SUCCESS: > > + return EFI_SUCCESS; > > + case SBI_ERR_FAILED: > > + return EFI_DEVICE_ERROR; > > + break; > > + case SBI_ERR_NOT_SUPPORTED: > > + return EFI_UNSUPPORTED; > > + break; > > + case SBI_ERR_INVALID_PARAM: > > + return EFI_INVALID_PARAMETER; > > + break; > > + case SBI_ERR_DENIED: > > + return EFI_ACCESS_DENIED; > > + break; > > + case SBI_ERR_INVALID_ADDRESS: > > + return EFI_LOAD_ERROR; > > + break; > > + case SBI_ERR_ALREADY_AVAILABLE: > > + return EFI_ALREADY_STARTED; > > + break; > > + default: > > + // > > + // Reaches here only if SBI has defined a new error type > > + // > > + ASSERT (FALSE); > > + return EFI_UNSUPPORTED; > > + break; > > + } > > +} > > + > > +// > > +// OpenSBI library interface function for the base extension > > +// > > + > > +/** > > + Get the implemented SBI specification version > > + > > + The minor number of the SBI specification is encoded in the low 24 = bits, > > + with the major number encoded in the next 7 bits. Bit 32 must be 0= and > is > > + reserved for future expansion. > > + > > + @param[out] SpecVersion The Version of the SBI specificati= on. > > +**/ > > +VOID > > +EFIAPI > > +SbiGetSpecVersion ( > > + OUT UINTN *SpecVersion > > + ) > > +{ > > + SbiRet Ret =3D SbiCall (SBI_EXT_BASE, SBI_EXT_BASE_GET_SPEC_VERSION= , > 0); > > + > > + if (!Ret.Error) { > > + *SpecVersion =3D (UINTN)Ret.Value; > > + } > > +} > > + > > +/** > > + Get the SBI implementation ID > > + > > + This ID is used to idenetify a specific SBI implementation in order= to work > > + around any quirks it might have. > > + > > + @param[out] ImplId The ID of the SBI implementation. > > +**/ > > +VOID > > +EFIAPI > > +SbiGetImplId ( > > + OUT UINTN *ImplId > > + ) > > +{ > > + SbiRet Ret =3D SbiCall (SBI_EXT_BASE, SBI_EXT_BASE_GET_IMP_ID, 0); > > + *ImplId =3D (UINTN)Ret.Value; > > +} > > + > > +/** > > + Get the SBI implementation version > > + > > + The version of this SBI implementation. > > + The encoding of this number is determined by the specific SBI > implementation. > > + > > + @param[out] ImplVersion The version of the SBI implementat= ion. > > +**/ > > +VOID > > +EFIAPI > > +SbiGetImplVersion ( > > + OUT UINTN *ImplVersion > > + ) > > +{ > > + SbiRet Ret =3D SbiCall (SBI_EXT_BASE, SBI_EXT_BASE_GET_IMP_VERSION, > 0); > > + *ImplVersion =3D (UINTN)Ret.Value; > > +} > > + > > +/** > > + Probe whether an SBI extension is available > > + > > + ProbeResult is set to 0 if the extension is not available or to an = extension > > + specified value if it is available. > > + > > + @param[in] ExtensionId The extension ID. > > + @param[out] ProbeResult The return value of the probe. > > +**/ > > +VOID > > +EFIAPI > > +SbiProbeExtension ( > > + IN INTN ExtensionId, > > + OUT INTN *ProbeResult > > + ) > > +{ > > + SbiRet Ret =3D SbiCall (SBI_EXT_BASE, SBI_EXT_BASE_PROBE_EXT, 0); > > + *ProbeResult =3D (UINTN)Ret.Value; > > +} > > + > > +/** > > + Get the CPU's vendor ID > > + > > + Reads the mvendorid CSR. > > + > > + @param[out] MachineVendorId The CPU's vendor ID. > > +**/ > > +VOID > > +EFIAPI > > +SbiGetMachineVendorId ( > > + OUT UINTN *MachineVendorId > > + ) > > +{ > > + SbiRet Ret =3D SbiCall (SBI_EXT_BASE, SBI_EXT_BASE_GET_MVENDORID, 0= ); > > + *MachineVendorId =3D (UINTN)Ret.Value; > > +} > > + > > +/** > > + Get the CPU's architecture ID > > + > > + Reads the marchid CSR. > > + > > + @param[out] MachineArchId The CPU's architecture ID. > > +**/ > > +VOID > > +EFIAPI > > +SbiGetMachineArchId ( > > + OUT UINTN *MachineArchId > > + ) > > +{ > > + SbiRet Ret =3D SbiCall (SBI_EXT_BASE, SBI_EXT_BASE_GET_MARCHID, 0); > > + *MachineArchId =3D (UINTN)Ret.Value; > > +} > > + > > +/** > > + Get the CPU's architecture ID > > + > > + Reads the marchid CSR. > > + > > + @param[out] MachineImplId The CPU's implementation ID. > > +**/ > > +VOID > > +EFIAPI > > +SbiGetMachineImplId ( > > + OUT UINTN *MachineImplId > > + ) > > +{ > > + SbiRet Ret =3D SbiCall (SBI_EXT_BASE, SBI_EXT_BASE_GET_MIMPID, 0); > > + *MachineImplId =3D (UINTN)Ret.Value; > > +} > > + > > +// > > +// SBI interface function for the hart state management extension > > +// > > + > > +/** > > + Politely ask the SBI to start a given hart. > > + > > + This call may return before the hart has actually started executing= , if the > > + SBI implementation can guarantee that the hart is actually going to= start. > > + > > + Before the hart jumps to StartAddr, the hart MUST configure PMP if > present > > + and switch to S-mode. > > + > > + @param[in] HartId The id of the hart to start. > > + @param[in] StartAddr The physical address, where the ha= rt starts > > + executing from. > > + @param[in] Priv An XLEN-bit value, which will be i= n register > > + a1 when the hart starts. > > + @retval EFI_SUCCESS Hart was stopped and will start ex= ecuting > from StartAddr. > > + @retval EFI_LOAD_ERROR StartAddr is not valid, possibly d= ue to > following reasons: > > + - It is not a valid physical add= ress. > > + - The address is prohibited by P= MP to run in > > + supervisor mode. > > + @retval EFI_INVALID_PARAMETER HartId is not a valid hart id > > + @retval EFI_ALREADY_STARTED The hart is already running. > > + @retval other The start request failed for unkno= wn reasons. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiHartStart ( > > + IN UINTN HartId, > > + IN UINTN StartAddr, > > + IN UINTN Priv > > + ) > > +{ > > + SbiRet Ret =3D SbiCall ( > > + SBI_EXT_HSM, > > + SBI_EXT_HSM_HART_START, > > + 3, > > + HartId, > > + StartAddr, > > + Priv > > + ); > > + return TranslateError (Ret.Error); > > +} > > + > > +/** > > + Return execution of the calling hart to SBI. > > + > > + MUST be called in S-Mode with user interrupts disabled. > > + This call is not expected to return, unless a failure occurs. > > + > > + @retval EFI_SUCCESS Never occurs. When successful, the= call does > not return. > > + @retval other Failed to stop hard for an unknown= reason. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiHartStop ( > > + ) > > +{ > > + SbiRet Ret =3D SbiCall (SBI_EXT_HSM, SBI_EXT_HSM_HART_STOP, 0); > > + return TranslateError (Ret.Error); > > +} > > + > > +/** > > + Get the current status of a hart. > > + > > + Since harts can transition between states at any time, the status > retrieved > > + by this function may already be out of date, once it returns. > > + > > + Possible values for HartStatus are: > > + 0: STARTED > > + 1: STOPPED > > + 2: START_REQUEST_PENDING > > + 3: STOP_REQUEST_PENDING > > + > > + @param[out] HartStatus The pointer in which the hart's st= atus is > > + stored. > > + @retval EFI_SUCCESS The operation succeeds. > > + @retval EFI_INVALID_PARAMETER A parameter is invalid. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiHartGetStatus ( > > + IN UINTN HartId, > > + OUT UINTN *HartStatus > > + ) > > +{ > > + SbiRet Ret =3D SbiCall (SBI_EXT_HSM, SBI_EXT_HSM_HART_GET_STATUS, 1= , > HartId); > > + > > + if (!Ret.Error) { > > + *HartStatus =3D (UINTN)Ret.Value; > > + } > > + > > + return TranslateError (Ret.Error); > > +} > > + > > +/** > > + Clear pending timer interrupt bit and set timer for next event afte= r Time. > > + > > + To clear the timer without scheduling a timer event, set Time to a > > + practically infinite value or mask the timer interrupt by clearing = sie.STIE. > > + > > + @param[in] Time The time offset to the next schedu= led timer > interrupt. > > +**/ > > +VOID > > +EFIAPI > > +SbiSetTimer ( > > + IN UINT64 Time > > + ) > > +{ > > + SbiCall (SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, 1, Time); > > +} > > + > > +EFI_STATUS > > +EFIAPI > > +SbiSendIpi ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase > > + ) > > +{ > > + SbiRet Ret =3D SbiCall ( > > + SBI_EXT_IPI, > > + SBI_EXT_IPI_SEND_IPI, > > + 2, > > + (UINTN)HartMask, > > + HartMaskBase > > + ); > > + return TranslateError (Ret.Error); > > +} > > + > > +/** > > + Instructs remote harts to execute a FENCE.I instruction. > > + > > + @param[in] HartMask Scalar bit-vector containing hart = ids > > + @param[in] HartMaskBase The starting hartid from which the= bit- > vector > > + must be computed. If set to -1, Ha= rtMask is > > + ignored and all harts are consider= ed. > > + @retval EFI_SUCCESS IPI was sent to all the targeted h= arts. > > + @retval EFI_INVALID_PARAMETER Either hart_mask_base or any of > the hartid > > + from hart_mask is not valid i.e. e= ither the > > + hartid is not enabled by the platf= orm or is > > + not available to the supervisor. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiRemoteFenceI ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase > > + ) > > +{ > > + SbiRet Ret =3D SbiCall ( > > + SBI_EXT_RFENCE, > > + SBI_EXT_RFENCE_REMOTE_FENCE_I, > > + 2, > > + (UINTN)HartMask, > > + HartMaskBase > > + ); > > + return TranslateError (Ret.Error); > > +} > > + > > +/** > > + Instructs the remote harts to execute one or more SFENCE.VMA > instructions. > > + > > + The SFENCE.VMA covers the range of virtual addresses between > StartAaddr and Size. > > + > > + The remote fence function acts as a full tlb flush if * StartAddr a= nd size > > + are both 0 * size is equal to 2^XLEN-1 > > + > > + @param[in] HartMask Scalar bit-vector containing hart = ids > > + @param[in] HartMaskBase The starting hartid from which the= bit- > vector > > + must be computed. If set to -1, Ha= rtMask is > > + ignored and all harts are consider= ed. > > + @param[in] StartAddr The first address of the affected = range. > > + @param[in] Size How many addresses are affected. > > + @retval EFI_SUCCESS IPI was sent to all the targeted h= arts. > > + @retval EFI_LOAD_ERROR StartAddr or Size is not valid. > > + @retval EFI_INVALID_PARAMETER Either hart_mask_base or any of > the hartid > > + from hart_mask is not valid i.e. e= ither the > > + hartid is not enabled by the platf= orm or is > > + not available to the supervisor. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiRemoteSfenceVma ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase, > > + IN UINTN StartAddr, > > + IN UINTN Size > > + ) > > +{ > > + SbiRet Ret =3D SbiCall ( > > + SBI_EXT_RFENCE, > > + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA, > > + 4, > > + (UINTN)HartMask, > > + HartMaskBase, > > + StartAddr, > > + Size > > + ); > > + return TranslateError (Ret.Error); > > +} > > + > > +/** > > + Instructs the remote harts to execute one or more SFENCE.VMA > instructions. > > + > > + The SFENCE.VMA covers the range of virtual addresses between > StartAaddr and Size. > > + Covers only the given ASID. > > + > > + The remote fence function acts as a full tlb flush if * StartAddr a= nd size > > + are both 0 * size is equal to 2^XLEN-1 > > + > > + @param[in] HartMask Scalar bit-vector containing hart = ids > > + @param[in] HartMaskBase The starting hartid from which the= bit- > vector > > + must be computed. If set to -1, Ha= rtMask is > > + ignored and all harts are consider= ed. > > + @param[in] StartAddr The first address of the affected = range. > > + @param[in] Size How many addresses are affected. > > + @retval EFI_SUCCESS IPI was sent to all the targeted h= arts. > > + @retval EFI_LOAD_ERROR StartAddr or Size is not valid. > > + @retval EFI_INVALID_PARAMETER Either hart_mask_base or any of > the hartid > > + from hart_mask is not valid i.e. e= ither the > > + hartid is not enabled by the platf= orm or is > > + not available to the supervisor. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiRemoteSfenceVmaAsid ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase, > > + IN UINTN StartAddr, > > + IN UINTN Size, > > + IN UINTN Asid > > + ) > > +{ > > + SbiRet Ret =3D SbiCall ( > > + SBI_EXT_RFENCE, > > + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID, > > + 5, > > + (UINTN)HartMask, > > + HartMaskBase, > > + StartAddr, > > + Size, > > + Asid > > + ); > > + return TranslateError (Ret.Error); > > +} > > + > > +/** > > + Instructs the remote harts to execute one or more SFENCE.GVMA > instructions. > > + > > + The SFENCE.GVMA covers the range of virtual addresses between > StartAaddr and Size. > > + Covers only the given VMID. > > + This function call is only valid for harts implementing the hypervi= sor > extension. > > + > > + The remote fence function acts as a full tlb flush if * StartAddr a= nd size > > + are both 0 * size is equal to 2^XLEN-1 > > + > > + @param[in] HartMask Scalar bit-vector containing hart = ids > > + @param[in] HartMaskBase The starting hartid from which the= bit- > vector > > + must be computed. If set to -1, Ha= rtMask is > > + ignored and all harts are consider= ed. > > + @param[in] StartAddr The first address of the affected = range. > > + @param[in] Size How many addresses are affected. > > + @retval EFI_SUCCESS IPI was sent to all the targeted h= arts. > > + @retval EFI_LOAD_ERROR StartAddr or Size is not valid. > > + @retval EFI_UNSUPPORTED SBI does not implement this functi= on or > one > > + of the target harts does not suppo= rt the > > + hypervisor extension. > > + @retval EFI_INVALID_PARAMETER Either hart_mask_base or any of > the hartid > > + from hart_mask is not valid i.e. e= ither the > > + hartid is not enabled by the platf= orm or is > > + not available to the supervisor. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiRemoteHFenceGvmaVmid ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase, > > + IN UINTN StartAddr, > > + IN UINTN Size, > > + IN UINTN Vmid > > + ) > > +{ > > + SbiRet Ret =3D SbiCall ( > > + SBI_EXT_RFENCE, > > + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA, > > + 5, > > + (UINTN)HartMask, > > + HartMaskBase, > > + StartAddr, > > + Size, > > + Vmid > > + ); > > + return TranslateError (Ret.Error); > > +} > > + > > +/** > > + Instructs the remote harts to execute one or more SFENCE.GVMA > instructions. > > + > > + The SFENCE.GVMA covers the range of virtual addresses between > StartAaddr and Size. > > + This function call is only valid for harts implementing the hypervi= sor > extension. > > + > > + The remote fence function acts as a full tlb flush if * StartAddr a= nd size > > + are both 0 * size is equal to 2^XLEN-1 > > + > > + @param[in] HartMask Scalar bit-vector containing hart = ids > > + @param[in] HartMaskBase The starting hartid from which the= bit- > vector > > + must be computed. If set to -1, Ha= rtMask is > > + ignored and all harts are consider= ed. > > + @param[in] StartAddr The first address of the affected = range. > > + @param[in] Size How many addresses are affected. > > + @retval EFI_SUCCESS IPI was sent to all the targeted h= arts. > > + @retval EFI_LOAD_ERROR StartAddr or Size is not valid. > > + @retval EFI_UNSUPPORTED SBI does not implement this functi= on or > one > > + of the target harts does not suppo= rt the > > + hypervisor extension. > > + @retval EFI_INVALID_PARAMETER Either hart_mask_base or any of > the hartid > > + from hart_mask is not valid i.e. e= ither the > > + hartid is not enabled by the platf= orm or is > > + not available to the supervisor. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiRemoteHFenceGvma ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase, > > + IN UINTN StartAddr, > > + IN UINTN Size > > + ) > > +{ > > + SbiRet Ret =3D SbiCall ( > > + SBI_EXT_RFENCE, > > + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID, > > + 4, > > + (UINTN)HartMask, > > + HartMaskBase, > > + StartAddr, > > + Size > > + ); > > + return TranslateError (Ret.Error); > > +} > > + > > +/** > > + Instructs the remote harts to execute one or more SFENCE.VVMA > instructions. > > + > > + The SFENCE.GVMA covers the range of virtual addresses between > StartAaddr and Size. > > + Covers only the given ASID. > > + This function call is only valid for harts implementing the hypervi= sor > extension. > > + > > + The remote fence function acts as a full tlb flush if * StartAddr a= nd size > > + are both 0 * size is equal to 2^XLEN-1 > > + > > + @param[in] HartMask Scalar bit-vector containing hart = ids > > + @param[in] HartMaskBase The starting hartid from which the= bit- > vector > > + must be computed. If set to -1, Ha= rtMask is > > + ignored and all harts are consider= ed. > > + @param[in] StartAddr The first address of the affected = range. > > + @param[in] Size How many addresses are affected. > > + @retval EFI_SUCCESS IPI was sent to all the targeted h= arts. > > + @retval EFI_LOAD_ERROR StartAddr or Size is not valid. > > + @retval EFI_UNSUPPORTED SBI does not implement this functi= on or > one > > + of the target harts does not suppo= rt the > > + hypervisor extension. > > + @retval EFI_INVALID_PARAMETER Either hart_mask_base or any of > the hartid > > + from hart_mask is not valid i.e. e= ither the > > + hartid is not enabled by the platf= orm or is > > + not available to the supervisor. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiRemoteHFenceVvmaAsid ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase, > > + IN UINTN StartAddr, > > + IN UINTN Size, > > + IN UINTN Asid > > + ) > > +{ > > + SbiRet Ret =3D SbiCall ( > > + SBI_EXT_RFENCE, > > + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA, > > + 5, > > + (UINTN)HartMask, > > + HartMaskBase, > > + StartAddr, > > + Size, > > + Asid > > + ); > > + return TranslateError (Ret.Error); > > +} > > + > > +/** > > + Instructs the remote harts to execute one or more SFENCE.VVMA > instructions. > > + > > + The SFENCE.GVMA covers the range of virtual addresses between > StartAaddr and Size. > > + This function call is only valid for harts implementing the hypervi= sor > extension. > > + > > + The remote fence function acts as a full tlb flush if * StartAddr a= nd size > > + are both 0 * size is equal to 2^XLEN-1 > > + > > + @param[in] HartMask Scalar bit-vector containing hart = ids > > + @param[in] HartMaskBase The starting hartid from which the= bit- > vector > > + must be computed. If set to -1, Ha= rtMask is > > + ignored and all harts are consider= ed. > > + @param[in] StartAddr The first address of the affected = range. > > + @param[in] Size How many addresses are affected. > > + @retval EFI_SUCCESS IPI was sent to all the targeted h= arts. > > + @retval EFI_LOAD_ERROR StartAddr or Size is not valid. > > + @retval EFI_UNSUPPORTED SBI does not implement this functi= on or > one > > + of the target harts does not suppo= rt the > > + hypervisor extension. > > + @retval EFI_INVALID_PARAMETER Either hart_mask_base or any of > the hartid > > + from hart_mask is not valid i.e. e= ither the > > + hartid is not enabled by the platf= orm or is > > + not available to the supervisor. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiRemoteHFenceVvma ( > > + IN UINTN *HartMask, > > + IN UINTN HartMaskBase, > > + IN UINTN StartAddr, > > + IN UINTN Size > > + ) > > +{ > > + SbiRet Ret =3D SbiCall ( > > + SBI_EXT_RFENCE, > > + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID, > > + 4, > > + (UINTN)HartMask, > > + HartMaskBase, > > + StartAddr, > > + Size > > + ); > > + return TranslateError (Ret.Error); > > +} > > + > > +// > > +// SBI interface function for the vendor extension > > +// > > + > > +/** > > + Call a function in a vendor defined SBI extension > > + > > + ASSERT() if the ExtensionId is not in the designated SBI Vendor Ext= ension > > + Space or NumArgs exceeds SBI_CALL_MAX_ARGS. > > + > > + @param[in] ExtensionId The SBI vendor extension ID. > > + @param[in] FunctionId The function ID to call in this ex= tension. > > + @param[in] NumArgs How many arguments are passed. > > + @param[in] ... Actual Arguments to the function. > > + @retval EFI_SUCCESS if the SBI function was called and it was succe= ssful > > + @retval others if the called SBI function returns an error > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiVendorCall ( > > + IN UINTN ExtensionId, > > + IN UINTN FunctionId, > > + IN UINTN NumArgs, > > + ... > > + ) > > +{ > > + SbiRet Ret; > > + VA_LIST Args; > > + VA_START (Args, NumArgs); > > + > > + ASSERT (ExtensionId >=3D SBI_EXT_VENDOR_START && ExtensionId <=3D > SBI_EXT_VENDOR_END); > > + ASSERT (NumArgs <=3D SBI_CALL_MAX_ARGS); > > + > > + switch (NumArgs) { > > + case 0: > > + Ret =3D SbiCall (ExtensionId, FunctionId, NumArgs); > > + break; > > + case 1: > > + Ret =3D SbiCall (ExtensionId, FunctionId, NumArgs, VA_ARG (Ar= gs, > UINTN)); > > + break; > > + case 2: > > + Ret =3D SbiCall (ExtensionId, FunctionId, NumArgs, VA_ARG (Ar= gs, > UINTN), > > + VA_ARG (Args, UINTN)); > > + break; > > + case 3: > > + Ret =3D SbiCall (ExtensionId, FunctionId, NumArgs, VA_ARG (Ar= gs, > UINTN), > > + VA_ARG (Args, UINTN), VA_ARG (Args, UINTN)); > > + break; > > + case 4: > > + Ret =3D SbiCall (ExtensionId, FunctionId, NumArgs, VA_ARG (Ar= gs, > UINTN), > > + VA_ARG (Args, UINTN), VA_ARG (Args, UINTN), > > + VA_ARG (Args, UINTN)); > > + break; > > + case 5: > > + Ret =3D SbiCall (ExtensionId, FunctionId, NumArgs, VA_ARG (Ar= gs, > UINTN), > > + VA_ARG (Args, UINTN), VA_ARG (Args, UINTN), > > + VA_ARG (Args, UINTN), VA_ARG (Args, UINTN)); > > + break; > > + case 6: > > + Ret =3D SbiCall (ExtensionId, FunctionId, NumArgs, VA_ARG (Ar= gs, > UINTN), > > + VA_ARG (Args, UINTN), VA_ARG (Args, UINTN), > > + VA_ARG (Args, UINTN), VA_ARG (Args, UINTN), > > + VA_ARG (Args, UINTN)); > > + break; > > + default: > > + // Too many args. In theory SBI can handle more arguments whe= n > they are > > + // passed on the stack but no SBI extension uses this, theref= ore it's > > + // not yet implemented here. > > + return EFI_INVALID_PARAMETER; > > + } > > + > > + VA_END(Args); > > + return TranslateError (Ret.Error); > > +} > > + > > +// > > +// SBI Firmware extension > > +// > > + > > +/** > > + Get scratch space of the current hart. > > + > > + Please consider using the wrapper SbiGetFirmwareContext if you only > need to > > + access the firmware context. > > + > > + @param[out] ScratchSpace The scratch space pointer. > > + @retval EFI_SUCCESS The operation succeeds. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiGetMscratch ( > > + OUT SBI_SCRATCH **ScratchSpace > > + ) > > +{ > > + SbiRet Ret =3D SbiCall (SBI_EDK2_FW_EXT, SBI_EXT_FW_MSCRATCH_FUNC, > 0); > > + > > + if (!Ret.Error) { > > + *ScratchSpace =3D (SBI_SCRATCH *)Ret.Value; > > + } > > + > > + return EFI_SUCCESS; > > +} > > + > > +/** > > + Get scratch space of the given hart id. > > + > > + @param[in] HartId The hart id. > > + @param[out] ScratchSpace The scratch space pointer. > > + @retval EFI_SUCCESS The operation succeeds. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiGetMscratchHartid ( > > + IN UINTN HartId, > > + OUT SBI_SCRATCH **ScratchSpace > > + ) > > +{ > > + SbiRet Ret =3D SbiCall ( > > + SBI_EDK2_FW_EXT, > > + SBI_EXT_FW_MSCRATCH_HARTID_FUNC, > > + 1, > > + HartId > > + ); > > + > > + if (!Ret.Error) { > > + *ScratchSpace =3D (SBI_SCRATCH *)Ret.Value; > > + } > > + > > + return EFI_SUCCESS; > > +} > > + > > +/** > > + Get firmware context of the calling hart. > > + > > + @param[out] FirmwareContext The firmware context pointer. > > + @retval EFI_SUCCESS The operation succeeds. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiGetFirmwareContext ( > > + OUT EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT **FirmwareContext > > + ) > > +{ > > + SBI_SCRATCH *ScratchSpace; > > + SBI_PLATFORM *SbiPlatform; > > + SbiRet Ret =3D SbiCall (SBI_EDK2_FW_EXT, SBI_EXT_FW_MSCRATCH_FUNC, > 0); > > + > > + if (!Ret.Error) { > > + ScratchSpace =3D (SBI_SCRATCH *)Ret.Value; > > + SbiPlatform =3D (SBI_PLATFORM *)sbi_platform_ptr(ScratchSpace); > > + *FirmwareContext =3D (EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT > *)SbiPlatform->firmware_context; > > + } > > + > > + return EFI_SUCCESS; > > +} > > + > > +/** > > + Set firmware context of the calling hart. > > + > > + @param[in] FirmwareContext The firmware context pointer. > > + @retval EFI_SUCCESS The operation succeeds. > > +**/ > > +EFI_STATUS > > +EFIAPI > > +SbiSetFirmwareContext ( > > + IN EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext > > + ) > > +{ > > + SBI_SCRATCH *ScratchSpace; > > + SBI_PLATFORM *SbiPlatform; > > + SbiRet Ret =3D SbiCall (SBI_EDK2_FW_EXT, SBI_EXT_FW_MSCRATCH_FUNC, > 0); > > + > > + if (!Ret.Error) { > > + ScratchSpace =3D (SBI_SCRATCH *)Ret.Value; > > + SbiPlatform =3D (SBI_PLATFORM *)sbi_platform_ptr (ScratchSpace); > > + SbiPlatform->firmware_context =3D (UINTN)FirmwareContext; > > + } > > + > > + return EFI_SUCCESS; > > +} > > -- > > 2.26.1 > > > > > >=20 > >