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charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: Sunil V L [mailto:sunilvl@ventanamicro.com] > Sent: Monday, October 4, 2021 7:02 PM > To: Schaefer, Daniel > Cc: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist) > ; Leif Lindholm > Subject: Re: [PATCH v1 4/5] U540: BuildCpuHob with 48 to indicate size > memory space >=20 > On Mon, Oct 04, 2021 at 01:23:58AM +0800, Daniel Schaefer wrote: > > Otherwise it will crash on QEMU 6.0 with: > > > > > Loading driver at 0x000BF814000 EntryPoint=3D0x000BF81428A > PciHostBridgeDxe.efi > > > InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF > BF351F98 > > > ProtectUefiImageCommon - 0xBF365BC0 > > > - 0x00000000BF814000 - 0x00000000000124C0 > > > PROGRESS CODE: V03040002 I0 > > > ProcessPciHost: Config[0x30000000+0x10000000) Bus[0x0..0xFF] > Io[0x0+0x10000)@0x3000000 Mem32[0x40000000+0x40000000)@0x0 > Mem64[0x400000000+0x400000000)@0x0 > > > CpuSetMemoryAttributes: Set memory attributes not supported yet > > > CpuSetMemoryAttributes: Set memory attributes not supported yet > > > RootBridge: PciRoot(0x0) > > > Support/Attr: 70001 / 70001 > > > DmaAbove4G: Yes > > > NoExtConfSpace: No > > > AllocAttr: 3 (CombineMemPMem Mem64Decode) > > > Bus: 0 - FF Translation=3D0 > > > Io: 0 - FFFF Translation=3D0 > > > Mem: 40000000 - 7FFFFFFF Translation=3D0 > > > MemAbove4G: 400000000 - 7FFFFFFFF Translation=3D0 > > > PMem: FFFFFFFFFFFFFFFF - 0 Translation=3D0 > > > PMemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=3D0 > > > CpuSetMemoryAttributes: Set memory attributes not supported yet > > > > > > ASSERT_EFI_ERROR (Status =3D Not Found) > > > ASSERT [PciHostBridgeDxe] > /edk2/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c(332): !EFI > _ERROR (CheckStatus) > > > QEMU: Terminated > > > > Change works on QEMU 5.2 and 6.0. > > > > Cc: Abner Chang > > Cc: Sunil V L > > Cc: Leif Lindholm > > > > Signed-off-by: Daniel Schaefer > > --- > > > Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universa > l/Pei/PlatformPei/Platform.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git > a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Univer > sal/Pei/PlatformPei/Platform.c > b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Univer > sal/Pei/PlatformPei/Platform.c > > index 6641e10f2e..9a2cb9413c 100644 > > --- > a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Univer > sal/Pei/PlatformPei/Platform.c > > +++ > b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Univer > sal/Pei/PlatformPei/Platform.c > > @@ -1,7 +1,7 @@ > > /**@file > > Platform PEI driver > > > > - Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All r= ights > reserved.
> > + Copyright (c) 2019-2021, Hewlett Packard Enterprise Development LP. = All > rights reserved.
> > Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved. > > Copyright (c) 2011, Andrei Warkentin > > > > @@ -199,7 +199,7 @@ MiscInitialization ( > > // of IO space. (Side note: unlike other HOBs, the CPU HOB is needed > during > > // S3 resume as well, so we build it unconditionally.) > > // > > - BuildCpuHob (32, 32); > > + BuildCpuHob (48, 32); >=20 > This is fine for now. But I think this should be found dynamically > instead of hard coding. Do you know if there is any way in RISC-V to > find out the physical address bits implemented? I am thinking some thing > similar to ArmGetPhysicalAddressBits(). We don't have dynamic way to get this information yet. Maybe DT has the in= formation of addressable bits, otherwise we have to wait until config-stru= cture to be implemented in the HART for the dynamically discovery. Or create something like ArmGetPhysicalAddressBits as the platform level li= brary later. Thanks Abner >=20 > Otherwise, looks fine to me. >=20 > Reviewed-by: Sunil V L >=20 > Thanks > Sunil > > } > > > > /** > > -- > > 2.33.0 > >