From: "Cohen, Eugene" <eugene@hp.com>
To: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
"Yao, Jiewen" <jiewen.yao@intel.com>,
"Zhang, Chao B" <chao.b.zhang@intel.com>
Cc: "Bin, Sung-Uk (빈성욱)" <sunguk-bin@hp.com>
Subject: [PATCH 2/4] SecurityPkg: introduce TpmIoLib to abstract TPM IO access
Date: Tue, 13 Nov 2018 22:12:38 +0000 [thread overview]
Message-ID: <CS1PR8401MB11890A5FD1245649A98C40EFB4C20@CS1PR8401MB1189.NAMPRD84.PROD.OUTLOOK.COM> (raw)
SecurityPkg: introduce TpmIoLib to abstract TPM IO access
Contributed-under: TianoCore Contribution Agreement 1.1
Cc: Chao Zhang <chao.b.zhang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Eugene Cohen <eugene@hp.com>
---
SecurityPkg/Include/Library/TpmIoLib.h | 196 ++++++++++++++++++++
1 file changed, 196 insertions(+)
diff --git a/SecurityPkg/Include/Library/TpmIoLib.h b/SecurityPkg/Include/Library/TpmIoLib.h
new file mode 100644
index 0000000..aaf0f0c
--- /dev/null
+++ b/SecurityPkg/Include/Library/TpmIoLib.h
@@ -0,0 +1,196 @@
+/** @file
+ This library is to abstract TPM2 register accesses so that a common
+ interface can be used for multiple underlying busses such as TPM,
+ SPI, or I2C access.
+
+Copyright (c) 2018 HP Development Company, L.P.
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _TPM_IO_LIB_H_
+#define _TPM_IO_LIB_H_
+
+#include <Base.h>
+
+
+/**
+ Reads an 8-bit TPM register.
+
+ Reads the 8-bit TPM register specified by Address. The 8-bit read value is
+ returned. This function must guarantee that all TPM read and write
+ operations are serialized.
+
+ If 8-bit TPM register operations are not supported, then ASSERT().
+
+ @param Address The TPM register to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+TpmRead8 (
+ IN UINTN Address
+ );
+
+/**
+ Writes an 8-bit TPM register.
+
+ Writes the 8-bit TPM register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all TPM read
+ and write operations are serialized.
+
+ If 8-bit TPM register operations are not supported, then ASSERT().
+
+ @param Address The TPM register to write.
+ @param Value The value to write to the TPM register.
+
+ @return Value.
+
+**/
+UINT8
+EFIAPI
+TpmWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ );
+
+/**
+ Reads a 16-bit TPM register.
+
+ Reads the 16-bit TPM register specified by Address. The 16-bit read value is
+ returned. This function must guarantee that all TPM read and write
+ operations are serialized.
+
+ If 16-bit TPM register operations are not supported, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address The TPM register to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+TpmRead16 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 16-bit TPM register.
+
+ Writes the 16-bit TPM register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all TPM read
+ and write operations are serialized.
+
+ If 16-bit TPM register operations are not supported, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address The TPM register to write.
+ @param Value The value to write to the TPM register.
+
+ @return Value.
+
+**/
+UINT16
+EFIAPI
+TpmWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a 32-bit TPM register.
+
+ Reads the 32-bit TPM register specified by Address. The 32-bit read value is
+ returned. This function must guarantee that all TPM read and write
+ operations are serialized.
+
+ If 32-bit TPM register operations are not supported, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address The TPM register to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+TpmRead32 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 32-bit TPM register.
+
+ Writes the 32-bit TPM register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all TPM read
+ and write operations are serialized.
+
+ If 32-bit TPM register operations are not supported, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address The TPM register to write.
+ @param Value The value to write to the TPM register.
+
+ @return Value.
+
+**/
+UINT32
+EFIAPI
+TpmWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ );
+
+
+/**
+ Reads a 64-bit TPM register.
+
+ Reads the 64-bit TPM register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all TPM read and write
+ operations are serialized.
+
+ If 64-bit TPM register operations are not supported, then ASSERT().
+ If Address is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param Address The TPM register to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+TpmRead64 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 64-bit TPM register.
+
+ Writes the 64-bit TPM register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all TPM read
+ and write operations are serialized.
+
+ If 64-bit TPM register operations are not supported, then ASSERT().
+ If Address is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param Address The TPM register to write.
+ @param Value The value to write to the TPM register.
+
+**/
+UINT64
+EFIAPI
+TpmWrite64 (
+ IN UINTN Address,
+ IN UINT64 Value
+ );
+
+#endif
--
2.7.4
reply other threads:[~2018-11-13 22:12 UTC|newest]
Thread overview: [no followups] expand[flat|nested] mbox.gz Atom feed
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CS1PR8401MB11890A5FD1245649A98C40EFB4C20@CS1PR8401MB1189.NAMPRD84.PROD.OUTLOOK.COM \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox