From: "Cohen, Eugene" <eugene@hp.com>
To: Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Ashish Singhal <ashishsingha@nvidia.com>
Cc: "Wu, Hao A" <hao.a.wu@intel.com>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
"Kim, Sangwoo (김상우 SW1Lab.)" <sangwoo.kim@hp.com>
Subject: Re: [PATCH] MdeModulePkg/SdMmcPciHcDxe: Fix DMA on SDHC v3 64-bit systems
Date: Fri, 1 Mar 2019 10:54:53 +0000 [thread overview]
Message-ID: <CS1PR8401MB11895553E1065BE65BA6DB87B4760@CS1PR8401MB1189.NAMPRD84.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <CAKv+Gu_sHQ7nDJY90pTAN9vSUeL-OL59X4CGmqjMzNCixoAOvQ@mail.gmail.com>
Ard,
> So before these changes, we were in the exact same situation, but since PC
> platforms never enable DMA above 4 GB in the first place, nobody ever
> noticed until we started running this code on arm64 platforms that have no
> 32-bit addressable DRAM to begin with.
Interesting - I did not realize that there were designs that were crazy enough to have no addressable DRAM below 4G.
> The obvious conclusion is that the driver should not set the
> EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute if the device does
> not support it, or, which seems to be our case, if the driver does not
> implement the 64-bit DMA mode that the driver does support. However,
> since there are platforms for which bounce buffering is not an option (since
> there is no 32-bit addressable memory to bounce to), this is not just a
> performance optimization, and so it would be useful to fix the code so it can
> drive all 64-bit DMA capable hardware.
Okay, that's a great reason - let's get V3 64b ADMA2 in!
Any objection to committing the original patch in the short term?
Thanks,
Eugene
next prev parent reply other threads:[~2019-03-01 10:54 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-27 10:58 [PATCH] MdeModulePkg/SdMmcPciHcDxe: Fix DMA on SDHC v3 64-bit systems Cohen, Eugene
2019-02-28 3:24 ` Wu, Hao A
2019-02-28 11:23 ` Cohen, Eugene
2019-02-28 19:15 ` Ashish Singhal
2019-02-28 19:56 ` Cohen, Eugene
2019-02-28 21:27 ` Ashish Singhal
2019-02-28 21:58 ` Cohen, Eugene
2019-02-28 22:20 ` Ashish Singhal
2019-02-28 22:40 ` Cohen, Eugene
2019-02-28 23:58 ` Ashish Singhal
2019-03-01 0:10 ` Cohen, Eugene
2019-03-01 0:19 ` Ashish Singhal
2019-03-01 10:32 ` Ard Biesheuvel
2019-03-01 10:34 ` Ard Biesheuvel
2019-03-01 10:54 ` Cohen, Eugene [this message]
2019-03-01 11:38 ` Ard Biesheuvel
2019-03-01 12:31 ` Ashish Singhal
2019-03-01 18:31 ` Ashish Singhal
2019-03-01 15:25 ` Ashish Singhal
2019-03-04 2:39 ` Wu, Hao A
2019-03-04 4:00 ` Ashish Singhal
2019-03-04 4:26 ` Wu, Hao A
2019-03-05 11:58 ` Cohen, Eugene
2019-03-01 11:02 ` Cohen, Eugene
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