From: "Abner Chang" <abner.chang@hpe.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
"Chang, Abner (HPS SW/FW Technologist)" <abner.chang@hpe.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>,
Liming Gao <liming.gao@intel.com>
Subject: Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 04/29] MdePkg: RISC-V RV64 binding in MdePkg
Date: Tue, 24 Sep 2019 01:52:35 +0000 [thread overview]
Message-ID: <CS1PR8401MB119204690CB2E3D0BC2E7C61FF840@CS1PR8401MB1192.NAMPRD84.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <15C6EB9824DD2A88.29693@groups.io>
CC maintainers.
> -----Original Message-----
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Abner Chang
> Sent: Monday, September 23, 2019 8:31 AM
> To: devel@edk2.groups.io
> Cc: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>
> Subject: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 04/29] MdePkg:
> RISC-V RV64 binding in MdePkg
>
> Add RISCV64 sections in MdePkg.dec and RISCV64 ProcessorBind.h
>
> Signed-off-by: Abner Chang <abner.chang@hpe.com>
> ---
> MdePkg/Include/RiscV64/ProcessorBind.h | 173
> +++++++++++++++++++++++++++++++++
> MdePkg/MdePkg.dec | 5 +-
> 2 files changed, 177 insertions(+), 1 deletion(-) create mode 100644
> MdePkg/Include/RiscV64/ProcessorBind.h
>
> diff --git a/MdePkg/Include/RiscV64/ProcessorBind.h
> b/MdePkg/Include/RiscV64/ProcessorBind.h
> new file mode 100644
> index 0000000..c3d4ef7
> --- /dev/null
> +++ b/MdePkg/Include/RiscV64/ProcessorBind.h
> @@ -0,0 +1,173 @@
> +/** @file
> + Processor or Compiler specific defines and types for RISC-V
> +
> + Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP.
> + All rights reserved.<BR>
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef __PROCESSOR_BIND_H__
> +#define __PROCESSOR_BIND_H__
> +
> +///
> +/// Define the processor type so other code can make processor based
> +choices /// #define MDE_CPU_RISCV64
> +
> +//
> +// Make sure we are using the correct packing rules per EFI
> +specification // #if !defined(__GNUC__) #pragma pack() #endif
> +
> +///
> +/// 8-byte unsigned value
> +///
> +typedef unsigned long long UINT64 __attribute__ ((aligned (8))); ///
> +/// 8-byte signed value ///
> +typedef long long INT64 __attribute__ ((aligned (8)));
> +///
> +/// 4-byte unsigned value
> +///
> +typedef unsigned int UINT32 __attribute__ ((aligned (4)));
> +///
> +/// 4-byte signed value
> +///
> +typedef int INT32 __attribute__ ((aligned (4)));
> +///
> +/// 2-byte unsigned value
> +///
> +typedef unsigned short UINT16 __attribute__ ((aligned (2)));
> +///
> +/// 2-byte Character. Unless otherwise specified all strings are
> +stored in the /// UTF-16 encoding format as defined by Unicode 2.1 and
> ISO/IEC 10646 standards.
> +///
> +typedef unsigned short CHAR16 __attribute__ ((aligned (2)));
> +///
> +/// 2-byte signed value
> +///
> +typedef short INT16 __attribute__ ((aligned (2)));
> +///
> +/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for
> +TRUE. Other /// values are undefined.
> +///
> +typedef unsigned char BOOLEAN;
> +///
> +/// 1-byte unsigned value
> +///
> +typedef unsigned char UINT8;
> +///
> +/// 1-byte Character
> +///
> +typedef char CHAR8;
> +///
> +/// 1-byte signed value
> +///
> +typedef signed char INT8;
> +///
> +/// Unsigned value of native width. (4 bytes on supported 32-bit
> +processor instructions, /// 8 bytes on supported 64-bit processor
> +instructions) /// typedef UINT64 UINTN __attribute__ ((aligned (8)));
> +/// /// Signed value of native width. (4 bytes on supported 32-bit
> +processor instructions, /// 8 bytes on supported 64-bit processor
> +instructions) ///
> +typedef INT64 INTN __attribute__ ((aligned (8)));
> +
> +//
> +// Processor specific defines
> +//
> +
> +///
> +/// A value of native width with the highest bit set.
> +///
> +#define MAX_BIT 0x8000000000000000ULL
> +///
> +/// A value of native width with the two highest bits set.
> +///
> +#define MAX_2_BITS 0xC000000000000000ULL
> +
> +///
> +/// Maximum legal RV64 address
> +///
> +#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL
> +
> +///
> +/// Maximum usable address at boot time (48 bits using 4 KB pages in
> +Supervisor mode) ///
> +#define MAX_ALLOC_ADDRESS 0xFFFFFFFFFFFFULL
> +
> +///
> +/// Maximum legal RISC-V INTN and UINTN values.
> +///
> +#define MAX_INTN ((INTN)0x7FFFFFFFFFFFFFFFULL)
> +#define MAX_UINTN ((UINTN)0xFFFFFFFFFFFFFFFFULL)
> +
> +///
> +/// The stack alignment required for RISC-V ///
> +#define CPU_STACK_ALIGNMENT 16
> +
> +///
> +/// Page allocation granularity for RISC-V ///
> +#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
> +#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000)
> +
> +//
> +// Modifier to ensure that all protocol member functions and EFI
> +intrinsics // use the correct C calling convention. All protocol member
> +functions and // EFI intrinsics are required to modify their member
> functions with EFIAPI.
> +//
> +#ifdef EFIAPI
> + ///
> + /// If EFIAPI is already defined, then we use that definition.
> + ///
> +#elif defined(__GNUC__)
> + ///
> + /// Define the standard calling convention regardless of optimization
> +level
> + /// The GCC support assumes a GCC compiler that supports the EFI ABI.
> +The EFI
> + /// ABI is much closer to the x64 Microsoft* ABI than standard x64
> +(x86-64)
> + /// GCC ABI. Thus a standard x64 (x86-64) GCC compiler can not be
> +used for
> + /// x64. Warning the assembly code in the MDE x64 does not follow the
> +correct
> + /// ABI for the standard x64 (x86-64) GCC.
> + ///
> + #define EFIAPI
> +#else
> + ///
> + /// The default for a non Microsoft* or GCC compiler is to assume the
> +EFI ABI
> + /// is the standard.
> + ///
> + #define EFIAPI
> +#endif
> +
> +#if defined(__GNUC__)
> + ///
> + /// For GNU assembly code, .global or .globl can declare global symbols.
> + /// Define this macro to unify the usage.
> + ///
> + #define ASM_GLOBAL .globl
> +#endif
> +
> +/**
> + Return the pointer to the first instruction of a function given a function
> pointer.
> + On x64 CPU architectures, these two pointer values are the same,
> + so the implementation of this macro is very simple.
> +
> + @param FunctionPointer A pointer to a function.
> +
> + @return The pointer to the first instruction of a function given a function
> pointer.
> +
> +**/
> +#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID
> +*)(UINTN)(FunctionPointer)
> +
> +#ifndef __USER_LABEL_PREFIX__
> +#define __USER_LABEL_PREFIX__
> +#endif
> +
> +#endif
> diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index
> 3fd7d16..1aaa97d 100644
> --- a/MdePkg/MdePkg.dec
> +++ b/MdePkg/MdePkg.dec
> @@ -6,7 +6,7 @@
> #
> # Copyright (c) 2007 - 2019, Intel Corporation. All rights reserved.<BR> #
> Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> -# (C)
> Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
> +# (C) Copyright 2016 - 2019 Hewlett Packard Enterprise Development
> +LP<BR>
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -39,6 +39,9 @@
> [Includes.AARCH64]
> Include/AArch64
>
> +[Includes.RISCV64]
> + Include/RiscV64
> +
> [LibraryClasses]
> ## @libraryclass Provides most usb APIs to support the Hid requests
> defined in Usb Hid 1.1 spec
> # and the standard requests defined in Usb 1.1 spec.
> --
> 2.7.4
>
>
>
next prev parent reply other threads:[~2019-09-24 1:52 UTC|newest]
Thread overview: 108+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-23 0:31 [edk2-staging/RISC-V-V2 PATCH v2 00/29] RISC-V EDK2 Port on Abner Chang
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 01/29] RiscVPkg: RISC-V processor package Abner Chang
2019-09-26 22:26 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 02/29] RiscVPkg/Include: Add header files of RISC-V CPU package Abner Chang
2019-09-26 22:29 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 03/29] RiscVPkg/opensbi: EDK2 RISC-V OpenSBI support Abner Chang
2019-09-26 22:41 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 04/29] MdePkg: RISC-V RV64 binding in MdePkg Abner Chang
2019-09-26 22:44 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 05/29] MdePkg/Include: RISC-V definitions Abner Chang
2019-09-26 22:45 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 06/29] MdeModulePkg/CapsuleRuntimeDxe: Add RISCV64 arch Abner Chang
2019-09-26 22:46 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 07/29] MdePkg/BaseLib: BaseLib for RISC-V RV64 Processor Abner Chang
2019-09-26 22:56 ` [edk2-devel] " Leif Lindholm
2019-10-14 16:47 ` Abner Chang
2019-10-14 18:23 ` Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 08/29] MdePkg/BaseCacheMaintenanceLib: RISC-V cache maintenance implementation Abner Chang
2019-10-01 8:44 ` [edk2-devel] " Philippe Mathieu-Daudé
2019-09-23 0:31 ` Abner Chang
2019-09-26 23:30 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 09/29] MdePkg/BaseIoLibIntrinsic: RISC-V I/O intrinsic functions Abner Chang
2019-09-26 23:39 ` [edk2-devel] " Leif Lindholm
2019-10-01 8:49 ` Philippe Mathieu-Daudé
2019-10-01 9:07 ` Leif Lindholm
2019-10-02 1:30 ` Abner Chang
2019-10-02 9:13 ` Leif Lindholm
2019-10-02 16:14 ` Abner Chang
2019-10-02 16:27 ` Andrew Fish
2019-10-02 16:35 ` Leif Lindholm
2019-10-03 0:52 ` Abner Chang
2019-10-03 8:38 ` Leif Lindholm
2019-10-03 11:34 ` Abner Chang
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 10/29] MdePkg/BasePeCoff: Add RISC-V PE/Coff related code Abner Chang
2019-09-26 23:46 ` [edk2-devel] " Leif Lindholm
2019-10-15 4:02 ` Abner Chang
2019-10-15 10:31 ` Leif Lindholm
2019-10-15 10:56 ` Abner Chang
[not found] ` <15CDB6324F411B37.30896@groups.io>
2019-10-15 4:26 ` Abner Chang
2019-10-15 10:41 ` Leif Lindholm
2019-10-15 10:59 ` Abner Chang
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 11/29] MdePkg/BaseCpuLib: RISC-V Base CPU library implementation Abner Chang
2019-09-26 23:47 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 12/29] MdePkg/BaseSynchronizationLib: RISC-V cache related code Abner Chang
2019-09-27 0:19 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 13/29] MdeModulePkg/Logo Abner Chang
2019-09-30 22:51 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 14/29] NetworkPkg Abner Chang
2019-09-30 22:51 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 15/29] RiscVPkg/Library: RISC-V CPU library Abner Chang
2019-09-30 18:31 ` [edk2-devel] " Leif Lindholm
2019-10-15 2:32 ` Abner Chang
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 16/29] RiscVPkg/Library: Add RISC-V exception library Abner Chang
2019-09-30 19:15 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 17/29] RiscVPkg/Library: Add RISC-V timer library Abner Chang
2019-09-30 19:46 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 18/29] RiscVPkg/Library: Add EDK2 RISC-V OpenSBI library Abner Chang
2019-09-30 20:03 ` [edk2-devel] " Leif Lindholm
2019-10-15 1:21 ` Abner Chang
2019-10-15 8:35 ` Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 19/29] RiscVPkg/Library: RISC-V platform level DxeIPL libraries Abner Chang
2019-09-30 20:15 ` [edk2-devel] " Leif Lindholm
2019-09-30 20:44 ` Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 20/29] MdeModulePkg/DxeIplPeim : RISC-V platform level DxeIPL Abner Chang
2019-09-30 20:31 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 21/29] RiscVPkg/PeiServicesTablePointerLibOpenSbi: RISC-V PEI Service Table Pointer library Abner Chang
2019-09-30 20:54 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 22/29] RiscVPkg/RiscVPlatformTempMemoryInit: RISC-V Platform Temporary Memory library Abner Chang
2019-09-30 20:56 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 23/29] RiscVPkg/CpuDxe: Add RISC-V CPU DXE driver Abner Chang
2019-09-30 21:11 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 24/29] BaseTools: BaseTools changes for RISC-V platform Abner Chang
2019-09-26 22:09 ` [edk2-devel] " Leif Lindholm
2019-10-15 6:18 ` Abner Chang
2019-10-15 10:56 ` Leif Lindholm
2019-10-15 11:13 ` Abner Chang
2019-10-16 5:06 ` Abner Chang
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 25/29] BaseTools/Scripts Abner Chang
2019-09-26 20:50 ` [edk2-devel] " Leif Lindholm
2019-10-15 6:31 ` Abner Chang
2019-10-15 11:00 ` Leif Lindholm
2019-10-15 11:03 ` Abner Chang
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 26/29] RiscVPkg/SmbiosDxe: Generic SMBIOS DXE driver for RISC-V platforms Abner Chang
2019-09-30 22:39 ` [edk2-devel] " Leif Lindholm
2019-10-14 11:27 ` Abner Chang
2019-10-14 11:56 ` Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 27/29] edk2-staging/RISC-V-V2: Add submodule Abner Chang
2019-09-26 22:24 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 28/29] edk2-staging/RISC-V-V2: Add ReadMe Abner Chang
2019-09-30 22:48 ` [edk2-devel] " Leif Lindholm
2019-09-23 0:31 ` [edk2-staging/RISC-V-V2 PATCH v2 29/29] edk2-staging: Update Maintainers.txt Abner Chang
2019-09-30 22:50 ` [edk2-devel] " Leif Lindholm
[not found] ` <15C6EB9824DD2A88.29693@groups.io>
2019-09-24 1:52 ` Abner Chang [this message]
[not found] ` <15C6EB994C26E5C4.2053@groups.io>
2019-09-24 1:52 ` [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 05/29] MdePkg/Include: RISC-V definitions Abner Chang
[not found] ` <15C6EB9950232DB5.29693@groups.io>
2019-09-24 1:53 ` [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 07/29] MdePkg/BaseLib: BaseLib for RISC-V RV64 Processor Abner Chang
[not found] ` <15C6EB9A049FF8A4.24160@groups.io>
2019-09-24 1:54 ` [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 09/29] MdePkg/BaseIoLibIntrinsic: RISC-V I/O intrinsic functions Abner Chang
[not found] ` <15C6EB9B3E887BEB.29693@groups.io>
2019-09-24 1:55 ` [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 13/29] MdeModulePkg/Logo Abner Chang
[not found] ` <15C6EB9A40C408A0.24160@groups.io>
2019-09-24 1:56 ` [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 10/29] MdePkg/BasePeCoff: Add RISC-V PE/Coff related code Abner Chang
[not found] ` <15C6EB9B872A5B83.24160@groups.io>
2019-09-24 1:57 ` [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 14/29] NetworkPkg Abner Chang
[not found] ` <15C6EB99CBC780B5.2053@groups.io>
2019-09-24 1:57 ` [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 08/29] MdePkg/BaseCacheMaintenanceLib: RISC-V cache maintenance implementation Abner Chang
[not found] ` <15C6EB9A9BD83853.2053@groups.io>
2019-09-24 1:58 ` [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 11/29] MdePkg/BaseCpuLib: RISC-V Base CPU library implementation Abner Chang
[not found] ` <15C6EB9AEB7BB057.24160@groups.io>
2019-09-24 1:58 ` [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 12/29] MdePkg/BaseSynchronizationLib: RISC-V cache related code Abner Chang
[not found] ` <15C6EB99608359A3.24160@groups.io>
2019-09-24 1:59 ` [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 08/29] MdePkg/BaseCacheMaintenanceLib: RISC-V cache maintenance implementation Abner Chang
[not found] ` <15C6EB9D6C0EC3B0.29693@groups.io>
2019-09-24 2:00 ` [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 20/29] MdeModulePkg/DxeIplPeim : RISC-V platform level DxeIPL Abner Chang
[not found] ` <15C6EB98AD6CCCEB.24160@groups.io>
2019-09-24 2:01 ` [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 06/29] MdeModulePkg/CapsuleRuntimeDxe: Add RISCV64 arch Abner Chang
[not found] ` <15C6EB9F04387439.29693@groups.io>
2019-09-24 2:02 ` [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 25/29] BaseTools/Scripts Abner Chang
2019-09-26 22:22 ` [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 00/29] RISC-V EDK2 Port on Leif Lindholm
2019-10-15 6:39 ` Abner Chang
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