From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: hpe.com, ip: 148.163.143.35, mailfrom: prvs=01703bcc39=abner.chang@hpe.com) Received: from mx0b-002e3701.pphosted.com (mx0b-002e3701.pphosted.com [148.163.143.35]) by groups.io with SMTP; Mon, 23 Sep 2019 18:52:38 -0700 Received: from pps.filterd (m0134423.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x8O1qPEV003608 for ; Tue, 24 Sep 2019 01:52:37 GMT Received: from g2t2352.austin.hpe.com (g2t2352.austin.hpe.com [15.233.44.25]) by mx0b-002e3701.pphosted.com with ESMTP id 2v6vj646vx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 24 Sep 2019 01:52:37 +0000 Received: from G4W9120.americas.hpqcorp.net (exchangepmrr1.us.hpecorp.net [16.210.21.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by g2t2352.austin.hpe.com (Postfix) with ESMTPS id DB101A3 for ; Tue, 24 Sep 2019 01:52:36 +0000 (UTC) Received: from G4W9119.americas.hpqcorp.net (2002:10d2:14d6::10d2:14d6) by G4W9120.americas.hpqcorp.net (2002:10d2:150f::10d2:150f) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Tue, 24 Sep 2019 01:52:36 +0000 Received: from NAM02-SN1-obe.outbound.protection.outlook.com (15.241.52.11) by G4W9119.americas.hpqcorp.net (16.210.20.214) with Microsoft SMTP Server (TLS) id 15.0.1367.3 via Frontend Transport; Tue, 24 Sep 2019 01:52:36 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=fF9XWnQm/EZniF4QwLqGzMPDspKU83qTxONmCCs2XEAxjmbAWGyA92sfrmIRo8bzMQUWNZrphHoQQ5+dd3sfNcKgQJ7q+gCrFz9tehUMwcMwqQNtO60KQBGhReFWzX7tE9F3+4fox83x4di8uUvSmkimSp8MUUbeKKiEc/My/RBy+MA/brAQCHZvOTScKqaG2yR4rKLlqnJGCBSyot1rb3eA2L05RtauGrKrOW6YO5kMXewHPxXFr94UlqYqZQO0WKsTMnVZwo3k46ltVKmdYFMZ4BY0e4StBgK7KDxtpYLDeAzqFa7EMUo6jiptCOxZvONVRr6hFMDrbcEI7cDL/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=y0K869UHHQz9gHoyQYDm1rabDozyQC0wY2BqpEMKV4s=; b=IpwCpByBQztzkwK0zNimC98Kw/bnvoLSCKWFfPGKDKvEEoHQ+xUIgFj2wU9Ot6aETeB4z+iMxSPoj476KMxft2hTt9z1zcc35bfLxu8wB54BPzWEOUCf4FsMPsAO8jIyJudvycuTm6Ge4Kt4dfmfVUsJ9c5D0k+UkIzWom+PapIekxTPDoobU3JlEZiZvkK+qumrCAGeB/gNn3SzKO3pBTWvo2j7DqNwCqTARLQGLkgtW7q0M1A1ZHViT7ffvIw03VsAlL8U+HD3RsiwJCDYrL7cwV0ZKc5WBnXo/Mh6iYaOsGKyJdjYDTb2VrePT3A0ByPvpXUtuLanqx1fDaEvJw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=hpe.com; dmarc=pass action=none header.from=hpe.com; dkim=pass header.d=hpe.com; arc=none Received: from CS1PR8401MB1192.NAMPRD84.PROD.OUTLOOK.COM (10.169.12.151) by CS1PR8401MB0983.NAMPRD84.PROD.OUTLOOK.COM (10.169.16.18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2284.26; Tue, 24 Sep 2019 01:52:35 +0000 Received: from CS1PR8401MB1192.NAMPRD84.PROD.OUTLOOK.COM ([fe80::4fb:84b9:76e6:1cde]) by CS1PR8401MB1192.NAMPRD84.PROD.OUTLOOK.COM ([fe80::4fb:84b9:76e6:1cde%8]) with mapi id 15.20.2284.023; Tue, 24 Sep 2019 01:52:35 +0000 From: "Abner Chang" To: "devel@edk2.groups.io" , "Chang, Abner (HPS SW/FW Technologist)" CC: Michael D Kinney , Liming Gao Subject: Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 04/29] MdePkg: RISC-V RV64 binding in MdePkg Thread-Topic: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 04/29] MdePkg: RISC-V RV64 binding in MdePkg Thread-Index: AQHVcaqfO7dSgni4vUuIn3ONbaHuqKc6EgpQ Date: Tue, 24 Sep 2019 01:52:35 +0000 Message-ID: References: <1569198715-31552-1-git-send-email-abner.chang@hpe.com> <15C6EB9824DD2A88.29693@groups.io> In-Reply-To: <15C6EB9824DD2A88.29693@groups.io> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [16.242.247.131] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 028f7725-954f-4565-aa2b-08d74091df0c x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(5600167)(711020)(4605104)(1401327)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7193020);SRVR:CS1PR8401MB0983; x-ms-traffictypediagnostic: CS1PR8401MB0983: x-ms-exchange-purlcount: 1 x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:541; x-forefront-prvs: 0170DAF08C x-forefront-antispam-report: SFV:NSPM;SFS:(10019020)(376002)(366004)(396003)(136003)(39860400002)(346002)(199004)(189003)(13464003)(2906002)(71200400001)(9686003)(71190400001)(229853002)(52536014)(110136005)(99286004)(14454004)(45080400002)(316002)(66066001)(478600001)(5660300002)(966005)(256004)(86362001)(6116002)(26005)(6246003)(4326008)(74316002)(102836004)(54906003)(25786009)(8936002)(81156014)(486006)(476003)(81166006)(33656002)(66556008)(446003)(6436002)(11346002)(8676002)(305945005)(66946007)(3846002)(2501003)(76176011)(6306002)(19627235002)(7696005)(14444005)(76116006)(66476007)(7736002)(53546011)(6506007)(55016002)(186003)(64756008)(66446008);DIR:OUT;SFP:1102;SCL:1;SRVR:CS1PR8401MB0983;H:CS1PR8401MB1192.NAMPRD84.PROD.OUTLOOK.COM;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: hpe.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: mMYosDVqbMiF3Fk12Flrjg8uR0Kv2/sF0uHRoMyJds5NUB0JXnlo2UhdBwEYtpMngWuX/1GV1ZLcVnAPGfNwyQenblx7k3bHWlqXuLcfV7rhYbtixysf8S1rDPgPVAV2RCJuN1j1pIy5dn+RjiMZvZ1SpR8Fb9SOrtMVL1Eqts8IUodQbypkEV3lzOko1JM/ek9m8i4XSXLUtDfkTc7j7ZuTRhAFXAb9nhCGqO/rXPCjWusvvzv4OSa1wvFnpchirxuYYzdxgyRBVvgkIbngQdqdl5G/Xcayu/WVEpUFUHz7c+sEUqrWHjjzLV4pBiC1v3oxgfaN7sxf1WjyAif4wIgw6Z2Q8gI4z1gc+6tBOQvzSH1W3m4ZOubOP0fv155dmuEHwaAd4Jfn3UGFbJYVsaw9HTTxB0IwRLosewPboYQ= X-MS-Exchange-CrossTenant-Network-Message-Id: 028f7725-954f-4565-aa2b-08d74091df0c X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Sep 2019 01:52:35.1259 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 105b2061-b669-4b31-92ac-24d304d195dc X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 0z6lzmP5xE63MUvPqluiPKFJ+kBlWhg2iUz6wgP/wHIFLAw5FYuC81W9N0/C56SnZ0Lz205VU04p6Wkd92unLw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CS1PR8401MB0983 X-OriginatorOrg: hpe.com X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-09-23_10:2019-09-23,2019-09-23 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 malwarescore=0 spamscore=0 mlxlogscore=999 phishscore=0 impostorscore=0 suspectscore=0 bulkscore=0 clxscore=1015 mlxscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1908290000 definitions=main-1909240017 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable CC maintainers. > -----Original Message----- > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of > Abner Chang > Sent: Monday, September 23, 2019 8:31 AM > To: devel@edk2.groups.io > Cc: Chang, Abner (HPS SW/FW Technologist) > Subject: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 04/29] MdePkg: > RISC-V RV64 binding in MdePkg >=20 > Add RISCV64 sections in MdePkg.dec and RISCV64 ProcessorBind.h >=20 > Signed-off-by: Abner Chang > --- > MdePkg/Include/RiscV64/ProcessorBind.h | 173 > +++++++++++++++++++++++++++++++++ > MdePkg/MdePkg.dec | 5 +- > 2 files changed, 177 insertions(+), 1 deletion(-) create mode 100644 > MdePkg/Include/RiscV64/ProcessorBind.h >=20 > diff --git a/MdePkg/Include/RiscV64/ProcessorBind.h > b/MdePkg/Include/RiscV64/ProcessorBind.h > new file mode 100644 > index 0000000..c3d4ef7 > --- /dev/null > +++ b/MdePkg/Include/RiscV64/ProcessorBind.h > @@ -0,0 +1,173 @@ > +/** @file > + Processor or Compiler specific defines and types for RISC-V > + > + Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. > + All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#ifndef __PROCESSOR_BIND_H__ > +#define __PROCESSOR_BIND_H__ > + > +/// > +/// Define the processor type so other code can make processor based > +choices /// #define MDE_CPU_RISCV64 > + > +// > +// Make sure we are using the correct packing rules per EFI > +specification // #if !defined(__GNUC__) #pragma pack() #endif > + > +/// > +/// 8-byte unsigned value > +/// > +typedef unsigned long long UINT64 __attribute__ ((aligned (8))); /// > +/// 8-byte signed value /// > +typedef long long INT64 __attribute__ ((aligned (8))); > +/// > +/// 4-byte unsigned value > +/// > +typedef unsigned int UINT32 __attribute__ ((aligned (4))); > +/// > +/// 4-byte signed value > +/// > +typedef int INT32 __attribute__ ((aligned (4))); > +/// > +/// 2-byte unsigned value > +/// > +typedef unsigned short UINT16 __attribute__ ((aligned (2))); > +/// > +/// 2-byte Character. Unless otherwise specified all strings are > +stored in the /// UTF-16 encoding format as defined by Unicode 2.1 and > ISO/IEC 10646 standards. > +/// > +typedef unsigned short CHAR16 __attribute__ ((aligned (2))); > +/// > +/// 2-byte signed value > +/// > +typedef short INT16 __attribute__ ((aligned (2))); > +/// > +/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for > +TRUE. Other /// values are undefined. > +/// > +typedef unsigned char BOOLEAN; > +/// > +/// 1-byte unsigned value > +/// > +typedef unsigned char UINT8; > +/// > +/// 1-byte Character > +/// > +typedef char CHAR8; > +/// > +/// 1-byte signed value > +/// > +typedef signed char INT8; > +/// > +/// Unsigned value of native width. (4 bytes on supported 32-bit > +processor instructions, /// 8 bytes on supported 64-bit processor > +instructions) /// typedef UINT64 UINTN __attribute__ ((aligned (8))); > +/// /// Signed value of native width. (4 bytes on supported 32-bit > +processor instructions, /// 8 bytes on supported 64-bit processor > +instructions) /// > +typedef INT64 INTN __attribute__ ((aligned (8))); > + > +// > +// Processor specific defines > +// > + > +/// > +/// A value of native width with the highest bit set. > +/// > +#define MAX_BIT 0x8000000000000000ULL > +/// > +/// A value of native width with the two highest bits set. > +/// > +#define MAX_2_BITS 0xC000000000000000ULL > + > +/// > +/// Maximum legal RV64 address > +/// > +#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL > + > +/// > +/// Maximum usable address at boot time (48 bits using 4 KB pages in > +Supervisor mode) /// > +#define MAX_ALLOC_ADDRESS 0xFFFFFFFFFFFFULL > + > +/// > +/// Maximum legal RISC-V INTN and UINTN values. > +/// > +#define MAX_INTN ((INTN)0x7FFFFFFFFFFFFFFFULL) > +#define MAX_UINTN ((UINTN)0xFFFFFFFFFFFFFFFFULL) > + > +/// > +/// The stack alignment required for RISC-V /// > +#define CPU_STACK_ALIGNMENT 16 > + > +/// > +/// Page allocation granularity for RISC-V /// > +#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000) > +#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000) > + > +// > +// Modifier to ensure that all protocol member functions and EFI > +intrinsics // use the correct C calling convention. All protocol member > +functions and // EFI intrinsics are required to modify their member > functions with EFIAPI. > +// > +#ifdef EFIAPI > + /// > + /// If EFIAPI is already defined, then we use that definition. > + /// > +#elif defined(__GNUC__) > + /// > + /// Define the standard calling convention regardless of optimization > +level > + /// The GCC support assumes a GCC compiler that supports the EFI ABI. > +The EFI > + /// ABI is much closer to the x64 Microsoft* ABI than standard x64 > +(x86-64) > + /// GCC ABI. Thus a standard x64 (x86-64) GCC compiler can not be > +used for > + /// x64. Warning the assembly code in the MDE x64 does not follow the > +correct > + /// ABI for the standard x64 (x86-64) GCC. > + /// > + #define EFIAPI > +#else > + /// > + /// The default for a non Microsoft* or GCC compiler is to assume the > +EFI ABI > + /// is the standard. > + /// > + #define EFIAPI > +#endif > + > +#if defined(__GNUC__) > + /// > + /// For GNU assembly code, .global or .globl can declare global symbo= ls. > + /// Define this macro to unify the usage. > + /// > + #define ASM_GLOBAL .globl > +#endif > + > +/** > + Return the pointer to the first instruction of a function given a fun= ction > pointer. > + On x64 CPU architectures, these two pointer values are the same, > + so the implementation of this macro is very simple. > + > + @param FunctionPointer A pointer to a function. > + > + @return The pointer to the first instruction of a function given a fu= nction > pointer. > + > +**/ > +#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID > +*)(UINTN)(FunctionPointer) > + > +#ifndef __USER_LABEL_PREFIX__ > +#define __USER_LABEL_PREFIX__ > +#endif > + > +#endif > diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index > 3fd7d16..1aaa97d 100644 > --- a/MdePkg/MdePkg.dec > +++ b/MdePkg/MdePkg.dec > @@ -6,7 +6,7 @@ > # > # Copyright (c) 2007 - 2019, Intel Corporation. All rights reserved. # > Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= -# (C) > Copyright 2016 Hewlett Packard Enterprise Development LP
> +# (C) Copyright 2016 - 2019 Hewlett Packard Enterprise Development > +LP
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -39,6 +39,9 @@ > [Includes.AARCH64] > Include/AArch64 >=20 > +[Includes.RISCV64] > + Include/RiscV64 > + > [LibraryClasses] > ## @libraryclass Provides most usb APIs to support the Hid requests > defined in Usb Hid 1.1 spec > # and the standard requests defined in Usb 1.1 spec. > -- > 2.7.4 >=20 >=20 >=20