Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 20/29] MdeModulePkg/DxeIplPeim : RISC-V platform level DxeIPL

["Abner Chang" <abner.chang@hpe.com>]

CC maintainer

> -----Original Message-----
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Abner Chang
> Sent: Monday, September 23, 2019 8:32 AM
> To: devel@edk2.groups.io
> Cc: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>
> Subject: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 20/29]
> MdeModulePkg/DxeIplPeim : RISC-V platform level DxeIPL
> 
> Implementation of RISC-V platform level DxeIPL
> 
> Signed-off-by: Abner Chang <abner.chang@hpe.com>
> ---
>  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf            | 13 +++-
>  MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c | 71
> ++++++++++++++++++++++
>  RiscVPkg/Include/Library/RiscVPlatformDxeIpl.h     | 41 +++++++++++++
>  3 files changed, 124 insertions(+), 1 deletion(-)  create mode 100644
> MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c
>  create mode 100644 RiscVPkg/Include/Library/RiscVPlatformDxeIpl.h
> 
> diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> index 98bc17f..5532323 100644
> --- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> +++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> @@ -7,6 +7,7 @@
>  #
>  #  Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>  #
> Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
> +#  Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development
> +LP. All rights reserved.<BR>
>  #
>  #  SPDX-License-Identifier: BSD-2-Clause-Patent  # @@ -25,7 +26,7 @@  #  #
> The following information is for reference only and not required by the build
> tools.
>  #
> -#  VALID_ARCHITECTURES           = IA32 X64 EBC (EBC is for build only)
> AARCH64
> +#  VALID_ARCHITECTURES           = IA32 X64 EBC (EBC is for build only)
> AARCH64 RISCV64
>  #
> 
>  [Sources]
> @@ -49,6 +50,9 @@
>  [Sources.ARM, Sources.AARCH64]
>    Arm/DxeLoadFunc.c
> 
> +[Sources.RISCV64]
> +  RiscV64/DxeLoadFunc.c
> +
>  [Packages]
>    MdePkg/MdePkg.dec
>    MdeModulePkg/MdeModulePkg.dec
> @@ -56,6 +60,9 @@
>  [Packages.ARM, Packages.AARCH64]
>    ArmPkg/ArmPkg.dec
> 
> +[Packages.RISCV64]
> +  RiscVPkg/RiscVPkg.dec
> +
>  [LibraryClasses]
>    PcdLib
>    MemoryAllocationLib
> @@ -75,6 +82,10 @@
>  [LibraryClasses.ARM, LibraryClasses.AARCH64]
>    ArmMmuLib
> 
> +[LibraryClasses.RISCV64]
> +  RiscVPlatformDxeIplLib
> +  RiscVOpensbiLib
> +
>  [Ppis]
>    gEfiDxeIplPpiGuid                      ## PRODUCES
>    gEfiPeiDecompressPpiGuid               ## PRODUCES
> diff --git a/MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c
> b/MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c
> new file mode 100644
> index 0000000..d3c7f9d
> --- /dev/null
> +++ b/MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c
> @@ -0,0 +1,71 @@
> +/** @file
> +  RISC-V specific functionality for DxeLoad.
> +
> +  Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP.
> + All rights reserved.<BR>
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "DxeIpl.h"
> +#include "Library/RiscVPlatformDxeIpl.h"
> +
> +typedef
> +VOID*
> +(EFIAPI *DXEENTRYPOINT) (
> +  IN  VOID *HobStart
> +  );
> +
> +/**
> +   Transfers control to DxeCore.
> +
> +   This function performs a CPU architecture specific operations to execute
> +   the entry point of DxeCore with the parameters of HobList.
> +   It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.
> +
> +   @param DxeCoreEntryPoint         The entry point of DxeCore.
> +   @param HobList                   The start of HobList passed to DxeCore.
> +
> +**/
> +VOID
> +HandOffToDxeCore (
> +  IN EFI_PHYSICAL_ADDRESS   DxeCoreEntryPoint,
> +  IN EFI_PEI_HOB_POINTERS   HobList
> +  )
> +{
> +  VOID                            *BaseOfStack;
> +  VOID                            *TopOfStack;
> +  EFI_STATUS                      Status;
> +  //
> +  //
> +  // Allocate 128KB for the Stack
> +  //
> +  BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
> +  ASSERT (BaseOfStack != NULL);
> +
> +  //
> +  // Compute the top of the stack we were allocated. Pre-allocate a
> + UINTN  // for safety.
> +  //
> +  TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES
> + (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);  TopOfStack =
> + ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
> +
> +  //
> +  // End of PEI phase signal
> +  //
> +  Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);
> + ASSERT_EFI_ERROR (Status);
> +
> +  //
> +  // Update the contents of BSP stack HOB to reflect the real stack info
> passed to DxeCore.
> +  //
> +  UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack,
> + STACK_SIZE);
> +
> +  DEBUG ((DEBUG_INFO, "DXE Core new stack at %x, stack pointer at
> + %x\n", BaseOfStack, TopOfStack));
> +
> +  //
> +  // Transfer the control to the entry point of DxeCore.
> +  //
> +  RiscVPlatformHandOffToDxeCore (BaseOfStack, TopOfStack,
> +DxeCoreEntryPoint, HobList); }
> +
> diff --git a/RiscVPkg/Include/Library/RiscVPlatformDxeIpl.h
> b/RiscVPkg/Include/Library/RiscVPlatformDxeIpl.h
> new file mode 100644
> index 0000000..4763397
> --- /dev/null
> +++ b/RiscVPkg/Include/Library/RiscVPlatformDxeIpl.h
> @@ -0,0 +1,41 @@
> +/** @file
> +  Header file of RISC-V platform DXE IPL
> +
> +  Copyright (c) 2019, Hewlett Packard Enterprise Development LP.All
> + rights reserved.<BR>
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent **/
> +
> +#ifndef _RISC_V_PLATFORM_DXEIPL_H_
> +#define _RISC_V_PLATFORM_DXEIPL_H_
> +
> +typedef struct {
> +  VOID *TopOfStack;
> +  VOID *BaseOfStack;
> +  EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint;
> +  EFI_PEI_HOB_POINTERS HobList;
> +} OPENSBI_SWITCH_MODE_CONTEXT;
> +
> +/**
> +   RISC-V platform DXE IPL to DXE core handoff process.
> +
> +   This function performs a CPU architecture specific operations to execute
> +   the entry point of DxeCore with the parameters of HobList.
> +   It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.
> +
> +   @param BaseOfStack        Base address of stack
> +   @param TopOfStack         Top address of stack
> +   @param DxeCoreEntryPoint  The entry point of DxeCore.
> +   @param HobList            The start of HobList passed to DxeCore.
> +
> +**/
> +
> +VOID
> +RiscVPlatformHandOffToDxeCore (
> +  IN VOID *BaseOfStack,
> +  IN VOID *TopOfStack,
> +  IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
> +  IN EFI_PEI_HOB_POINTERS HobList
> +  );
> +#endif
> +
> --
> 2.7.4
> 
> 
>