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Thread-Topic: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 12/29] MdePkg/BaseSynchronizationLib: RISC-V cache related code. Thread-Index: AQHVcaquybKjjOCe/0i8q+scgcHWtqc6E8Sg Date: Tue, 24 Sep 2019 01:58:40 +0000 Message-ID: References: <1569198715-31552-1-git-send-email-abner.chang@hpe.com> <15C6EB9AEB7BB057.24160@groups.io> In-Reply-To: <15C6EB9AEB7BB057.24160@groups.io> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [16.242.247.131] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 4c559d4c-27a2-492d-25b0-08d74092b892 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600167)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020);SRVR:CS1PR8401MB1319; x-ms-traffictypediagnostic: CS1PR8401MB1319: x-ms-exchange-purlcount: 1 x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:403; x-forefront-prvs: 0170DAF08C x-forefront-antispam-report: SFV:NSPM;SFS:(10019020)(396003)(136003)(39860400002)(366004)(376002)(346002)(13464003)(199004)(189003)(9686003)(5660300002)(99286004)(30864003)(76176011)(86362001)(26005)(102836004)(6506007)(7696005)(53546011)(3846002)(6116002)(71190400001)(186003)(81156014)(33656002)(8676002)(66946007)(81166006)(446003)(2906002)(476003)(66476007)(66446008)(64756008)(66556008)(2501003)(52536014)(71200400001)(486006)(11346002)(4326008)(6246003)(74316002)(966005)(8936002)(54906003)(76116006)(25786009)(14454004)(7736002)(110136005)(316002)(19627235002)(478600001)(66066001)(6436002)(229853002)(6306002)(256004)(55016002)(305945005);DIR:OUT;SFP:1102;SCL:1;SRVR:CS1PR8401MB1319;H:CS1PR8401MB1192.NAMPRD84.PROD.OUTLOOK.COM;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: hpe.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: V0tQfStehR2JSf0Esgursx2HW0XIm5oJGfOf5FPYGbplZ64FWUngh5V2Qn62hWAAKaHGb5jbZDte8cGYEyK4CX/jG3HkZPE3dvoeLLbhgUrZeBk/v0AJ+cYcPXX96bgGRItcK2BbkDSdqnfI15PCmvVObPCQrEITJQANM+aDHL4J2d+P+nbMms+FdQ4I+8fwjlg1nfpSJNCLX5O+T/Q64Y8BIcqAWC7CZLHf77yDHLYwRR9aieMBHLRet5tLW4eQSNT92M309VvT9JmMz4pM6Q3v0xkODP1naK50zsKR9j2RkFQ8jeK+rGuHT+R6NI54V4OqSZkFpXd2eKpf1xqfeOYaaBw4vL1QjYPmc5ukU+2Vq9ccanVHnruZHwX/5JpkG5mATDLu/Uz+y5la0JEqsukBz0Pq5enGG/SyeweaMLY= X-MS-Exchange-CrossTenant-Network-Message-Id: 4c559d4c-27a2-492d-25b0-08d74092b892 X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Sep 2019 01:58:40.0733 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 105b2061-b669-4b31-92ac-24d304d195dc X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: ZayAGTdD31d5G5n3RexV27/XXjJxWv/SCRWZDDY+k+Abd+NXpJvmL37QY0MXUoanFVSETiw2GstIezwNlkSZuA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CS1PR8401MB1319 X-OriginatorOrg: hpe.com X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-09-23_10:2019-09-23,2019-09-23 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 lowpriorityscore=0 clxscore=1015 impostorscore=0 suspectscore=0 phishscore=0 bulkscore=0 adultscore=0 mlxlogscore=818 malwarescore=0 spamscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1908290000 definitions=main-1909240018 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable CC maintainers > -----Original Message----- > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of > Abner Chang > Sent: Monday, September 23, 2019 8:32 AM > To: devel@edk2.groups.io > Cc: Chang, Abner (HPS SW/FW Technologist) > Subject: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 12/29] > MdePkg/BaseSynchronizationLib: RISC-V cache related code. >=20 > Support RISC-V cache related functions. >=20 > Signed-off-by: Abner Chang > --- > .../BaseSynchronizationLib.inf | 6 + > .../RiscV64/Synchronization.c | 183 ++++++++++++++= +++++++ > .../RiscV64/SynchronizationAsm.S | 78 +++++++++ > 3 files changed, 267 insertions(+) > create mode 100644 > MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.c > create mode 100644 > MdePkg/Library/BaseSynchronizationLib/RiscV64/SynchronizationAsm.S >=20 > diff --git > a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf > b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf > index 446bc19..c16ef9d 100755 > --- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf > +++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf > @@ -3,6 +3,7 @@ > # > # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved. # > Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> +# Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development > +LP. All rights reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -78,6 +79,11 @@ > AArch64/Synchronization.S | GCC > AArch64/Synchronization.asm | MSFT >=20 > +[Sources.RISCV64] > + Synchronization.c > + RiscV64/Synchronization.c | GCC > + RiscV64/SynchronizationAsm.S > + > [Packages] > MdePkg/MdePkg.dec >=20 > diff --git > a/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.c > b/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.c > new file mode 100644 > index 0000000..e210b74 > --- /dev/null > +++ b/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.c > @@ -0,0 +1,183 @@ > +/** @file > + Implementation of synchronization functions on RISC-V > + > + Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. > + All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent **/ > + > +#include > + > +UINT32 > +SyncCompareExchange32 ( > + IN volatile UINT32 *Value, > + IN UINT32 CompareValue, > + IN UINT32 ExchangeValue > +); > + > +UINT64 > +SyncCompareExchange64 ( > + IN volatile UINT64 *Value, > + IN UINT64 CompareValue, > + IN UINT64 ExchangeValue > +); > + > +UINT32 > +SyncSyncIncrement32 ( > + IN volatile UINT32 *Value > + ); > + > +UINT32 > +SyncSyncDecrement32 ( > + IN volatile UINT32 *Value > + ); > + > +/** > + Performs an atomic compare exchange operation on a 16-bit > + unsigned integer. > + > + Performs an atomic compare exchange operation on the 16-bit unsigned > + integer specified by Value. If Value is equal to CompareValue, then > + Value is set to ExchangeValue and CompareValue is returned. If Value > + is not equal to CompareValue, then Value is returned. The compare > + exchange operation must be performed using MP safe mechanisms. > + > + @param Value A pointer to the 16-bit value for the > + compare exchange operation. > + @param CompareValue 16-bit value used in compare operation. > + @param ExchangeValue 16-bit value used in exchange operation. > + > + @return The original *Value before exchange. > + > +**/ > +UINT16 > +EFIAPI > +InternalSyncCompareExchange16 ( > + IN volatile UINT16 *Value, > + IN UINT16 CompareValue, > + IN UINT16 ExchangeValue > + ) > +{ > + DEBUG((DEBUG_ERROR, "%a:RISC-V does not support 16-bit AMO > +operation\n", __FUNCTION__)); > + ASSERT (FALSE); > + return 0; > +} > + > +/** > + Performs an atomic compare exchange operation on a 32-bit > + unsigned integer. > + > + Performs an atomic compare exchange operation on the 32-bit unsigned > + integer specified by Value. If Value is equal to CompareValue, then > + Value is set to ExchangeValue and CompareValue is returned. If Value > + is not equal to CompareValue, then Value is returned. The compare > + exchange operation must be performed using MP safe mechanisms. > + > + @param Value A pointer to the 32-bit value for the > + compare exchange operation. > + @param CompareValue 32-bit value used in compare operation. > + @param ExchangeValue 32-bit value used in exchange operation. > + > + @return The original *Value before exchange. > + > +**/ > +UINT32 > +EFIAPI > +InternalSyncCompareExchange32 ( > + IN volatile UINT32 *Value, > + IN UINT32 CompareValue, > + IN UINT32 ExchangeValue > + ) > +{ > + > + if (((UINTN)Value % sizeof (UINT32)) !=3D 0) { > + DEBUG((DEBUG_ERROR, "%a:Value pointer must aligned at natural > address.\n", __FUNCTION__)); > + ASSERT (FALSE); > + } > + return SyncCompareExchange32(Value, CompareValue, ExchangeValue); } > + > +/** > + Performs an atomic compare exchange operation on a 64-bit unsigned > integer. > + > + Performs an atomic compare exchange operation on the 64-bit unsigned > + integer specified by Value. If Value is equal to CompareValue, then > + Value is set to ExchangeValue and CompareValue is returned. If Value= is > not equal to CompareValue, then Value is returned. > + The compare exchange operation must be performed using MP safe > mechanisms. > + > + @param Value A pointer to the 64-bit value for the compare e= xchange > + operation. > + @param CompareValue 64-bit value used in compare operation. > + @param ExchangeValue 64-bit value used in exchange operation. > + > + @return The original *Value before exchange. > + > +**/ > +UINT64 > +EFIAPI > +InternalSyncCompareExchange64 ( > + IN volatile UINT64 *Value, > + IN UINT64 CompareValue, > + IN UINT64 ExchangeValue > + ) > +{ > + if (((UINTN)Value % sizeof (UINT64)) !=3D 0) { > + DEBUG((DEBUG_ERROR, "%a:Value pointer must aligned at natural > address.\n", __FUNCTION__)); > + ASSERT (FALSE); > + } > + return SyncCompareExchange64 (Value, CompareValue, ExchangeValue); } > + > +/** > + Performs an atomic increment of an 32-bit unsigned integer. > + > + Performs an atomic increment of the 32-bit unsigned integer specified > + by Value and returns the incremented value. The increment operation > + must be performed using MP safe mechanisms. The state of the return > + value is not guaranteed to be MP safe. > + > + @param Value A pointer to the 32-bit value to increment. > + > + @return The incremented value. > + > +**/ > +UINT32 > +EFIAPI > +InternalSyncIncrement ( > + IN volatile UINT32 *Value > + ) > +{ > + if (((UINTN)Value % sizeof (UINT32)) !=3D 0) { > + DEBUG((DEBUG_ERROR, "%a:Value pointer must aligned at natural > address.\n", __FUNCTION__)); > + ASSERT (FALSE); > + } > + return SyncSyncIncrement32 (Value); > +} > + > +/** > + Performs an atomic decrement of an 32-bit unsigned integer. > + > + Performs an atomic decrement of the 32-bit unsigned integer specified > + by Value and returns the decrement value. The decrement operation > + must be performed using MP safe mechanisms. The state of the return > + value is not guaranteed to be MP safe. > + > + @param Value A pointer to the 32-bit value to decrement. > + > + @return The decrement value. > + > +**/ > +UINT32 > +EFIAPI > +InternalSyncDecrement ( > + IN volatile UINT32 *Value > + ) > +{ > + if (((UINTN)Value % sizeof (UINT32)) !=3D 0) { > + DEBUG((DEBUG_ERROR, "%a:Value pointer must aligned at natural > address.\n", __FUNCTION__)); > + ASSERT (FALSE); > + } > + return SyncSyncDecrement32 (Value); > +} > diff --git > a/MdePkg/Library/BaseSynchronizationLib/RiscV64/SynchronizationAsm.S > b/MdePkg/Library/BaseSynchronizationLib/RiscV64/SynchronizationAsm.S > new file mode 100644 > index 0000000..943e274 > --- /dev/null > +++ > b/MdePkg/Library/BaseSynchronizationLib/RiscV64/SynchronizationAsm.S > @@ -0,0 +1,78 @@ > +//--------------------------------------------------------------------- > +--------- > +// > +// RISC-V synchronization functions. > +// > +// Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development > +LP. All rights reserved.
// // SPDX-License-Identifier: > +BSD-2-Clause-Patent // > +//--------------------------------------------------------------------- > +--------- > +#include > + > +.data > + > +.text > +.align 3 > + > +.global ASM_PFX(SyncCompareExchange32) > +.global ASM_PFX(SyncCompareExchange64) > +.global ASM_PFX(SyncSyncIncrement32) > +.global ASM_PFX(SyncSyncDecrement32) > + > +// > +// ompare and xchange a 32-bit value. > +// > +// @param a0 : Pointer to 32-bit value. > +// @param a1 : Compare value. > +// @param a2 : Exchange value. > +// > +ASM_PFX (SyncCompareExchange32): > + lr.w a3, (a0) // Load the value from a0 and make > + // the reservation of address. > + bne a3, a1, exit > + sc.w a3, a2, (a0) // Write the value back to the address. > + mv a3, a1 > +exit: > + mv a0, a3 > + ret > + > +.global ASM_PFX(SyncCompareExchange64) > + > +// > +// Compare and xchange a 64-bit value. > +// > +// @param a0 : Pointer to 64-bit value. > +// @param a1 : Compare value. > +// @param a2 : Exchange value. > +// > +ASM_PFX (SyncCompareExchange64): > + lr.d a3, (a0) // Load the value from a0 and make > + // the reservation of address. > + bne a3, a1, exit > + sc.d a3, a2, (a0) // Write the value back to the address. > + mv a3, a1 > +exit2: > + mv a0, a3 > + ret > + > +// > +// Performs an atomic increment of an 32-bit unsigned integer. > +// > +// @param a0 : Pointer to 32-bit value. > +// > +ASM_PFX (SyncSyncIncrement32): > + li a1, 1 > + amoadd.w a2, a1, (a0) > + mv a0, a2 > + ret > + > +// > +// Performs an atomic decrement of an 32-bit unsigned integer. > +// > +// @param a0 : Pointer to 32-bit value. > +// > +ASM_PFX (SyncSyncDecrement32): > + li a1, -1 > + amoadd.w a2, a1, (a0) > + mv a0, a2 > + ret > -- > 2.7.4 >=20 >=20 >=20