Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v3 25/39] BaseTools/Scripts

["Abner Chang" <abner.chang@hpe.com>]

Mark, there is an option for RISC-V to limit the small data be placed in .sdata2 section. With the option -msmall-data-limit set to 0, the small data will be put into .text. Thus we can leverage Gccbase.lds without RISC-V specific one.
I sent the patches to devel for review. Thanks for finding the root cause.

Abner

> -----Original Message-----
> From: Chang, Abner (HPS SW/FW Technologist)
> Sent: Wednesday, November 20, 2019 4:23 PM
> To: devel@edk2.groups.io; msalter@redhat.com
> Cc: Bob Feng <bob.c.feng@intel.com>; Liming Gao <liming.gao@intel.com>;
> Leif Lindholm <leif.lindholm@linaro.org>; Chen, Gilbert
> <gilbert.chen@hpe.com>
> Subject: RE: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v3 25/39]
> BaseTools/Scripts
> 
> Thanks Mark!
> This is actually the problem of using latest RISC-V gnu toolchain which causes
> system hangs in the early POST. GNU toolchain at commit 64879b24 doesn't
> have this problem. Thanks for catching this and I am looking for the solution
> in edk2 build tool to fix this issue instead of changing lds file. We would like to
> use the common lds instead of creating specific one for RISC-V.
> 
> Or do you know is there any link options could avoid those special sections?
> 
> br
> Abner
> 
> 
> > -----Original Message-----
> > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> > Mark Salter
> > Sent: Wednesday, November 20, 2019 2:18 AM
> > To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
> > <abner.chang@hpe.com>
> > Cc: Bob Feng <bob.c.feng@intel.com>; Liming Gao
> > <liming.gao@intel.com>; Leif Lindholm <leif.lindholm@linaro.org>;
> > Chen, Gilbert <gilbert.chen@hpe.com>
> > Subject: Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v3 25/39]
> > BaseTools/Scripts
> >
> > On Mon, 2019-10-28 at 09:59 +0800, Abner Chang wrote:
> > > Add RISC-V specific LD scripts. ."rela(INFO)" in the latest
> > > GccBase.lds causes PE32 relocation error.
> > > This is the temporaty solution untill we find the root casue.
> > >
> > > Signed-off-by: Abner Chang <abner.chang@hpe.com>
> > >
> > > Cc: Bob Feng <bob.c.feng@intel.com>
> > > Cc: Liming Gao <liming.gao@intel.com>
> > > Cc: Leif Lindholm <leif.lindholm@linaro.org>
> > > Cc: Gilbert Chen <gilbert.chen@hpe.com>
> > > ---
> > >  BaseTools/Scripts/GccBaseRiscV.lds | 79
> > > ++++++++++++++++++++++++++++++++++++++
> > >  1 file changed, 79 insertions(+)
> > >  create mode 100644 BaseTools/Scripts/GccBaseRiscV.lds
> > >
> > > diff --git a/BaseTools/Scripts/GccBaseRiscV.lds
> > > b/BaseTools/Scripts/GccBaseRiscV.lds
> > > new file mode 100644
> > > index 0000000..91937aa
> > > --- /dev/null
> > > +++ b/BaseTools/Scripts/GccBaseRiscV.lds
> > > @@ -0,0 +1,79 @@
> > > +/** @file
> > > +
> > > +  Unified linker script for GCC based builds
> > > +
> > > +  Copyright (c) 2010 - 2015, Intel Corporation. All rights
> > > + reserved.<BR>  Copyright (c) 2015, Linaro Ltd. All rights
> > > + reserved.<BR>  Copyright (c) 2019, Hewlett Packard Enterprise
> > > + Development LP. All rights reserved.<BR>
> > > +
> > > +  SPDX-License-Identifier: BSD-2-Clause-Patent
> > > +
> > > +**/
> > > +
> > > +SECTIONS {
> > > +
> > > +  /*
> > > +   * The PE/COFF binary consists of DOS and PE/COFF headers, and a
> > sequence of
> > > +   * section headers adding up to PECOFF_HEADER_SIZE bytes (which
> > differs
> > > +   * between 32-bit and 64-bit builds). The actual start of the .text
> section
> > > +   * will be rounded up based on its actual alignment.
> > > +   */
> > > +  . = PECOFF_HEADER_SIZE;
> > > +
> > > +  .text : ALIGN(CONSTANT(COMMONPAGESIZE)) {
> > > +    *(.text .text.* .stub .gnu.linkonce.t.*)
> > > +    *(.rodata .rodata.* .gnu.linkonce.r.*)
> >
> > So, I tried running this risc-v port on a HiFive Unleashed board but
> > it crashed pretty early on. It turned out that the linker was placing
> > some const data at the start of .text before any actual code. That
> > didn't work out well. I got around that and was able to boot into the
> > efi shell by adding this to tell the linker explicitly where to put that data:
> >
> >     *(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
> >     *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
> >
> > > +    *(.got .got.*)
> > > +
> > > +    /*
> > > +     * The contents of AutoGen.c files are mostly constant from the
> > > + POV of
> > the
> > > +     * program, but most of it ends up in .data or .bss by default
> > > + since few
> > of
> > > +     * the variable definitions that get emitted are declared as CONST.
> > > +     * Unfortunately, we cannot pull it into the .text section entirely, since
> > > +     * patchable PCDs are also emitted here, but we can at least
> > > + move all of
> > the
> > > +     * emitted GUIDs here.
> > > +     */
> > > +    *:AutoGen.obj(.data.g*Guid)
> > > +  }
> > > +
> > > +  /*
> > > +   * The alignment of the .data section should be less than or equal to
> the
> > > +   * alignment of the .text section. This ensures that the relative offset
> > > +   * between these sections is the same in the ELF and the PE/COFF
> > versions of
> > > +   * this binary.
> > > +   */
> > > +  .data ALIGN(ALIGNOF(.text)) : ALIGN(CONSTANT(COMMONPAGESIZE))
> > {
> > > +    *(.data .data.* .gnu.linkonce.d.*)
> > > +    *(.bss .bss.*)
> > > +  }
> > > +
> > > +  .eh_frame ALIGN(CONSTANT(COMMONPAGESIZE)) : {
> > > +    KEEP (*(.eh_frame))
> > > +  }
> > > +
> > > +  .rela ALIGN(CONSTANT(COMMONPAGESIZE)) : {
> > > +    *(.rela .rela.*)
> > > +  }
> > > +
> > > +  .hii : ALIGN(CONSTANT(COMMONPAGESIZE)) {
> > > +    KEEP (*(.hii))
> > > +  }
> > > +
> > > +  /*
> > > +   * Retain the GNU build id but in a non-allocatable section so GenFw
> > > +   * does not copy it into the PE/COFF image.
> > > +   */
> > > +  .build-id (INFO) : { *(.note.gnu.build-id) }
> > > +
> > > +  /DISCARD/ : {
> > > +    *(.note.GNU-stack)
> > > +    *(.gnu_debuglink)
> > > +    *(.interp)
> > > +    *(.dynsym)
> > > +    *(.dynstr)
> > > +    *(.dynamic)
> > > +    *(.hash .gnu.hash)
> > > +    *(.comment)
> > > +    *(COMMON)
> > > +  }
> > > +}
> >
> >
> >
> >