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Thread-Topic: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 11/29] MdePkg/BaseCpuLib: RISC-V Base CPU library implementation. Thread-Index: AQHVcaqr7LwbwfOucUWiO/DkW/PNmac6E62A Date: Tue, 24 Sep 2019 01:58:21 +0000 Message-ID: References: <1569198715-31552-1-git-send-email-abner.chang@hpe.com> <15C6EB9A9BD83853.2053@groups.io> In-Reply-To: <15C6EB9A9BD83853.2053@groups.io> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [16.242.247.131] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 786c6761-e55d-4ae3-0f43-08d74092adc9 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600167)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020);SRVR:CS1PR8401MB1319; x-ms-traffictypediagnostic: CS1PR8401MB1319: x-ms-exchange-purlcount: 1 x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:134; x-forefront-prvs: 0170DAF08C x-forefront-antispam-report: SFV:NSPM;SFS:(10019020)(396003)(136003)(39860400002)(366004)(376002)(346002)(13464003)(199004)(189003)(9686003)(5660300002)(99286004)(76176011)(86362001)(26005)(102836004)(6506007)(7696005)(53546011)(3846002)(6116002)(71190400001)(186003)(81156014)(33656002)(8676002)(66946007)(81166006)(446003)(2906002)(476003)(66476007)(66446008)(64756008)(66556008)(2501003)(52536014)(71200400001)(486006)(11346002)(4326008)(6246003)(74316002)(966005)(8936002)(54906003)(76116006)(25786009)(14454004)(7736002)(110136005)(316002)(19627235002)(478600001)(66066001)(6436002)(229853002)(6306002)(256004)(55016002)(305945005);DIR:OUT;SFP:1102;SCL:1;SRVR:CS1PR8401MB1319;H:CS1PR8401MB1192.NAMPRD84.PROD.OUTLOOK.COM;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: hpe.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: Ff2LliSYGNIesEMCTcbyhkXb9txDxXCdK66gVV0Cd7OvDAJD5M4cp2vF7wO85QWglPpSHIvEs3EwpPLpD/4FUiBgiLGj891gdD9X8XrapPIXgWSaH7MQ+EMG0vpJjuYW2QAzHeb5kF7JtQosNEGEHxDTrbVFeyCNJ9EexXtYavJgoGfeA+Qx4oqILvcXl2FWx4ybz2vYncPk7wyabBB+2BENRwVaJnrQyEULqKY5qQXVCNLZ7yWq1NwgGWX3DiP37Fl5sWA7tsgF6sRNECCqWHnHdRLNQipA6qeo99Npz2WG/2VfYOBSyZNuQXCWWpn4/GQFLC6JwcUzOiOV76gq2oAPbGPvpTU/LUtxEcMJmt1SwyG7FNRtnXQ3YkQ4jiZ3P1H0aDHW8BpFgDdR7r8AjzbrJjNcz9InNXAHhtLFWF0= X-MS-Exchange-CrossTenant-Network-Message-Id: 786c6761-e55d-4ae3-0f43-08d74092adc9 X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Sep 2019 01:58:21.9133 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 105b2061-b669-4b31-92ac-24d304d195dc X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: bHpjKSpv9cBW+8aTnIhEtSrqPp2jZnfJZc22S2mv7ABIFDx0fjXkczDyXRAyqhHo8WZtVa0N6/7Ma7nf2HjK4g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CS1PR8401MB1319 X-OriginatorOrg: hpe.com X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-09-23_10:2019-09-23,2019-09-23 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 priorityscore=1501 mlxlogscore=904 malwarescore=0 mlxscore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 phishscore=0 clxscore=1015 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1908290000 definitions=main-1909240018 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable CC maintainers. > -----Original Message----- > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of > Abner Chang > Sent: Monday, September 23, 2019 8:32 AM > To: devel@edk2.groups.io > Cc: Chang, Abner (HPS SW/FW Technologist) > Subject: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 11/29] > MdePkg/BaseCpuLib: RISC-V Base CPU library implementation. >=20 > Implement RISC-V CPU related functions in BaseCpuLib. >=20 > Signed-off-by: Abner Chang > --- > MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 6 +++++- > MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 +++-- > MdePkg/Library/BaseCpuLib/RiscV/Cpu.S | 19 +++++++++++++++++++ > 3 files changed, 27 insertions(+), 3 deletions(-) create mode 100644 > MdePkg/Library/BaseCpuLib/RiscV/Cpu.S >=20 > diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > index a7cb381..a95d8a0 100644 > --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > @@ -7,6 +7,7 @@ > # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved. # > Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= # > Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
> +# Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development > +LP. All rights reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -24,7 +25,7 @@ >=20 >=20 > # > -# VALID_ARCHITECTURES =3D IA32 X64 EBC ARM AARCH64 > +# VALID_ARCHITECTURES =3D IA32 X64 EBC ARM AARCH64 RISCV64 > # >=20 > [Sources.IA32] > @@ -59,6 +60,9 @@ > AArch64/CpuFlushTlb.asm | MSFT > AArch64/CpuSleep.asm | MSFT >=20 > +[Sources.RISCV64] > + RiscV/Cpu.S > + > [Packages] > MdePkg/MdePkg.dec >=20 > diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > index fc95cda..85d56ce 100644 > --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > @@ -1,12 +1,13 @@ > // /** @file > // Instance of CPU Library for various architecture. > // > -// CPU Library implemented using ASM functions for IA-32 and X64, > +// CPU Library implemented using ASM functions for IA-32, X64 and > +RISCV64, > // PAL CALLs for IPF, and empty functions for EBC. > // > // Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved. // > Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= // > Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
> +// Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All > +rights reserved.
> // > // SPDX-License-Identifier: BSD-2-Clause-Patent // @@ -15,5 +16,5 @@ >=20 > #string STR_MODULE_ABSTRACT #language en-US "Instance of CP= U > Library for various architectures" >=20 > -#string STR_MODULE_DESCRIPTION #language en-US "CPU Library > implemented using ASM functions for IA-32 and X64, PAL CALLs for IPF, an= d > empty functions for EBC." > +#string STR_MODULE_DESCRIPTION #language en-US "CPU Library > implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs fo= r > IPF, and empty functions for EBC." >=20 > diff --git a/MdePkg/Library/BaseCpuLib/RiscV/Cpu.S > b/MdePkg/Library/BaseCpuLib/RiscV/Cpu.S > new file mode 100644 > index 0000000..703b1e8 > --- /dev/null > +++ b/MdePkg/Library/BaseCpuLib/RiscV/Cpu.S > @@ -0,0 +1,19 @@ > +//--------------------------------------------------------------------- > +--------- > +// > +// CpuSleep for RISC-V > +// > +// Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development > +LP. All rights reserved.
// SPDX-License-Identifier: > +BSD-2-Clause-Patent // > +//--------------------------------------------------------------------- > +--------- > +.data > +.align 3 > +.section .text > + > +.global ASM_PFX(_CpuSleep) > + > +ASM_PFX(_CpuSleep): > + wfi > + ret > + > + > -- > 2.7.4 >=20 >=20 >=20