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Fri, 18 Oct 2019 05:23:12 +0000 From: "Abner Chang" To: "devel@edk2.groups.io" , "leif.lindholm@linaro.org" , "Chen, Gilbert" CC: Palmer Dabbelt Subject: Re: [edk2-devel] [plaforms/devel-riscv-v2 PATCHv2 05/14] RiscV/Library: Initial version of libraries introduced in RISC-V platform package Thread-Topic: [edk2-devel] [plaforms/devel-riscv-v2 PATCHv2 05/14] RiscV/Library: Initial version of libraries introduced in RISC-V platform package Thread-Index: AQHVbp2WDOXAC/gipEWXvj/mxP4zJ6dHqcoAgBhfTpA= Date: Fri, 18 Oct 2019 05:23:12 +0000 Message-ID: References: <20190919035131.4700-1-gilbert.chen@hpe.com> <20190919035131.4700-6-gilbert.chen@hpe.com> <20191002170454.GE25504@bivouac.eciton.net> In-Reply-To: <20191002170454.GE25504@bivouac.eciton.net> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [16.242.247.131] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 7536fdcf-cbe4-47f9-f030-08d7538b459a x-ms-office365-filtering-ht: Tenant x-ms-traffictypediagnostic: CS1PR8401MB0485: x-ms-exchange-purlcount: 1 x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:227; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of > Leif Lindholm > Sent: Thursday, October 3, 2019 1:05 AM > To: devel@edk2.groups.io; Chen, Gilbert > Cc: Palmer Dabbelt > Subject: Re: [edk2-devel] [plaforms/devel-riscv-v2 PATCHv2 05/14] > RiscV/Library: Initial version of libraries introduced in RISC-V platfor= m > package >=20 > On Thu, Sep 19, 2019 at 11:51:22AM +0800, Gilbert Chen wrote: > > FirmwareContextProcessorSpecificLib > > - Common library to consume > EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC > > and build up processor specific data HOB. > > > > RealTimClockLibNull > > - NULL instance of Real Time Clock library. > > > > Signed-off-by: Gilbert Chen > > --- > > .../FirmwareContextProcessorSpecificLib.c | 82 +++++++++ > > .../FirmwareContextProcessorSpecificLib.inf | 33 ++++ > > .../RealTimeClockLibNull/RealTimeClockLibNull.c | 204 > +++++++++++++++++++++ > > .../RealTimeClockLibNull/RealTimeClockLibNull.inf | 30 +++ >=20 > I think you can replace this NULL RealTimeClockLib implementation with > EmbeddedPkg/Library/VirtualRealTimeClockLib/ (which did not exist at the > time of the original port). Ok. U500.dsc will use VirtualRealTimeClockLib. The RiscVPlatformPkg keeps = using the NULL one under RiscVPlatformPkg/Library. Same as RiscVPkg, no Emb= eddedPkg modules involved. >=20 > > 4 files changed, 349 insertions(+) > > create mode 100644 > > > Platform/RiscV/Library/FirmwareContextProcessorSpecificLib/FirmwareCon > > textProcessorSpecificLib.c create mode 100644 > > > Platform/RiscV/Library/FirmwareContextProcessorSpecificLib/FirmwareCon > > textProcessorSpecificLib.inf create mode 100644 > > Platform/RiscV/Library/RealTimeClockLibNull/RealTimeClockLibNull.c > > create mode 100644 > > Platform/RiscV/Library/RealTimeClockLibNull/RealTimeClockLibNull.inf > > > > diff --git > > a/Platform/RiscV/Library/FirmwareContextProcessorSpecificLib/FirmwareC > > ontextProcessorSpecificLib.c > > > b/Platform/RiscV/Library/FirmwareContextProcessorSpecificLib/FirmwareC > > ontextProcessorSpecificLib.c > > new file mode 100644 > > index 00000000..4d4c51dc > > --- /dev/null > > +++ b/Platform/RiscV/Library/FirmwareContextProcessorSpecificLib/Firmw > > +++ areContextProcessorSpecificLib.c > > @@ -0,0 +1,82 @@ > > +/**@file > > + Common library to build upfirmware context processor-specific > > +information > > + > > + Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All > > + rights reserved.
> > + > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > +**/ > > + > > +// > > +// The package level header files this module uses // #include > > + > > + > > +// > > +// The Library classes this module consumes // #include > > + #include #include > > + >=20 > Please sort these includes alphabetically. >=20 > > + > > +#include > > +#include #include > > + >=20 > Please sort these includes alphabetically. >=20 > > +#include > > +#include > > +#include > > + > > +/** > > + Build up common firmware context processor-specific information > > + > > + @param FirmwareContextHartSpecific Pointer to > EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC > > + @param ParentProcessorGuid Pointer to GUID of Processor w= hich > contains this core > > + @param ParentProcessorUid Unique ID of pysical processor= which > owns this core. > > + @param CoreGuid Pointer to GUID of core > > + @param HartId Hart ID of this core. > > + @param IsBootHart This is boot hart or not > > + @param ProcessorSpecDataHob Pointer to > RISC_V_PROCESSOR_SPECIFIC_DATA_HOB > > + > > + @return EFI_STATUS > > + > > +**/ > > +EFI_STATUS > > +EFIAPI > > +CommonFirmwareContextHartSpecificInfo ( > > + EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC > > +*FirmwareContextHartSpecific, > > + EFI_GUID *ParentProcessorGuid, > > + UINTN ParentProcessorUid, > > + EFI_GUID *CoreGuid, > > + UINTN HartId, > > + BOOLEAN IsBootHart, > > + RISC_V_PROCESSOR_SPECIFIC_DATA_HOB *ProcessorSpecDataHob >=20 > Spec is not a clear enough abbreviation, please use Specific. > Or call it something else. If you keep the name, it certainly wouldn't h= urt to > use a local variable with a shorter name.. >=20 > > + ) > > +{ > > + // > > + // Build up RISC_V_PROCESSOR_SPECIFIC_DATA_HOB. > > + // > > + CopyGuid (&ProcessorSpecDataHob->ParentPrcessorGuid, > > +ParentProcessorGuid); > > + ProcessorSpecDataHob->ParentProcessorUid =3D ParentProcessorUid; > > + CopyGuid (&ProcessorSpecDataHob->CoreGuid, CoreGuid); > > + ProcessorSpecDataHob->Context =3D NULL; > > + ProcessorSpecDataHob->ProcessorSpecificData.Revision =3D > SMBIOS_RISC_V_PROCESSOR_SPECIFIC_DATA_REVISION; >=20 > 80 Characters is up to = here -> > These lines are way too long, please wrap them. >=20 > > + ProcessorSpecDataHob->ProcessorSpecificData.Length =3D si= zeof > (SMBIOS_RISC_V_PROCESSOR_SPECIFIC_DATA); > > + ProcessorSpecDataHob->ProcessorSpecificData.HartId.Value64_L =3D > > +(UINT64)HartId; > > + ProcessorSpecDataHob->ProcessorSpecificData.HartId.Value64_H =3D 0; > > + ProcessorSpecDataHob->ProcessorSpecificData.BootHartId =3D > (UINT8)IsBootHart; > > + ProcessorSpecDataHob->ProcessorSpecificData.InstSetSupported =3D > FirmwareContextHartSpecific->IsaExtensionSupported; > > + ProcessorSpecDataHob- > >ProcessorSpecificData.PrivilegeModeSupported =3D > SMBIOS_RISC_V_PSD_MACHINE_MODE_SUPPORTED; > > + if ((ProcessorSpecDataHob->ProcessorSpecificData.InstSetSupported & > RISC_V_ISA_SUPERVISOR_MODE_IMPLEMENTED) !=3D 0) { > > + > > +ProcessorSpecDataHob->ProcessorSpecificData.PrivilegeModeSupported > |=3D > > +SMBIOS_RISC_V_PSD_SUPERVISOR_MODE_SUPPORTED; > > + } > > + if ((ProcessorSpecDataHob->ProcessorSpecificData.InstSetSupported & > RISC_V_ISA_USER_MODE_IMPLEMENTED) !=3D 0) { > > + > > +ProcessorSpecDataHob->ProcessorSpecificData.PrivilegeModeSupported > |=3D > > +SMBIOS_RISC_V_PSD_USER_MODE_SUPPORTED; > > + } > > + > > +ProcessorSpecDataHob- > >ProcessorSpecificData.MachineVendorId.Value64_L > > +=3D FirmwareContextHartSpecific->MachineVendorId.Value64_L; > > + > > +ProcessorSpecDataHob- > >ProcessorSpecificData.MachineVendorId.Value64_H > > +=3D FirmwareContextHartSpecific->MachineVendorId.Value64_H; > > + ProcessorSpecDataHob- > >ProcessorSpecificData.MachineArchId.Value64_L > > +=3D FirmwareContextHartSpecific->MachineArchId.Value64_L; > > + ProcessorSpecDataHob- > >ProcessorSpecificData.MachineArchId.Value64_H > > +=3D FirmwareContextHartSpecific->MachineArchId.Value64_H; > > + ProcessorSpecDataHob- > >ProcessorSpecificData.MachineImplId.Value64_L > > +=3D FirmwareContextHartSpecific->MachineImplId.Value64_L; > > + ProcessorSpecDataHob- > >ProcessorSpecificData.MachineImplId.Value64_H > > +=3D FirmwareContextHartSpecific->MachineImplId.Value64_H; > > + return EFI_SUCCESS; > > +} > > diff --git > > a/Platform/RiscV/Library/FirmwareContextProcessorSpecificLib/FirmwareC > > ontextProcessorSpecificLib.inf > > > b/Platform/RiscV/Library/FirmwareContextProcessorSpecificLib/FirmwareC > > ontextProcessorSpecificLib.inf > > new file mode 100644 > > index 00000000..ff841c3e > > --- /dev/null > > +++ b/Platform/RiscV/Library/FirmwareContextProcessorSpecificLib/Firmw > > +++ areContextProcessorSpecificLib.inf > > @@ -0,0 +1,33 @@ > > +#/** @file > > +# > > +# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All > > +rights reserved.
# # SPDX-License-Identifier: > > +BSD-2-Clause-Patent # #**/ > > + > > +[Defines] > > + INF_VERSION =3D 0x00010005 >=20 > Can we update to a more recent specification version? >=20 > > + BASE_NAME =3D FirmwareContextProcessorSpecific= Lib > > + FILE_GUID =3D 8BEC9FD7-C554-403A-94F1-0EBBFD81= A242 > > + MODULE_TYPE =3D PEIM > > + VERSION_STRING =3D 1.0 > > + LIBRARY_CLASS =3D FirmwareContextProcessorSpecific= Lib > > + > > +[Sources.common] > > + FirmwareContextProcessorSpecificLib.c > > + > > +[Packages] > > + MdePkg/MdePkg.dec > > + MdeModulePkg/MdeModulePkg.dec >=20 > Please sort the above alphabetically. >=20 > > + RiscVPkg/RiscVPkg.dec > > + Silicon/SiFive/SiFive.dec > > + > > +[LibraryClasses] > > + BaseLib > > + PcdLib > > + MemoryAllocationLib >=20 > Please sort the above alphabetically. >=20 > > + PrintLib > > + > > +[Pcd] > > + >=20 > / > Leif >=20 >=20