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Fri, 22 Nov 2019 03:57:22 +0000 From: "Abner Chang" To: "devel@edk2.groups.io" , "leif.lindholm@linaro.org" CC: "Chen, Gilbert" Subject: Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v3 37/39] edk2-staging:RISC-V-V2: Add RiscVEdk2Readme.md Thread-Topic: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v3 37/39] edk2-staging:RISC-V-V2: Add RiscVEdk2Readme.md Thread-Index: AQHVjTfzyd/PEVmUG0ip/OwKL5o5wKeWAlKAgACzW7A= Date: Fri, 22 Nov 2019 03:57:22 +0000 Message-ID: References: <1572227957-13169-1-git-send-email-abner.chang@hpe.com> <1572227957-13169-38-git-send-email-abner.chang@hpe.com> <20191121170904.GQ7359@bivouac.eciton.net> In-Reply-To: <20191121170904.GQ7359@bivouac.eciton.net> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [16.242.247.131] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: d0891498-bc7c-41b1-b4ef-08d76f001420 x-ms-traffictypediagnostic: CS1PR8401MB0325: x-ms-exchange-purlcount: 3 x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:67; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of > Leif Lindholm > Sent: Friday, November 22, 2019 1:09 AM > To: Chang, Abner (HPS SW/FW Technologist) > Cc: devel@edk2.groups.io; Chen, Gilbert > Subject: Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v3 37/39] edk2- > staging:RISC-V-V2: Add RiscVEdk2Readme.md >=20 > On Mon, Oct 28, 2019 at 09:59:15 +0800, Abner Chang wrote: > > Add readme of RISC-V edk2 port. > > > > Signed-off-by: Abner Chang > > > > Cc: Leif Lindholm > > Cc: Gilbert Chen > > --- > > RiscVEdk2Readme.md | 64 > > ++++++++++++++++++++++++++++++++++++++++++++++++++++++ > > 1 file changed, 64 insertions(+) > > create mode 100644 RiscVEdk2Readme.md > > > > diff --git a/RiscVEdk2Readme.md b/RiscVEdk2Readme.md new file mode > > 100644 index 0000000..ebd7495 > > --- /dev/null > > +++ b/RiscVEdk2Readme.md > > @@ -0,0 +1,64 @@ > > +This branch is used to contribute RISC-V architecture to EDK2 > > + > > +The branch owner: > > +Abner Chang < abner.chang@hpe.com > > > +Gilbert Chen < gilbert.chen@hpe.com > > > + > > +## RISC-V EDK2 Port Introduction > > +RISC-V is an open ISA which was designed to support research and > > +education of computer architecture, but now it becomes a standard > > +open Instruction Set Architecture for industry implementations. The > > +RISC-V edk2 project is to create a new processor binding in UEFI spec= and > have the RISC-V edk2 implementation. > > +The goal is to have RISC-V edk2 port as the firmware reference for > > +RISC-V platforms. > > + > > +This branch (RISC-V-V2) on edk2-staging is RISC-V edk2 port with > > +RISC-V OpenSbi (https://github.com/riscv/opensbi) library integrated. > > +RiscVPkg provides the generic and common modules of RISC-V prcessor. > > +Two edk2 RISC-V platforms are introduced in this branch, > > +- SiFive Freedome U500 platform whcih is maintained in > > +FreedomU500VC707Board under Platform/SiFive/U5SeriesPkg. > > +- SiFive Freedome U540 HiFive Unleashed platform whcih is maintained > > +in FreedomU540HiFiveUnleashedBoard under > Platform/SiFive/U5SeriesPkg. > > + > > +Refer to Platform/SiFive/U5Series/Readme.md on edk2-platform > repository. > > + > > +## RISC-V EDK2 Package > > +``` > > +RiscVPkg - RISC-V processor package. This package provides RISC= -V > > + processor related protocols/libraries accroding to U= EFI > > + specification and edk2 implementations. > > +RiscVPlatformPkg - RISC-V platform package. This package provides RI= SC- > V > > + platform common modules, libraries, PCDs and defi= nitoins. > > +``` > > +## Toolchain of RISC-V EDK2 port > > +Due to not yet tracked down bugs, only the following toolchain is > > +known to produce bootoable binaries. >=20 > Was this issue also resolved by Mark's linker script patch? The fix is not in lds, the fix is tool_def.template in which msmall-data-l= imit is added and set to 0 to avoid .sdata2 section. See below email on edk= 2-devel, - [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v3-2] BaseTools: Fix edk2 RIS= C-V binary hangs at POST with the latest toolchain >=20 > > +https://github.com/riscv/riscv-gnu-toolchain at commit ID 64879b24. > > +The commit ID 64879b24 of riscv-gnu-toolchain repository is verified > > +to build RISC-V edk2 platform and boot to EFI SHELL successfully. > > +You have to clone the toolchain from above link and check out > > +commit:64879b24 for building RISC-V edk2 port. > > +The commit later than 64879b24 causes system hangs at the PEI phase > > +to DXE phase transition. We are still figuring out the root cause. > > + > > +## EDK2 Build Target > > +"RISCV64" ARCH is the RISC-V architecture which currently supported a= nd > verified. > > +The verified RISC-V toolchain is > > +https://github.com/riscv/riscv-gnu-toolchain > > +@64879b24 as mentioned above, toolchain tag is "GCC5" which is > > +declared in tools_def.txt. >=20 > If this text is still needed: > Which environment has this toolchain successfully been built in? Readme has been updated, https://github.com/riscv/riscv-gnu-toolchain and "GCC5" till the toolchain= used for building binary of RISC-V platform, just commit ID 64879b24 is no= t required. - [edk2-devel] [Platform/devel-riscv-v2 PATCHv5-2] edk2-platforms: Update = Readme.md for RISC-V platform. - [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v3-2] BaseTools: Fix edk2 RIS= C-V binary hangs at POST with the latest toolchain >=20 > / > Leif >=20 > > +Below is the edk2 build options for building RISC-V RV64 platform, > > +``` build -a RISCV64 -p Platform/{Vendor}/{Platform}/{Platform}.dsc > > +-t GCC5 ``` For example, ``` build -a RISCV64 -p > > +Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc > > +-t GCC5 > > +``` > > + > > +Make sure RISC-V toolchain is built succesfully and the toolchain > > +binaries are generated in somewhere you specified when building > toolchain. > > +'GCC5_RISCV64_PREFIX' is the cross compilation prefix to toolchain > binraries. > > +For example, set 'GCC5_RISCV64_PREFIX' to '~/RiscVToolchain/riscv64- > unknown-elf-' > > +before you build RISC-V edk2 port. > > -- > > 2.7.4 > > >=20 >=20