From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: hpe.com, ip: 148.163.147.86, mailfrom: prvs=01703bcc39=abner.chang@hpe.com) Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by groups.io with SMTP; Mon, 23 Sep 2019 18:56:48 -0700 Received: from pps.filterd (m0134421.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x8O1ueAZ000513 for ; Tue, 24 Sep 2019 01:56:47 GMT Received: from g2t2354.austin.hpe.com (g2t2354.austin.hpe.com [15.233.44.27]) by mx0b-002e3701.pphosted.com with ESMTP id 2v73r0d50u-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 24 Sep 2019 01:56:47 +0000 Received: from G4W9120.americas.hpqcorp.net (exchangepmrr1.us.hpecorp.net [16.210.21.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by g2t2354.austin.hpe.com (Postfix) with ESMTPS id E5BA181 for ; Tue, 24 Sep 2019 01:56:46 +0000 (UTC) Received: from G2W6309.americas.hpqcorp.net (2002:10c5:4033::10c5:4033) by G4W9120.americas.hpqcorp.net (2002:10d2:150f::10d2:150f) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Tue, 24 Sep 2019 01:56:46 +0000 Received: from NAM02-SN1-obe.outbound.protection.outlook.com (15.241.52.11) by G2W6309.americas.hpqcorp.net (16.197.64.51) with Microsoft SMTP Server (TLS) id 15.0.1367.3 via Frontend Transport; Tue, 24 Sep 2019 01:56:46 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=YN3bimVclS5cX3q8gA7ziPRszG2HNVRfg1hYoNg2qwa3FEuji/oQq54eQ5yio3wqO4D+qIn8mT3NDDmFI0iud1jNsaHMUZwvAzjc+BFR4cpGfUR9lxk/zZMusy2QfUDNYO+gSaQLxBKMLcE7BZpyCUsLigcTyOsbzgx/TSKY/SG/KdeOvkXdsyuknHXQQYit+h/ULSs1ogmJuVOL77ZGn59KXaBIogu6MfHlr3UZor1q1yiIRbDfD4am7WNBr2dJA7bOQo2jrQ4aEBCi1ivKir6SjcKv0smYg3UGDKnRqjAcwjJnAsqk4dxC6Zuw4DB+ZwKCrhXpEgjOKMF4o93WFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=gD6RrPsfMYFJpHmgvZ8lwHL297GnFRuncCx2faA/m5o=; b=c2ipBXFCHM+7Vp5sNILIQ/QMc3tiCWjkBrruARj7DiRTMRKdd8pvBLlN2/jWnagyvHHfAtVcijWNRyQ7scRbPUIURlRfVoAyG1Zj6M9SH3c4gBUm+jmmOtVGQS1Hxap1q4NYOULbCUj5boLyhW19DVkJl4yUzRqa/HFBumXQ8a+nXvizNSQjhkOgR2jH2SWGVNmPNLnLKiQDU2Suzhhykj74Wq5capu9NDMMuZ3jIi78foB57xk4XlLHhZ7IxAS31R9JPRJecqx+KU0c0kfkEWJ/zzPXruYTeb5rirl+sMlIC/2ERtalNuRFQVAbwkqknGuiVQTjQjk3EYLXZQSdGw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=hpe.com; dmarc=pass action=none header.from=hpe.com; dkim=pass header.d=hpe.com; arc=none Received: from CS1PR8401MB1192.NAMPRD84.PROD.OUTLOOK.COM (10.169.12.151) by CS1PR8401MB0983.NAMPRD84.PROD.OUTLOOK.COM (10.169.16.18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2284.26; Tue, 24 Sep 2019 01:56:45 +0000 Received: from CS1PR8401MB1192.NAMPRD84.PROD.OUTLOOK.COM ([fe80::4fb:84b9:76e6:1cde]) by CS1PR8401MB1192.NAMPRD84.PROD.OUTLOOK.COM ([fe80::4fb:84b9:76e6:1cde%8]) with mapi id 15.20.2284.023; Tue, 24 Sep 2019 01:56:45 +0000 From: "Abner Chang" To: "devel@edk2.groups.io" , "Chang, Abner (HPS SW/FW Technologist)" CC: Liming Gao , Michael D Kinney Subject: Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 10/29] MdePkg/BasePeCoff: Add RISC-V PE/Coff related code. Thread-Topic: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 10/29] MdePkg/BasePeCoff: Add RISC-V PE/Coff related code. Thread-Index: AQHVcaqoNkUWa89AOEW3r1Xw6JO0bKc6ExLQ Date: Tue, 24 Sep 2019 01:56:44 +0000 Message-ID: References: <1569198715-31552-1-git-send-email-abner.chang@hpe.com> <15C6EB9A40C408A0.24160@groups.io> In-Reply-To: <15C6EB9A40C408A0.24160@groups.io> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [16.242.247.131] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 7cdb69dc-a931-49c6-842b-08d7409273f1 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(5600167)(711020)(4605104)(1401327)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7193020);SRVR:CS1PR8401MB0983; x-ms-traffictypediagnostic: CS1PR8401MB0983: x-ms-exchange-purlcount: 1 x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:989; x-forefront-prvs: 0170DAF08C x-forefront-antispam-report: SFV:NSPM;SFS:(10019020)(6029001)(376002)(366004)(396003)(136003)(39860400002)(346002)(199004)(189003)(13464003)(2906002)(71200400001)(9686003)(71190400001)(30864003)(229853002)(52536014)(110136005)(99286004)(14454004)(316002)(66066001)(478600001)(5660300002)(966005)(256004)(86362001)(6116002)(26005)(6246003)(4326008)(74316002)(102836004)(54906003)(25786009)(8936002)(81156014)(486006)(476003)(81166006)(33656002)(66556008)(446003)(6436002)(11346002)(8676002)(305945005)(66946007)(3846002)(2501003)(76176011)(6306002)(19627235002)(7696005)(14444005)(76116006)(66476007)(7736002)(53546011)(6506007)(55016002)(186003)(64756008)(66446008);DIR:OUT;SFP:1102;SCL:1;SRVR:CS1PR8401MB0983;H:CS1PR8401MB1192.NAMPRD84.PROD.OUTLOOK.COM;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: hpe.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: +VduHZbq8FR/ijnNuFR6/+lYyPoXuDgcMLMHctrBKvrj9Dq47EQ3eGZW1COvClsKDw0LRengKmx/U5G3rfXtANh+CBxFxJ/1ZNU5KZ3BSZL2LFJXp54rN4NdHu7RLzFjiaT1nqYNBhn0wMiPp2r4Sa/YiprNpSyBZvk1MvfS95ttxX7At/TD8EAWtDGfNBeqLXARjk4Uby1XHEKMoJ4CB7H+PC8FK30lBfm6GVxVdIKhzvFeOUMYYRRvmqh4B1JIgoLID3pBTCZwLA5Ri55gBjyq5TZtfN1oJECKCK5LE93u9LPpNTRyxke20kZfWItw23zHzk6G/jBst38tA/6zG7QRswggm1tFDjIcWERVla7CS0UYFhqvWCdXc+gIg+wHzAoPO7fnuCA/k226YiCElq0iNZb5Mo+WfH/PQtqkel0= X-MS-Exchange-CrossTenant-Network-Message-Id: 7cdb69dc-a931-49c6-842b-08d7409273f1 X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Sep 2019 01:56:44.9385 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 105b2061-b669-4b31-92ac-24d304d195dc X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: b4M0Cw7uU3F0P2JmZt6M/XMJnpJKdDGXaQ52OljNQj1r5kNhTUXOWUsr7L6GdY8lI8p/3ih2EYJliE+JIzSqNA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CS1PR8401MB0983 X-OriginatorOrg: hpe.com X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-09-23_10:2019-09-23,2019-09-23 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 lowpriorityscore=0 bulkscore=0 adultscore=0 phishscore=0 suspectscore=0 malwarescore=0 spamscore=0 impostorscore=0 mlxlogscore=999 clxscore=1015 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1908290000 definitions=main-1909240018 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable CC maintainers > -----Original Message----- > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of > Abner Chang > Sent: Monday, September 23, 2019 8:32 AM > To: devel@edk2.groups.io > Cc: Chang, Abner (HPS SW/FW Technologist) > Subject: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 10/29] > MdePkg/BasePeCoff: Add RISC-V PE/Coff related code. >=20 > Support RISC-V image relocation. >=20 > Signed-off-by: Abner Chang > --- > MdePkg/Library/BasePeCoffLib/BasePeCoff.c | 3 +- > MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf | 5 + > MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni | 2 + > .../Library/BasePeCoffLib/BasePeCoffLibInternals.h | 1 + > .../Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c | 142 > +++++++++++++++++++++ > 5 files changed, 152 insertions(+), 1 deletion(-) create mode 100644 > MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c >=20 > diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoff.c > b/MdePkg/Library/BasePeCoffLib/BasePeCoff.c > index 07bb62f..97e0ff4 100644 > --- a/MdePkg/Library/BasePeCoffLib/BasePeCoff.c > +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoff.c > @@ -1,6 +1,6 @@ > /** @file > Base PE/COFF loader supports loading any PE32/PE32+ or TE image, but > - only supports relocating IA32, x64, IPF, and EBC images. > + only supports relocating IA32, x64, IPF, ARM, RISC-V and EBC images. >=20 > Caution: This file requires additional review when modified. > This library will have external input - PE/COFF image. > @@ -17,6 +17,7 @@ >=20 > Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved. > Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. > + Portions Copyright (c) 2016, Hewlett Packard Enterprise Development > + LP. All rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > **/ > diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > index 395c140..b190494 100644 > --- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > @@ -3,6 +3,7 @@ > # The IPF version library supports loading IPF and EBC PE/COFF image. > # The IA32 version library support loading IA32, X64 and EBC PE/COFF i= mages. > # The X64 version library support loading IA32, X64 and EBC PE/COFF im= ages. > +# The RISC-V version library support loading RISC-V images. > # > # Caution: This module requires additional review when modified. > # This library will have external input - PE/COFF image. > @@ -11,6 +12,7 @@ > # > # Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. # > Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> +# Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All > +rights reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -41,6 +43,9 @@ > [Sources.ARM] > Arm/PeCoffLoaderEx.c >=20 > +[Sources.RISCV64] > + RiscV/PeCoffLoaderEx.c > + > [Packages] > MdePkg/MdePkg.dec >=20 > diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni > b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni > index b0ea702..8616ca3 100644 > --- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni > +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni > @@ -4,6 +4,7 @@ > // The IPF version library supports loading IPF and EBC PE/COFF image. > // The IA32 version library support loading IA32, X64 and EBC PE/COFF > images. > // The X64 version library support loading IA32, X64 and EBC PE/COFF im= ages. > +// The RISC-V version library support loading RISC-V32 and RISC-V64 > PE/COFF images. > // > // Caution: This module requires additional review when modified. > // This library will have external input - PE/COFF image. > @@ -12,6 +13,7 @@ > // > // Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. // > Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> +// Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All > +rights reserved.
> // > // SPDX-License-Identifier: BSD-2-Clause-Patent // diff --git > a/MdePkg/Library/BasePeCoffLib/BasePeCoffLibInternals.h > b/MdePkg/Library/BasePeCoffLib/BasePeCoffLibInternals.h > index b74277f..9c33703 100644 > --- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLibInternals.h > +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLibInternals.h > @@ -2,6 +2,7 @@ > Declaration of internal functions in PE/COFF Lib. >=20 > Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved. > + Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All > + rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > **/ > diff --git a/MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c > b/MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c > new file mode 100644 > index 0000000..8eb37f9 > --- /dev/null > +++ b/MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c > @@ -0,0 +1,142 @@ > +/** @file > + PE/Coff loader for RISC-V PE image > + > + Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All > +rights reserved.
> + SPDX-License-Identifier: BSD-2-Clause-Patent **/ #include > +"BasePeCoffLibInternals.h" > +#include > + > +// > +// RISC-V definition. > +// > +#define RV_X(x, s, n) (((x) >> (s)) & ((1<<(n))-1)) #define > +RISCV_IMM_BITS 12 #define RISCV_IMM_REACH (1LL< #define > +RISCV_CONST_HIGH_PART(VALUE) \ > + (((VALUE) + (RISCV_IMM_REACH/2)) & ~(RISCV_IMM_REACH-1)) > + > +/** > + Performs an RISC-V specific relocation fixup and is a no-op on > + other instruction sets. > + RISC-V splits 32-bit fixup into 20bit and 12-bit with two relocation > + types. We have to know the lower 12-bit fixup first then we can deal > + carry over on high 20-bit fixup. So we log the high 20-bit in > + FixupData. > + > + @param Reloc The pointer to the relocation record. > + @param Fixup The pointer to the address to fix up. > + @param FixupData The pointer to a buffer to log the fixups. > + @param Adjust The offset to adjust the fixup. > + > + @return Status code. > + > +**/ > +RETURN_STATUS > +PeCoffLoaderRelocateImageEx ( > + IN UINT16 *Reloc, > + IN OUT CHAR8 *Fixup, > + IN OUT CHAR8 **FixupData, > + IN UINT64 Adjust > + ) > +{ > + UINT32 Value; > + UINT32 Value2; > + UINT32 *RiscVHi20Fixup; > + > + switch ((*Reloc) >> 12) { > + case EFI_IMAGE_REL_BASED_RISCV_HI20: > + *(UINT64 *)(*FixupData) =3D (UINT64)(UINTN)Fixup; > + break; > + > + case EFI_IMAGE_REL_BASED_RISCV_LOW12I: > + RiscVHi20Fixup =3D (UINT32 *)(*(UINT64 *)(*FixupData)); > + if (RiscVHi20Fixup !=3D NULL) { > + > + Value =3D (UINT32)(RV_X(*RiscVHi20Fixup, 12, 20) << 12); > + Value2 =3D (UINT32)(RV_X(*(UINT32 *)Fixup, 20, 12)); > + if (Value2 & (RISCV_IMM_REACH/2)) { > + Value2 |=3D ~(RISCV_IMM_REACH-1); > + } > + Value +=3D Value2; > + Value +=3D (UINT32)Adjust; > + Value2 =3D RISCV_CONST_HIGH_PART (Value); > + *(UINT32 *)RiscVHi20Fixup =3D (RV_X (Value2, 12, 20) << 12) |\ > + (RV_X (*(UINT32 *)RiscVHi20F= ixup, 0, 12)); > + *(UINT32 *)Fixup =3D (RV_X (Value, 0, 12) << 20) |\ > + (RV_X (*(UINT32 *)Fixup, 0, 20)); > + } > + break; > + > + case EFI_IMAGE_REL_BASED_RISCV_LOW12S: > + RiscVHi20Fixup =3D (UINT32 *)(*(UINT64 *)(*FixupData)); > + if (RiscVHi20Fixup !=3D NULL) { > + Value =3D (UINT32)(RV_X(*RiscVHi20Fixup, 12, 20) << 12); > + Value2 =3D (UINT32)(RV_X(*(UINT32 *)Fixup, 7, 5) | (RV_X(*(UINT= 32 > *)Fixup, 25, 7) << 5)); > + if (Value2 & (RISCV_IMM_REACH/2)) { > + Value2 |=3D ~(RISCV_IMM_REACH-1); > + } > + Value +=3D Value2; > + Value +=3D (UINT32)Adjust; > + Value2 =3D RISCV_CONST_HIGH_PART (Value); > + *(UINT32 *)RiscVHi20Fixup =3D (RV_X (Value2, 12, 20) << 12) | \ > + (RV_X (*(UINT32 *)RiscVHi20F= ixup, 0, 12)); > + Value2 =3D *(UINT32 *)Fixup & 0x01fff07f; > + Value &=3D RISCV_IMM_REACH - 1; > + *(UINT32 *)Fixup =3D Value2 | (UINT32)(((RV_X(Value, 0, 5) << 7= ) | > (RV_X(Value, 5, 7) << 25))); > + } > + break; > + > + default: > + return RETURN_UNSUPPORTED; > + > + } > + return RETURN_SUCCESS; > +} > + > +/** > + Returns TRUE if the machine type of PE/COFF image is supported. > +Supported > + does not mean the image can be executed it means the PE/COFF loader > +supports > + loading and relocating of the image type. It's up to the caller to > +support > + the entry point. > + > + @param Machine Machine type from the PE Header. > + > + @return TRUE if this PE/COFF loader can load the image > + > +**/ > +BOOLEAN > +PeCoffLoaderImageFormatSupported ( > + IN UINT16 Machine > + ) > +{ > + if ((Machine =3D=3D IMAGE_FILE_MACHINE_RISCV32) || (Machine =3D=3D > IMAGE_FILE_MACHINE_RISCV64)) { > + return TRUE; > + } > + > + return FALSE; > +} > + > +/** > + Performs an Itanium-based specific re-relocation fixup and is a no-op > +on other > + instruction sets. This is used to re-relocated the image into the EFI > +virtual > + space for runtime calls. > + > + @param Reloc The pointer to the relocation record. > + @param Fixup The pointer to the address to fix up. > + @param FixupData The pointer to a buffer to log the fixups. > + @param Adjust The offset to adjust the fixup. > + > + @return Status code. > + > +**/ > +RETURN_STATUS > +PeHotRelocateImageEx ( > + IN UINT16 *Reloc, > + IN OUT CHAR8 *Fixup, > + IN OUT CHAR8 **FixupData, > + IN UINT64 Adjust > + ) > +{ > + return RETURN_UNSUPPORTED; > +} > -- > 2.7.4 >=20 >=20 >=20