From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from NAM02-BL2-obe.outbound.protection.outlook.com (mail-bl2nam02on0726.outbound.protection.outlook.com [IPv6:2a01:111:f400:fe46::726]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DB5AF8197E for ; Thu, 5 Jan 2017 04:16:59 -0800 (PST) Received: from CS1PR84MB0230.NAMPRD84.PROD.OUTLOOK.COM (10.162.190.152) by CS1PR84MB0230.NAMPRD84.PROD.OUTLOOK.COM (10.162.190.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.817.10; Thu, 5 Jan 2017 12:16:57 +0000 Received: from CS1PR84MB0230.NAMPRD84.PROD.OUTLOOK.COM ([10.162.190.152]) by CS1PR84MB0230.NAMPRD84.PROD.OUTLOOK.COM ([10.162.190.152]) with mapi id 15.01.0817.012; Thu, 5 Jan 2017 12:16:57 +0000 From: "Alcantara, Paulo" To: Rafael Machado , "edk2-devel@lists.01.org" Thread-Topic: [edk2] Question about OS initialization at UEFI firmware (x86) Thread-Index: AQHSZ0s9dnxrs+v4qEqLAok6FKBLzaEpy/BA Date: Thu, 5 Jan 2017 12:16:57 +0000 Message-ID: References: In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=paulo.alc.cavalcanti@hp.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Rafael Machado > Sent: quinta-feira, 5 de janeiro de 2017 10:00 > To: edk2-devel@lists.01.org > Subject: [edk2] Question about OS initialization at UEFI firmware (x86) >=20 > Hi everyone >=20 > I was taking a look at how the OS boots after the firmware and bootloader > are done. >=20 > To understand this I started to take a look at the linux source code, and= the > strange is that I saw some bios legacy interrupts being called. >=20 > The flow I checked is this: >=20 > void main(void) --> linux/arch/x86/boot/main.c > int detect_memory(void) --> linux/arch/x86/boot/memory.c > static int detect_memory_e820(void) --> > linux/arch/x86/boot/memory.c > intcall(0x15, &ireg, &oreg) --> linux/arch/x86/boot/me= mory.c >=20 >=20 > At the last call the value of ireg is this one: >=20 > ireg.ax =3D 0xe820; > ireg.cx =3D sizeof buf; > ireg.edx =3D SMAP; > ireg.di =3D (size_t)&buf; >=20 >=20 > As we can see this is done so the OS knows the memory map, so the OS can > do all its magic. >=20 > Finally, my question is: >=20 > How could linux, or any other OS, boot on a system with UEFI firmware tha= t > does not have CSM (compatibility support module) ? The code you pasted above seems to be executed when booting Linux on PC BIOS firmware. See below. > I consider that some parts of the hypothetical OS need to be written to c= all > some UEFI protocols. Am I right ? As far as I know, there are currently two ways of booting Linux on UEFI firmware: 1) The OS loader (bootloader as a PE/COFF image) uses the EFI handover protocol to boot the Linux kernel image. What the loader does is basically to find the entry point offset (handover_offset) in that image and jump to it. The entry point conforms to ABI defined in UEFI spec. 2) The kernel may be built as PE/COFF binary (UEFI image) so the firmware c= an directly boot it at BDS without any external OS loader. You might want to look at how OVMF boots up Linux through QEMU's command-li= ne parameter "-kernel" by using EFI handover protocol. -Paulo