From: "Andrei Warkentin" <awarkentin@vmware.com>
To: Pete Batard <pete@akeo.ie>,
Jeff Booher-Kaeding <jeff.booher-kaeding@arm.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>,
Leif Lindholm <leif@nuviainc.com>
Subject: Re: [PATCH v1 1/1] Platform/RaspberryPi/ConfigDxe: Fix JTAG Pinout for Pi3/4
Date: Mon, 21 Sep 2020 20:01:01 +0000 [thread overview]
Message-ID: <CY4PR05MB341362751FBC9A4FA4DB6D7BB93A0@CY4PR05MB3413.namprd05.prod.outlook.com> (raw)
In-Reply-To: <c85e6bb9-ab95-73db-2597-39f11a61a605@akeo.ie>
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Hi folks,
No objection at all. IIRC the original pin selection was driven by an article I read about using OpenOCD with Pi 3.
A
________________________________
From: Pete Batard <pete@akeo.ie>
Sent: Tuesday, September 15, 2020 7:26 AM
To: Jeff Booher-Kaeding <jeff.booher-kaeding@arm.com>; devel@edk2.groups.io <devel@edk2.groups.io>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>; Leif Lindholm <leif@nuviainc.com>; Andrei Warkentin <awarkentin@vmware.com>
Subject: Re: [PATCH v1 1/1] Platform/RaspberryPi/ConfigDxe: Fix JTAG Pinout for Pi3/4
Copying Andrei on this, as the existing JTAG pinout is not technically
incorrect, since GPIO pin 4 can be used for TDI in ALT5 mode, and we are
using the relevant ALT mode in the existing code. See
https://nam04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fsysprogs.com%2FVisualKernel%2Ftutorials%2Fraspberry%2Fjtagsetup%2F&data=02%7C01%7Cawarkentin%40vmware.com%7C1c1badf5e6f1433b44b508d859728a32%7Cb39138ca3cee4b4aa4d6cd83d9dd62f0%7C0%7C0%7C637357695767996220&sdata=rGIzM4Io36gFJrAK%2F4xZs0fm0DpXVvamhOYYXfc09ek%3D&reserved=0
As far as I'm concerned, I think it makes sense to use the same ALT mode
and have all the JTAG pins grouped, but I'd like to confirm whether we
deliberately chose not to use GPIO 26 in order to leave it available for
some other purpose, before I approve this patch.
If Andrei says he's okay with it, then I see no objection to this change.
Regards,
/Pete
On 2020.09.14 22:32, Jeff Booher-Kaeding wrote:
> Updated the pinout to match the Pi4 datasheet, tested with the RPi4, Pi3 Datasheet has same pinout.
>
> Signed-off-by: Jeff Booher-Kaeding <Jeff.booher-kaeding@arm.com>
>
> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Pete Batard <pete@akeo.ie>
> ---
> Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
> index ac1004fe1836..6e793efb8227 100644
> --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
> +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
> @@ -502,7 +502,7 @@ ApplyVariables (
> * 1 VREF N/A 1
>
> * 3 nTRST GPIO22 ALT4 15
>
> * 4 GND N/A 9
>
> - * 5 TDI GPIO4 ALT5 7
>
> + * 5 TDI GPIO26 ALT4 37
>
> * 7 TMS GPIO27 ALT4 13
>
> * 9 TCK GPIO25 ALT4 22
>
> * 11 RTCK GPIO23 ALT4 16
>
> @@ -510,14 +510,14 @@ ApplyVariables (
> */
>
> if (PcdGet32 (PcdDebugEnableJTAG)) {
>
> GpioPinFuncSet (22, GPIO_FSEL_ALT4);
>
> - GpioPinFuncSet (4, GPIO_FSEL_ALT5);
>
> + GpioPinFuncSet (26, GPIO_FSEL_ALT4);
>
> GpioPinFuncSet (27, GPIO_FSEL_ALT4);
>
> GpioPinFuncSet (25, GPIO_FSEL_ALT4);
>
> GpioPinFuncSet (23, GPIO_FSEL_ALT4);
>
> GpioPinFuncSet (24, GPIO_FSEL_ALT4);
>
> } else {
>
> GpioPinFuncSet (22, GPIO_FSEL_INPUT);
>
> - GpioPinFuncSet (4, GPIO_FSEL_INPUT);
>
> + GpioPinFuncSet (26, GPIO_FSEL_INPUT);
>
> GpioPinFuncSet (27, GPIO_FSEL_INPUT);
>
> GpioPinFuncSet (25, GPIO_FSEL_INPUT);
>
> GpioPinFuncSet (23, GPIO_FSEL_INPUT);
>
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next prev parent reply other threads:[~2020-09-21 20:01 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-14 21:32 [PATCH v1 1/1] Platform/RaspberryPi/ConfigDxe: Fix JTAG Pinout for Pi3/4 Jeff.Booher-Kaeding
2020-09-15 12:26 ` Pete Batard
2020-09-21 20:01 ` Andrei Warkentin [this message]
2020-09-29 14:01 ` [edk2-devel] " Samer El-Haj-Mahmoud
2020-10-05 12:07 ` Pete Batard
2020-10-05 14:30 ` Ard Biesheuvel
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