From: "Dong, Eric" <eric.dong@intel.com>
To: "Ni, Ray" <ray.ni@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: Laszlo Ersek <lersek@redhat.com>,
"Kumar, Rahul1" <rahul1.kumar@intel.com>
Subject: Re: [PATCH] UefiCpuPkg/PiSmmCpu: Remove hardcode 48 address size limitation
Date: Thu, 13 May 2021 03:32:43 +0000 [thread overview]
Message-ID: <CY4PR11MB12729556C32E17BCA3374327FE519@CY4PR11MB1272.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20210512045310.302-1-ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
-----Original Message-----
From: Ni, Ray <ray.ni@intel.com>
Sent: Wednesday, May 12, 2021 12:53 PM
To: devel@edk2.groups.io
Cc: Dong, Eric <eric.dong@intel.com>; Laszlo Ersek <lersek@redhat.com>; Kumar, Rahul1 <rahul1.kumar@intel.com>
Subject: [PATCH] UefiCpuPkg/PiSmmCpu: Remove hardcode 48 address size limitation
5-level paging can be enabled on CPU which supports up to 52 physical
address size. But when the feature was enabled, the 48 address size
limit was not removed and the 5-level paging testing didn't access
address >= 2^48. So the issue wasn't detected until recently an
address >= 2^48 is accessed.
Change-Id: Iaedc73be318d4b4122071efc3ba6e967a4b58fc3
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
---
UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 26 ++++++++++++++++++--------
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index fd6583f9d1..89143810b6 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -1887,11 +1887,13 @@ InitializeMpServiceData (
IN UINTN ShadowStackSize
)
{
- UINT32 Cr3;
- UINTN Index;
- UINT8 *GdtTssTables;
- UINTN GdtTableStepSize;
- CPUID_VERSION_INFO_EDX RegEdx;
+ UINT32 Cr3;
+ UINTN Index;
+ UINT8 *GdtTssTables;
+ UINTN GdtTableStepSize;
+ CPUID_VERSION_INFO_EDX RegEdx;
+ UINT32 MaxExtendedFunction;
+ CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize;
//
// Determine if this CPU supports machine check
@@ -1918,9 +1920,17 @@ InitializeMpServiceData (
// Initialize physical address mask
// NOTE: Physical memory above virtual address limit is not supported !!!
//
- AsmCpuid (0x80000008, (UINT32*)&Index, NULL, NULL, NULL);
- gPhyMask = LShiftU64 (1, (UINT8)Index) - 1;
- gPhyMask &= (1ull << 48) - EFI_PAGE_SIZE;
+ AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NULL);
+ if (MaxExtendedFunction >= CPUID_VIR_PHY_ADDRESS_SIZE) {
+ AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &VirPhyAddressSize.Uint32, NULL, NULL, NULL);
+ } else {
+ VirPhyAddressSize.Bits.PhysicalAddressBits = 36;
+ }
+ gPhyMask = LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalAddressBits) - 1;
+ //
+ // Clear the low 12 bits
+ //
+ gPhyMask &= 0xfffffffffffff000ULL;
//
// Create page tables
--
2.31.1.windows.1
next prev parent reply other threads:[~2021-05-13 3:33 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-12 4:53 [PATCH] UefiCpuPkg/PiSmmCpu: Remove hardcode 48 address size limitation Ni, Ray
2021-05-13 3:32 ` Dong, Eric [this message]
2021-05-14 10:55 ` [edk2-devel] " Laszlo Ersek
2021-05-15 0:04 ` Ni, Ray
2021-05-16 1:39 ` Laszlo Ersek
2021-05-18 7:51 ` Ni, Ray
2021-05-18 18:42 ` Laszlo Ersek
2021-05-20 4:28 ` Ni, Ray
2021-05-20 7:50 ` Laszlo Ersek
2021-05-20 11:11 ` Michael Brown
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