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charset="us-ascii" Content-Transfer-Encoding: quoted-printable -----Original Message----- From: Wu, Hao A =20 Sent: Thursday, January 31, 2019 10:56 PM To: Jeff Brasen ; edk2-devel@lists.01.org Cc: Edgar Handal Subject: RE: [edk2] [PATCH] MdeModulePkg/SdMmcPciHcDxe: Use 16/32-bit IO = widths > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of = > Jeff Brasen > Sent: Thursday, January 31, 2019 7:59 AM > To: edk2-devel@lists.01.org > Cc: Edgar Handal; Jeff Brasen > Subject: [edk2] [PATCH] MdeModulePkg/SdMmcPciHcDxe: Use 16/32-bit IO=20 > widths >=20 > From: Edgar Handal >=20 > Use 16-bit and 32-bit IO widths for SDMMC MMIO to prevent all register = > accesses from being split up into 8-bit accesses. >=20 > The SDHCI specification states that the registers shall be accessable=20 > in byte, word, and double word accesses. Hi, Thanks for the contribution. The change seems good to me. Just curious, if the accesses are always slit into byte(8-bit), is there = any issue or performance impact is encountered during your usage? It will be helpful to get more information on the purpose of the patch. Thanks. Best Regards, Hao Wu [JMB] We were working with a simulation module that has some issues when = accessing 16 or 32 bit registers by byte (This should be supported per th= e SDHCI specification.), and this patch resolves this while we work on ge= tting the model fixed. This should also optimize performance as there wil= l less read/write instructions (My guess is this is a marginal improvemen= t as most of the SD access time would be DMA operations.) Thanks, Jeff =20 >=20 > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Jeff Brasen > --- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 25 > ++++++++++++++++++++---- > 1 file changed, 21 insertions(+), 4 deletions(-) >=20 > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > index 5aec8c6..82f4493 100644 > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > @@ -152,19 +152,36 @@ SdMmcHcRwMmio ( > ) > { > EFI_STATUS Status; > + EFI_PCI_IO_PROTOCOL_WIDTH Width; >=20 > if ((PciIo =3D=3D NULL) || (Data =3D=3D NULL)) { > return EFI_INVALID_PARAMETER; > } >=20 > - if ((Count !=3D 1) && (Count !=3D 2) && (Count !=3D 4) && (Count !=3D= =208)) { > - return EFI_INVALID_PARAMETER; > + switch (Count) { > + case 1: > + Width =3D EfiPciIoWidthUint8; > + break; > + case 2: > + Width =3D EfiPciIoWidthUint16; > + Count =3D 1; > + break; > + case 4: > + Width =3D EfiPciIoWidthUint32; > + Count =3D 1; > + break; > + case 8: > + Width =3D EfiPciIoWidthUint32; > + Count =3D 2; > + break; > + default: > + return EFI_INVALID_PARAMETER; > } >=20 > if (Read) { > Status =3D PciIo->Mem.Read ( > PciIo, > - EfiPciIoWidthUint8, > + Width, > BarIndex, > (UINT64) Offset, > Count, > @@ -173,7 +190,7 @@ SdMmcHcRwMmio ( > } else { > Status =3D PciIo->Mem.Write ( > PciIo, > - EfiPciIoWidthUint8, > + Width, > BarIndex, > (UINT64) Offset, > Count, > -- > 2.7.4 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel -------------------------------------------------------------------------= ---------- This email message is for the sole use of the intended recipient(s) and m= ay contain confidential information. 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