From: "Duran, Leo" <leo.duran@amd.com>
To: Laszlo Ersek <lersek@redhat.com>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>,
Jeff Fan <jeff.fan@intel.com>, Liming Gao <liming.gao@intel.com>,
"Singh, Brijesh" <brijesh.singh@amd.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Igor Mammedov <imammedo@redhat.com>
Subject: Re: [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.
Date: Thu, 14 Jun 2018 14:08:08 +0000 [thread overview]
Message-ID: <CY4PR12MB1815240A1DFB19C91262775BF97D0@CY4PR12MB1815.namprd12.prod.outlook.com> (raw)
In-Reply-To: <9e2b3f74-c37e-06d9-293e-04976713ce8c@redhat.com>
> -----Original Message-----
> From: Laszlo Ersek <lersek@redhat.com>
> Sent: Wednesday, June 13, 2018 3:50 PM
> To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> Cc: Jordan Justen <jordan.l.justen@intel.com>; Jeff Fan
> <jeff.fan@intel.com>; Liming Gao <liming.gao@intel.com>; Singh, Brijesh
> <brijesh.singh@amd.com>; Paolo Bonzini <pbonzini@redhat.com>; Igor
> Mammedov <imammedo@redhat.com>
> Subject: Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second
> SendIpi sequence on AMD processors.
>
> Hello Leo,
>
> On 06/13/18 22:11, Leo Duran wrote:
> > On AMD processors the second SendIpi in the SendInitSipiSipi and
> > SendInitSipiSipiAllExcludingSelf routines is not required, and may
> > cause undesired side-effects during MP initialization.
> >
> > This patch leverages the StandardSignatureIsAuthenticAMD check to
> > exclude the second SendIpi and its associated MicroSecondDelay (200).
>
> QEMU and KVM emulate some AMD processors too; of particular interest is
> the recent EPYC addition, I believe (for SME/SEV, minimally).
>
> Did you check whether the StandardSignatureIsAuthenticAMD() check
> applies to those QEMU VCPU models, and if so, whether omitting the second
> Startup IPI interferes with *V*CPU startup in OVMF guests? (In
> multiprocessing modules, such as CpuMpPei, CpuDxe, and
> PiSmmCpuDxeSmm.)
>
> Adding Brijesh, Paolo and Igor.
>
> Thanks!
> Laszlo
Hi Lazlo,
My understanding is that hypervisors simply ignore the second SIPI, so a single (or double) SIPI should be fine.
In any event, I'm checking with Brijesh on your specific question.
Leo.
>
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Leo Duran <leo.duran@amd.com>
> > Cc: Jordan Justen <jordan.l.justen@intel.com>
> > Cc: Jeff Fan <jeff.fan@intel.com>
> > Cc: Liming Gao <liming.gao@intel.com>
> > ---
> > UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 12 ++++++++----
> > UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 12
> > ++++++++----
> > 2 files changed, 16 insertions(+), 8 deletions(-)
> >
> > diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> > b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> > index b0b7e32..6e80536 100644
> > --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> > +++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> > @@ -554,8 +554,10 @@ SendInitSipiSipi (
> > IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
> > IcrLow.Bits.Level = 1;
> > SendIpi (IcrLow.Uint32, ApicId);
> > - MicroSecondDelay (200);
> > - SendIpi (IcrLow.Uint32, ApicId);
> > + if (!StandardSignatureIsAuthenticAMD()) {
> > + MicroSecondDelay (200);
> > + SendIpi (IcrLow.Uint32, ApicId);
> > + }
> > }
> >
> > /**
> > @@ -588,8 +590,10 @@ SendInitSipiSipiAllExcludingSelf (
> > IcrLow.Bits.Level = 1;
> > IcrLow.Bits.DestinationShorthand =
> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
> > SendIpi (IcrLow.Uint32, 0);
> > - MicroSecondDelay (200);
> > - SendIpi (IcrLow.Uint32, 0);
> > + if (!StandardSignatureIsAuthenticAMD()) {
> > + MicroSecondDelay (200);
> > + SendIpi (IcrLow.Uint32, 0);
> > + }
> > }
> >
> > /**
> > diff --git
> > a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> > b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> > index 1f4dcf7..5d82836 100644
> > --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> > +++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> > @@ -649,8 +649,10 @@ SendInitSipiSipi (
> > IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
> > IcrLow.Bits.Level = 1;
> > SendIpi (IcrLow.Uint32, ApicId);
> > - MicroSecondDelay (200);
> > - SendIpi (IcrLow.Uint32, ApicId);
> > + if (!StandardSignatureIsAuthenticAMD()) {
> > + MicroSecondDelay (200);
> > + SendIpi (IcrLow.Uint32, ApicId);
> > + }
> > }
> >
> > /**
> > @@ -683,8 +685,10 @@ SendInitSipiSipiAllExcludingSelf (
> > IcrLow.Bits.Level = 1;
> > IcrLow.Bits.DestinationShorthand =
> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
> > SendIpi (IcrLow.Uint32, 0);
> > - MicroSecondDelay (200);
> > - SendIpi (IcrLow.Uint32, 0);
> > + if (!StandardSignatureIsAuthenticAMD()) {
> > + MicroSecondDelay (200);
> > + SendIpi (IcrLow.Uint32, 0);
> > + }
> > }
> >
> > /**
> >
next prev parent reply other threads:[~2018-06-14 14:08 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-13 20:11 [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi on AMD Leo Duran
2018-06-13 20:11 ` [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors Leo Duran
2018-06-13 20:49 ` Laszlo Ersek
2018-06-13 20:52 ` Paolo Bonzini
2018-06-14 5:39 ` Ni, Ruiyu
2018-06-14 9:04 ` Paolo Bonzini
2018-06-14 14:08 ` Duran, Leo [this message]
2018-06-14 14:52 ` Andrew Fish
2018-06-14 15:00 ` Laszlo Ersek
2018-06-14 15:47 ` Brijesh Singh
2018-06-14 16:36 ` Laszlo Ersek
2018-06-19 5:20 ` Dong, Eric
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