From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D054A21A143F5 for ; Wed, 6 Sep 2017 01:12:57 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Sep 2017 01:15:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,483,1498546800"; d="scan'208";a="1169543769" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga001.jf.intel.com with ESMTP; 06 Sep 2017 01:15:46 -0700 Received: from FMSMSX110.amr.corp.intel.com (10.18.116.10) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 6 Sep 2017 01:15:46 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx110.amr.corp.intel.com (10.18.116.10) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 6 Sep 2017 01:15:45 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.219]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.93]) with mapi id 14.03.0319.002; Wed, 6 Sep 2017 16:15:44 +0800 From: "Wang, Jian J" To: "lersek@redhat.com" , "Justen, Jordan L" , "Yao, Jiewen" CC: "edk2-devel@lists.01.org" , "Kinney, Michael D" Thread-Topic: ASSERT in QemuVideoDxe driver during reset Thread-Index: AdMm3ucKp6vfV+HORTuJKz09A23e7A== Date: Wed, 6 Sep 2017 08:15:43 +0000 Message-ID: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: ASSERT in QemuVideoDxe driver during reset X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 06 Sep 2017 08:12:58 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi guys, I found an ASSERT issue in function InstallVbeShim() in QemuVideoDxe driver= during reset. The assert statement is like below. ASSERT (Int0x10->Segment =3D=3D 0x0000); ASSERT (Int0x10->Offset =3D=3D 0x0000); This happened after I have enabled NULL pointer access detection feature, i= n which page 0 (4K) is disabled. And because of page 0 disabled, I have to= skip the memory clearing for page 0 in DXE core. Otherwise it will cause p= age fault exception there. It seems that QEMU may clear all its memory at s= tartup. Skipping the action of clearing page 0 in core won't cause ASSERT i= ssue in QemuVideoDxe, for the first time boot. But QemuVideoDxe will write = int10 vector at memory 0x10 and QEMU will not clear all its memory during w= arm boot. ASSERT will be triggered after reset. It's easy to fix this issue but there're some subtle situations which I'm n= ot quite certain. I'd like your opinions for them. Here're my thoughts on several solutions: a) Remove the ASSERT statement in InstallVbeShim(). But I'm sure if it is s= afe to do so because I don't quite understand the purpose of the ASSERT.=20 b) Instead of skipping clearing page 0, enable it, do clearing and then dis= able it. The problem here is that CPU arch protocol is not ready at that ti= me. I have to "manually" do page operation, which might be non-portable and= a little bit odd in DXE core. c) Move code clearing page 0 from DXE core to another place wherever approp= riate, like DxeIpl or cpu driver. But I think there's a good reason to put = code there before. Thanks, Wang, Jian J