From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4B7FD21D046BF for ; Mon, 18 Sep 2017 23:06:32 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Sep 2017 23:09:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,416,1500966000"; d="scan'208";a="1015967703" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga003.jf.intel.com with ESMTP; 18 Sep 2017 23:09:34 -0700 Received: from fmsmsx122.amr.corp.intel.com (10.18.125.37) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 18 Sep 2017 23:09:34 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by fmsmsx122.amr.corp.intel.com (10.18.125.37) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 18 Sep 2017 23:09:34 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.213]) by shsmsx102.ccr.corp.intel.com ([169.254.2.175]) with mapi id 14.03.0319.002; Tue, 19 Sep 2017 14:09:32 +0800 From: "Wang, Jian J" To: "Wang, Jian J" , "edk2-devel@lists.01.org" CC: "Kinney, Michael D" , Laszlo Ersek , "Yao, Jiewen" , "Zeng, Star" Thread-Topic: [edk2] [PATCH 0/2] Fixe out-of-sync issue between GCD and CPU driver Thread-Index: AQHTMCuEanW4oPdaFkOC8PmO+nHMQKK7uzHg Date: Tue, 19 Sep 2017 06:09:32 +0000 Message-ID: References: <20170918030855.11876-1-jian.j.wang@intel.com> In-Reply-To: <20170918030855.11876-1-jian.j.wang@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 0/2] Fixe out-of-sync issue between GCD and CPU driver X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 19 Sep 2017 06:06:32 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable I found there's a logic hole in code. A new patch will be sent out. -----Original Message----- From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Jian= J Wang Sent: Monday, September 18, 2017 11:09 AM To: edk2-devel@lists.01.org Cc: Kinney, Michael D ; Laszlo Ersek ; Yao, Jiewen ; Zeng, Star Subject: [edk2] [PATCH 0/2] Fixe out-of-sync issue between GCD and CPU driv= er There're two issues here actually. >>From GCD perspective, its SetMemorySpaceAttributes() method doesn't accept page related attributes. That means users cannot use it to change page attributes, and have to turn to CPU arch protocol to do it, which is not be allowed by PI spec. >>From CpuDxe driver perspective, it doesn't update GCD memory attributes=20 from current page table setup during its initialization. So the memory attributes in GCD might not reflect all memory attributes in real world. Cc: Jiewen Yao Cc: Star Zeng Cc: Laszlo Ersek Cc: Michael Kinney Suggested-by: Jiewen Yao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang Jian J Wang (2): MdeModulePkg/Core: Fix out-of-sync issue in GCD UefiCpuPkg/CpuDxe: Fix out-of-sync issue in page attributes MdeModulePkg/Core/Dxe/Gcd/Gcd.c | 45 ++++++++++++-------- UefiCpuPkg/CpuDxe/CpuDxe.c | 5 +++ UefiCpuPkg/CpuDxe/CpuDxe.h | 9 ++++ UefiCpuPkg/CpuDxe/CpuPageTable.c | 92 ++++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 133 insertions(+), 18 deletions(-) --=20 2.14.1.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel