From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=jian.j.wang@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 058AE2035BB16 for ; Wed, 22 Nov 2017 21:06:25 -0800 (PST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Nov 2017 21:10:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,440,1505804400"; d="scan'208";a="5440419" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga003.jf.intel.com with ESMTP; 22 Nov 2017 21:10:42 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 22 Nov 2017 21:10:01 -0800 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.213]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.93]) with mapi id 14.03.0319.002; Thu, 23 Nov 2017 13:09:18 +0800 From: "Wang, Jian J" To: "Yao, Jiewen" , "edk2-devel@lists.01.org" Thread-Topic: [edk2] [PATCH v2 0/8] Implement stack guard feature Thread-Index: AQHTY25f8NPET10+h0OFRElBub7gYKMgzryAgACcTTA= Date: Thu, 23 Nov 2017 05:09:18 +0000 Message-ID: References: <20171122084548.6564-1-jian.j.wang@intel.com> <74D8A39837DF1E4DA445A8C0B3885C503AA2901F@shsmsx102.ccr.corp.intel.com> In-Reply-To: <74D8A39837DF1E4DA445A8C0B3885C503AA2901F@shsmsx102.ccr.corp.intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiN2NiNWExOTctMWYyNS00MjJjLWFmN2EtNTM1NDJhYjY3ODBjIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjIuNS4xOCIsIlRydXN0ZWRMYWJlbEhhc2giOiI2SkN3ZmM1SnpSd1F6OGM0SGM0d3ZSWlhCSUxFenRVdkRlOVV5aVAxOVVpZXJlVnlwYVJHZ2hsQXBJdzd3VVdDIn0= x-ctpclassification: CTP_IC dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH v2 0/8] Implement stack guard feature X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 23 Nov 2017 05:06:26 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable I did test it with disabled. I'll try it enabled. Do you think this feature= should be enabled by default or not, just like the PcdCpuSmmStackGuard? > -----Original Message----- > From: Yao, Jiewen > Sent: Thursday, November 23, 2017 11:48 AM > To: Wang, Jian J ; edk2-devel@lists.01.org > Subject: RE: [edk2] [PATCH v2 0/8] Implement stack guard feature >=20 > For test, can we test boot OS (windows/Linux) with PcdCpuStackGuard enabl= ed? >=20 > Thank you > Yao Jiewen >=20 > > -----Original Message----- > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of = Jian > J > > Wang > > Sent: Wednesday, November 22, 2017 4:46 PM > > To: edk2-devel@lists.01.org > > Subject: [edk2] [PATCH v2 0/8] Implement stack guard feature > > > > Stack guard feature makes use of paging mechanism to monitor if there's= a > > stack overflow occurred during boot. A new PCD PcdCpuStackGuard is adde= d > to > > enable/disable this feature. PCD PcdCpuStackSwitchExceptionList and > > PcdCpuKnownGoodStackSize are introduced to configure the required > > exceptions > > and stack size. > > > > If this feature is enabled, DxeIpl will setup page tables and set page = where > > the stack bottom is at to be NON-PRESENT. If stack overflow occurs, Pag= e > > Fault exception will be triggered. > > > > In order to make sure exception handler works normally even when the st= ack > > is corrupted, stack switching is implemented in exception library. > > > > Due to the mechanism behind Stack Guard, this feature is only avaiable = for > > UEFI drivers (memory avaiable). That also means it doesn't support NT32 > > emulated platform (paging not supported). > > > > Validation works include: > > a. OVMF emulated platform: boot to shell (IA32/X64) > > b. Intel real platform: boot to shell (IA32/X64) > > > > Jian J Wang (8): > > MdeModulePkg/metafile: Add PCD PcdCpuStackGuard > > MdeModulePkg/CpuExceptionHandlerLib.h: Add a new API > > MdePkg/BaseLib: Add stack switch related definitions for IA32 > > MdeModulePkg/DxeIpl: Enable paging for Stack Guard > > UefiCpuPkg/UefiCpuPkg.dec: Add two new PCDs for stack switch > > UefiCpuPkg/MpLib: Add GDTR, IDTR and TR in saved AP data > > UefiCpuPkg/CpuExceptionHandlerLib: Add stack switch support > > UefiCpuPkg/CpuDxe: Initialize stack switch for MP > > > > MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 5 +- > > MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c | 4 + > > MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c | 1 + > > MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 51 ++- > > .../Include/Library/CpuExceptionHandlerLib.h | 18 + > > MdeModulePkg/MdeModulePkg.dec | 7 + > > MdeModulePkg/MdeModulePkg.uni | 7 + > > MdePkg/Include/Library/BaseLib.h | 115 ++++++ > > MdePkg/Library/BaseLib/BaseLib.inf | 3 + > > MdePkg/Library/BaseLib/Ia32/WriteTr.nasm | 36 ++ > > MdePkg/Library/BaseLib/X64/WriteTr.nasm | 37 ++ > > UefiCpuPkg/CpuDxe/CpuDxe.inf | 3 + > > UefiCpuPkg/CpuDxe/CpuMp.c | 168 +++++++++ > > UefiCpuPkg/CpuDxe/CpuMp.h | 12 + > > .../CpuExceptionHandlerLib/CpuExceptionCommon.h | 50 +++ > > .../DxeCpuExceptionHandlerLib.inf | 6 + > > .../Library/CpuExceptionHandlerLib/DxeException.c | 53 ++- > > .../Ia32/ArchExceptionHandler.c | 167 +++++++++ > > .../Ia32/ArchInterruptDefs.h | 8 + > > .../Ia32/ExceptionTssEntryAsm.nasm | 398 > > +++++++++++++++++++++ > > .../PeiCpuExceptionHandlerLib.inf | 1 + > > .../SecPeiCpuExceptionHandlerLib.inf | 1 + > > .../SmmCpuExceptionHandlerLib.inf | 1 + > > .../X64/ArchExceptionHandler.c | 133 +++++++ > > .../CpuExceptionHandlerLib/X64/ArchInterruptDefs.h | 3 + > > UefiCpuPkg/Library/MpInitLib/MpLib.c | 17 + > > UefiCpuPkg/Library/MpInitLib/MpLib.h | 3 + > > UefiCpuPkg/UefiCpuPkg.dec | 12 + > > 28 files changed, 1304 insertions(+), 16 deletions(-) > > create mode 100644 MdePkg/Library/BaseLib/Ia32/WriteTr.nasm > > create mode 100644 MdePkg/Library/BaseLib/X64/WriteTr.nasm > > create mode 100644 > > > UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionTssEntryAsm.nasm > > > > -- > > 2.14.1.windows.1 > > > > _______________________________________________ > > edk2-devel mailing list > > edk2-devel@lists.01.org > > https://lists.01.org/mailman/listinfo/edk2-devel