From: "Wang, Jian J" <jian.j.wang@intel.com>
To: "Zeng, Star" <star.zeng@intel.com>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: "Yao, Jiewen" <jiewen.yao@intel.com>,
"Ni, Ruiyu" <ruiyu.ni@intel.com>,
"Dong, Eric" <eric.dong@intel.com>
Subject: Re: [PATCH v2 0/4] Enable page table write protection
Date: Mon, 4 Dec 2017 09:26:28 +0000 [thread overview]
Message-ID: <D827630B58408649ACB04F44C510003624CBA554@SHSMSX103.ccr.corp.intel.com> (raw)
In-Reply-To: <0C09AFA07DD0434D9E2A0C6AEB0483103B9BF42B@shsmsx102.ccr.corp.intel.com>
That means we can't share page table pool between DxeIpl and CpuDxe. If this is
acceptable, I can remove them.
> -----Original Message-----
> From: Zeng, Star
> Sent: Monday, December 04, 2017 5:11 PM
> To: Wang, Jian J <jian.j.wang@intel.com>; edk2-devel@lists.01.org
> Cc: Yao, Jiewen <jiewen.yao@intel.com>; Ni, Ruiyu <ruiyu.ni@intel.com>; Dong,
> Eric <eric.dong@intel.com>; Zeng, Star <star.zeng@intel.com>
> Subject: RE: [edk2] [PATCH v2 0/4] Enable page table write protection
>
> Recommend to not introduce the new header file and PCDs as new interfaces,
> but handle the page table pool separately in DxeIpl and CpuDxe.
>
> Thanks,
> Star
> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Jian J
> Wang
> Sent: Monday, December 4, 2017 4:36 PM
> To: edk2-devel@lists.01.org
> Subject: [edk2] [PATCH v2 0/4] Enable page table write protection
>
> > v2 changes:
> > a. Enable protection on any newly added page table after DxeIpl.
> > b. Introduce page table pool concept to make page table allocation
> > and protection easier and error free.
>
> Write Protect feature (CR0.WP) is always enabled in driver UefiCpuPkg/CpuDxe.
> But the memory pages used for page table are not set as read-only in the driver
> DxeIplPeim, after the paging is setup. This might jeopardize the page table
> integrity if there's buffer overflow occured in other part of system.
>
> This patch series will change this situation by clearing R/W bit in page attribute
> of the pages used as page table.
>
> Validation works include booting Windows (10/server 2016) and Linux
> (Fedora/Ubuntu) on OVMF and Intel real platform.
>
> Jian J Wang (4):
> MdeModulePkg/MdeModulePkg.dec: Add new PCDs and Guid
> MdeModulePkg/PageTablePool.h: Page table pool GUID definition file
> MdeModulePkg/DxeIpl: Mark page table as read-only
> UefiCpuPkg/CpuDxe: Enable protection for newly added page table
>
> MdeModulePkg/Core/DxeIplPeim/DxeIpl.h | 34 +++
> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 3 +
> MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c | 8 +-
> MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 315
> +++++++++++++++++++++-
> MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h | 15 ++
> MdeModulePkg/Include/Guid/PageTablePool.h | 53 ++++
> MdeModulePkg/MdeModulePkg.dec | 28 ++
> UefiCpuPkg/CpuDxe/CpuDxe.c | 17 +-
> UefiCpuPkg/CpuDxe/CpuDxe.h | 2 +
> UefiCpuPkg/CpuDxe/CpuDxe.inf | 3 +
> UefiCpuPkg/CpuDxe/CpuPageTable.c | 329
> ++++++++++++++++++++++-
> UefiCpuPkg/CpuDxe/CpuPageTable.h | 22 ++
> 12 files changed, 816 insertions(+), 13 deletions(-) create mode 100644
> MdeModulePkg/Include/Guid/PageTablePool.h
>
> --
> 2.14.1.windows.1
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
next prev parent reply other threads:[~2017-12-04 9:22 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-04 8:35 [PATCH v2 0/4] Enable page table write protection Jian J Wang
2017-12-04 8:35 ` [PATCH v2 1/4] MdeModulePkg/MdeModulePkg.dec: Add new PCDs and Guid Jian J Wang
2017-12-04 8:35 ` [PATCH v2 2/4] MdeModulePkg/PageTablePool.h: Page table pool GUID definition file Jian J Wang
2017-12-04 8:35 ` [PATCH v2 3/4] MdeModulePkg/DxeIpl: Mark page table as read-only Jian J Wang
2017-12-04 8:35 ` [PATCH v2 4/4] UefiCpuPkg/CpuDxe: Enable protection for newly added page table Jian J Wang
2017-12-04 9:11 ` [PATCH v2 0/4] Enable page table write protection Zeng, Star
2017-12-04 9:26 ` Wang, Jian J [this message]
2017-12-05 2:26 ` Yao, Jiewen
2017-12-05 6:26 ` Wang, Jian J
2017-12-05 2:31 ` Yao, Jiewen
2017-12-05 6:41 ` Wang, Jian J
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