* [PATCH 0/4] Coding style clean-up
@ 2017-12-25 1:06 Jian J Wang
2017-12-25 1:06 ` [PATCH 1/4] MdePkg/BaseLib.h: " Jian J Wang
` (4 more replies)
0 siblings, 5 replies; 19+ messages in thread
From: Jian J Wang @ 2017-12-25 1:06 UTC (permalink / raw)
To: edk2-devel
This patch series are meant for cleaning up code according to coding style
requirements.
Jian J Wang (4):
MdePkg/BaseLib.h: Coding style clean-up
MdeModulePkg/Core: Coding style clean-up
UefiCpuPkg/UefiCpuPkg.uni: Add missing string definition for new PCDs
UefiCpuPkg: Update code to use new structure field names
MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 5 ++
MdePkg/Include/Library/BaseLib.h | 72 +++++++++++-----------
.../Ia32/ArchExceptionHandler.c | 24 ++++----
.../X64/ArchExceptionHandler.c | 6 +-
UefiCpuPkg/Library/MpInitLib/MpLib.c | 2 +-
UefiCpuPkg/UefiCpuPkg.uni | 16 ++++-
6 files changed, 71 insertions(+), 54 deletions(-)
--
2.15.1.windows.2
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 1/4] MdePkg/BaseLib.h: Coding style clean-up
2017-12-25 1:06 [PATCH 0/4] Coding style clean-up Jian J Wang
@ 2017-12-25 1:06 ` Jian J Wang
2017-12-25 1:51 ` Bi, Dandan
2017-12-25 1:06 ` [PATCH 2/4] MdeModulePkg/Core: " Jian J Wang
` (3 subsequent siblings)
4 siblings, 1 reply; 19+ messages in thread
From: Jian J Wang @ 2017-12-25 1:06 UTC (permalink / raw)
To: edk2-devel; +Cc: Dandan Bi, Star Zeng, Eric Dong
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
---
MdePkg/Include/Library/BaseLib.h | 72 ++++++++++++++++++++--------------------
1 file changed, 36 insertions(+), 36 deletions(-)
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 2b98af4cd1..f51079aeb1 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -6672,41 +6672,41 @@ typedef union {
typedef struct {
UINT16 PreviousTaskLink;
UINT16 Reserved_2;
- UINT32 ESP0;
- UINT16 SS0;
+ UINT32 Esp0;
+ UINT16 Ss0;
UINT16 Reserved_10;
- UINT32 ESP1;
- UINT16 SS1;
+ UINT32 Esp1;
+ UINT16 Ss1;
UINT16 Reserved_18;
- UINT32 ESP2;
- UINT16 SS2;
+ UINT32 Esp2;
+ UINT16 Ss2;
UINT16 Reserved_26;
- UINT32 CR3;
- UINT32 EIP;
- UINT32 EFLAGS;
- UINT32 EAX;
- UINT32 ECX;
- UINT32 EDX;
- UINT32 EBX;
- UINT32 ESP;
- UINT32 EBP;
- UINT32 ESI;
- UINT32 EDI;
- UINT16 ES;
+ UINT32 Cr3;
+ UINT32 Eip;
+ UINT32 Eflags;
+ UINT32 Eax;
+ UINT32 Ecx;
+ UINT32 Edx;
+ UINT32 Ebx;
+ UINT32 Esp;
+ UINT32 Ebp;
+ UINT32 Esi;
+ UINT32 Edi;
+ UINT16 Es;
UINT16 Reserved_74;
- UINT16 CS;
+ UINT16 Cs;
UINT16 Reserved_78;
- UINT16 SS;
+ UINT16 Ss;
UINT16 Reserved_82;
- UINT16 DS;
+ UINT16 Ds;
UINT16 Reserved_86;
- UINT16 FS;
+ UINT16 Fs;
UINT16 Reserved_90;
- UINT16 GS;
+ UINT16 Gs;
UINT16 Reserved_94;
UINT16 LDTSegmentSelector;
UINT16 Reserved_98;
- UINT16 T;
+ UINT16 Tflag;
UINT16 IOMapBaseAddress;
} IA32_TASK_STATE_SEGMENT;
@@ -6717,12 +6717,12 @@ typedef union {
UINT32 BaseMid:8; ///< Base Address 23..16
UINT32 Type:4; ///< Type (1 0 B 1)
UINT32 Reserved_43:1; ///< 0
- UINT32 DPL:2; ///< Descriptor Privilege Level
- UINT32 P:1; ///< Segment Present
+ UINT32 Dpl:2; ///< Descriptor Privilege Level
+ UINT32 Present:1; ///< Segment Present
UINT32 LimitHigh:4; ///< Segment Limit 19..16
- UINT32 AVL:1; ///< Available for use by system software
+ UINT32 Avl:1; ///< Available for use by system software
UINT32 Reserved_52:2; ///< 0 0
- UINT32 G:1; ///< Granularity
+ UINT32 Granularity:1; ///< Granularity
UINT32 BaseHigh:8; ///< Base Address 31..24
} Bits;
UINT64 Uint64;
@@ -6757,11 +6757,11 @@ typedef union {
//
typedef struct {
UINT32 Reserved_0;
- UINT64 RSP0;
- UINT64 RSP1;
- UINT64 RSP2;
+ UINT64 Rsp0;
+ UINT64 Rsp1;
+ UINT64 Rsp2;
UINT64 Reserved_28;
- UINT64 IST[7];
+ UINT64 Ist[7];
UINT64 Reserved_92;
UINT16 Reserved_100;
UINT16 IOMapBaseAddress;
@@ -6774,12 +6774,12 @@ typedef union {
UINT32 BaseMidl:8; ///< Base Address 23..16
UINT32 Type:4; ///< Type (1 0 B 1)
UINT32 Reserved_43:1; ///< 0
- UINT32 DPL:2; ///< Descriptor Privilege Level
- UINT32 P:1; ///< Segment Present
+ UINT32 Dpl:2; ///< Descriptor Privilege Level
+ UINT32 Present:1; ///< Segment Present
UINT32 LimitHigh:4; ///< Segment Limit 19..16
- UINT32 AVL:1; ///< Available for use by system software
+ UINT32 Avl:1; ///< Available for use by system software
UINT32 Reserved_52:2; ///< 0 0
- UINT32 G:1; ///< Granularity
+ UINT32 Granularity:1; ///< Granularity
UINT32 BaseMidh:8; ///< Base Address 31..24
UINT32 BaseHigh:32; ///< Base Address 63..32
UINT32 Reserved_96:32; ///< Reserved
--
2.15.1.windows.2
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 2/4] MdeModulePkg/Core: Coding style clean-up
2017-12-25 1:06 [PATCH 0/4] Coding style clean-up Jian J Wang
2017-12-25 1:06 ` [PATCH 1/4] MdePkg/BaseLib.h: " Jian J Wang
@ 2017-12-25 1:06 ` Jian J Wang
2017-12-25 1:19 ` Zeng, Star
2017-12-25 2:01 ` Bi, Dandan
2017-12-25 1:06 ` [PATCH 3/4] UefiCpuPkg/UefiCpuPkg.uni: Add missing string definition for new PCDs Jian J Wang
` (2 subsequent siblings)
4 siblings, 2 replies; 19+ messages in thread
From: Jian J Wang @ 2017-12-25 1:06 UTC (permalink / raw)
To: edk2-devel; +Cc: Dandan Bi, Star Zeng, Eric Dong
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
---
MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
index bbdfa2bb8e..d7a86c0d30 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
@@ -126,6 +126,11 @@ EnableExecuteDisableBit (
The function will check if page table entry should be splitted to smaller
granularity.
+ @param Address Physical memory address.
+ @param Size Size of the given physical memory.
+ @param StackBase Base address of stack.
+ @param StackSize Size of stack.
+
@retval TRUE Page table should be split.
@retval FALSE Page table should not be split.
**/
--
2.15.1.windows.2
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 3/4] UefiCpuPkg/UefiCpuPkg.uni: Add missing string definition for new PCDs
2017-12-25 1:06 [PATCH 0/4] Coding style clean-up Jian J Wang
2017-12-25 1:06 ` [PATCH 1/4] MdePkg/BaseLib.h: " Jian J Wang
2017-12-25 1:06 ` [PATCH 2/4] MdeModulePkg/Core: " Jian J Wang
@ 2017-12-25 1:06 ` Jian J Wang
2017-12-25 1:58 ` Bi, Dandan
2017-12-25 1:06 ` [PATCH 4/4] UefiCpuPkg: Update code to use new structure field names Jian J Wang
2017-12-26 16:47 ` [PATCH 0/4] Coding style clean-up Kinney, Michael D
4 siblings, 1 reply; 19+ messages in thread
From: Jian J Wang @ 2017-12-25 1:06 UTC (permalink / raw)
To: edk2-devel; +Cc: Dandan Bi, Eric Dong, Laszlo Ersek
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
---
UefiCpuPkg/UefiCpuPkg.uni | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/UefiCpuPkg/UefiCpuPkg.uni b/UefiCpuPkg/UefiCpuPkg.uni
index a7073b10c8..6fcfc6e7f2 100644
--- a/UefiCpuPkg/UefiCpuPkg.uni
+++ b/UefiCpuPkg/UefiCpuPkg.uni
@@ -230,5 +230,17 @@
"Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.<BR><BR>\n"
"This PCD is ignored if CPU processor trace is disabled.<BR><BR>\n"
"Default value is 0 which means single range output scheme will be used if CPU processor trace is enabled.<BR>\n"
- "0 - Single Range output scheme.<BR>\n"
- "1 - ToPA(Table of physical address) scheme.<BR>\n"
\ No newline at end of file
+ "0 - Single Range output scheme.<BR>\n"
+ "1 - ToPA(Table of physical address) scheme.<BR>\n"
+
+#STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuStackSwitchExceptionList_PROMPT #language en-US "Specify exception vectors which need switching stack."
+
+#STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuStackSwitchExceptionList_HELP #language en-US "List of exception vectors which need switching stack.\n"
+ "This PCD will only take into effect if PcdCpuStackGuard is enabled.n"
+ "By default exception #DD(8), #PF(14) are supported.n"
+
+#STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuKnownGoodStackSize_PROMPT #language en-US "Specify size of good stack of exception which need switching stack."
+
+#STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuKnownGoodStackSize_HELP #language en-US "Size of good stack for an exception.\n"
+ "This PCD will only take into effect if PcdCpuStackGuard is enabled.\n"
+
--
2.15.1.windows.2
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 4/4] UefiCpuPkg: Update code to use new structure field names
2017-12-25 1:06 [PATCH 0/4] Coding style clean-up Jian J Wang
` (2 preceding siblings ...)
2017-12-25 1:06 ` [PATCH 3/4] UefiCpuPkg/UefiCpuPkg.uni: Add missing string definition for new PCDs Jian J Wang
@ 2017-12-25 1:06 ` Jian J Wang
2017-12-25 2:01 ` Bi, Dandan
2017-12-26 16:47 ` [PATCH 0/4] Coding style clean-up Kinney, Michael D
4 siblings, 1 reply; 19+ messages in thread
From: Jian J Wang @ 2017-12-25 1:06 UTC (permalink / raw)
To: edk2-devel; +Cc: Dandan Bi, Eric Dong, Laszlo Ersek
Due to coding style fix of the structure definition in BaseLib.h, all
code referencing those structure must be updated accordingly.
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
---
.../Ia32/ArchExceptionHandler.c | 24 +++++++++++-----------
.../X64/ArchExceptionHandler.c | 6 +++---
UefiCpuPkg/Library/MpInitLib/MpLib.c | 2 +-
3 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
index 6ac8549839..4e89b0470f 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
@@ -216,7 +216,7 @@ ArchSetupExcpetionStack (
TssDesc->Bits.BaseLow = (UINT16)TssBase;
TssDesc->Bits.BaseMid = (UINT8)(TssBase >> 16);
TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;
- TssDesc->Bits.P = 1;
+ TssDesc->Bits.Present = 1;
TssDesc->Bits.LimitHigh = 0;
TssDesc->Bits.BaseHigh = (UINT8)(TssBase >> 24);
@@ -240,7 +240,7 @@ ArchSetupExcpetionStack (
TssDesc->Bits.BaseLow = (UINT16)TssBase;
TssDesc->Bits.BaseMid = (UINT8)(TssBase >> 16);
TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;
- TssDesc->Bits.P = 1;
+ TssDesc->Bits.Present = 1;
TssDesc->Bits.LimitHigh = 0;
TssDesc->Bits.BaseHigh = (UINT8)(TssBase >> 24);
@@ -253,17 +253,17 @@ ArchSetupExcpetionStack (
continue;
}
- Tss->EIP = (UINT32)(TemplateMap.ExceptionStart
+ Tss->Eip = (UINT32)(TemplateMap.ExceptionStart
+ Vector * TemplateMap.ExceptionStubHeaderSize);
- Tss->EFLAGS = 0x2;
- Tss->ESP = StackTop;
- Tss->CR3 = AsmReadCr3 ();
- Tss->ES = AsmReadEs ();
- Tss->CS = AsmReadCs ();
- Tss->SS = AsmReadSs ();
- Tss->DS = AsmReadDs ();
- Tss->FS = AsmReadFs ();
- Tss->GS = AsmReadGs ();
+ Tss->Eflags = 0x2;
+ Tss->Esp = StackTop;
+ Tss->Cr3 = AsmReadCr3 ();
+ Tss->Es = AsmReadEs ();
+ Tss->Cs = AsmReadCs ();
+ Tss->Ss = AsmReadSs ();
+ Tss->Ds = AsmReadDs ();
+ Tss->Fs = AsmReadFs ();
+ Tss->Gs = AsmReadGs ();
StackTop -= StackSwitchData->Ia32.KnownGoodStackSize;
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
index 1dcf4277de..4d52b4eb0e 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
@@ -186,7 +186,7 @@ ArchSetupExcpetionStack (
//
TssDesc = StackSwitchData->X64.ExceptionTssDesc;
Tss = StackSwitchData->X64.ExceptionTss;
- if (StackSwitchData->X64.StackSwitchExceptionNumber > ARRAY_SIZE (Tss->IST)) {
+ if (StackSwitchData->X64.StackSwitchExceptionNumber > ARRAY_SIZE (Tss->Ist)) {
return EFI_INVALID_PARAMETER;
}
@@ -221,7 +221,7 @@ ArchSetupExcpetionStack (
TssDesc->Bits.BaseLow = (UINT16)TssBase;
TssDesc->Bits.BaseMidl = (UINT8)(TssBase >> 16);
TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;
- TssDesc->Bits.P = 1;
+ TssDesc->Bits.Present = 1;
TssDesc->Bits.LimitHigh = 0;
TssDesc->Bits.BaseMidh = (UINT8)(TssBase >> 24);
TssDesc->Bits.BaseHigh = (UINT32)(TssBase >> 32);
@@ -236,7 +236,7 @@ ArchSetupExcpetionStack (
//
// Fixup IST
//
- Tss->IST[Index] = StackTop;
+ Tss->Ist[Index] = StackTop;
StackTop -= StackSwitchData->X64.KnownGoodStackSize;
//
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 0c2058a7b0..da1a43c430 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -243,7 +243,7 @@ RestoreVolatileRegisters (
VolatileRegisters->Tr < VolatileRegisters->Gdtr.Limit) {
Tss = (IA32_TSS_DESCRIPTOR *)(VolatileRegisters->Gdtr.Base +
VolatileRegisters->Tr);
- if (Tss->Bits.P == 1) {
+ if (Tss->Bits.Present == 1) {
Tss->Bits.Type &= 0xD; // 1101 - Clear busy bit just in case
AsmWriteTr (VolatileRegisters->Tr);
}
--
2.15.1.windows.2
^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH 2/4] MdeModulePkg/Core: Coding style clean-up
2017-12-25 1:06 ` [PATCH 2/4] MdeModulePkg/Core: " Jian J Wang
@ 2017-12-25 1:19 ` Zeng, Star
2017-12-25 2:01 ` Bi, Dandan
1 sibling, 0 replies; 19+ messages in thread
From: Zeng, Star @ 2017-12-25 1:19 UTC (permalink / raw)
To: Wang, Jian J, edk2-devel@lists.01.org; +Cc: Bi, Dandan, Dong, Eric, Zeng, Star
Reviewed-by: Star Zeng <star.zeng@intel.com>
-----Original Message-----
From: Wang, Jian J
Sent: Monday, December 25, 2017 9:07 AM
To: edk2-devel@lists.01.org
Cc: Bi, Dandan <dandan.bi@intel.com>; Zeng, Star <star.zeng@intel.com>; Dong, Eric <eric.dong@intel.com>
Subject: [PATCH 2/4] MdeModulePkg/Core: Coding style clean-up
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
---
MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
index bbdfa2bb8e..d7a86c0d30 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
@@ -126,6 +126,11 @@ EnableExecuteDisableBit (
The function will check if page table entry should be splitted to smaller
granularity.
+ @param Address Physical memory address.
+ @param Size Size of the given physical memory.
+ @param StackBase Base address of stack.
+ @param StackSize Size of stack.
+
@retval TRUE Page table should be split.
@retval FALSE Page table should not be split.
**/
--
2.15.1.windows.2
^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH 1/4] MdePkg/BaseLib.h: Coding style clean-up
2017-12-25 1:06 ` [PATCH 1/4] MdePkg/BaseLib.h: " Jian J Wang
@ 2017-12-25 1:51 ` Bi, Dandan
2017-12-25 2:23 ` Wang, Jian J
0 siblings, 1 reply; 19+ messages in thread
From: Bi, Dandan @ 2017-12-25 1:51 UTC (permalink / raw)
To: Wang, Jian J, edk2-devel@lists.01.org; +Cc: Zeng, Star, Dong, Eric
Hi Jian,
This patch is fine.
Could you help to add a period(.) for following function description when you commit the patch? Thanks!
/**
Load given selector into TR register // Add a period(.) here, or ECC tool will report an error here.
@param[in] Selector Task segment selector
**/
VOID
EFIAPI
AsmWriteTr (
IN UINT16 Selector
);
With this update, Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Regards,
Dandan
-----Original Message-----
From: Wang, Jian J
Sent: Monday, December 25, 2017 9:07 AM
To: edk2-devel@lists.01.org
Cc: Bi, Dandan <dandan.bi@intel.com>; Zeng, Star <star.zeng@intel.com>; Dong, Eric <eric.dong@intel.com>
Subject: [PATCH 1/4] MdePkg/BaseLib.h: Coding style clean-up
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
---
MdePkg/Include/Library/BaseLib.h | 72 ++++++++++++++++++++--------------------
1 file changed, 36 insertions(+), 36 deletions(-)
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 2b98af4cd1..f51079aeb1 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -6672,41 +6672,41 @@ typedef union {
typedef struct {
UINT16 PreviousTaskLink;
UINT16 Reserved_2;
- UINT32 ESP0;
- UINT16 SS0;
+ UINT32 Esp0;
+ UINT16 Ss0;
UINT16 Reserved_10;
- UINT32 ESP1;
- UINT16 SS1;
+ UINT32 Esp1;
+ UINT16 Ss1;
UINT16 Reserved_18;
- UINT32 ESP2;
- UINT16 SS2;
+ UINT32 Esp2;
+ UINT16 Ss2;
UINT16 Reserved_26;
- UINT32 CR3;
- UINT32 EIP;
- UINT32 EFLAGS;
- UINT32 EAX;
- UINT32 ECX;
- UINT32 EDX;
- UINT32 EBX;
- UINT32 ESP;
- UINT32 EBP;
- UINT32 ESI;
- UINT32 EDI;
- UINT16 ES;
+ UINT32 Cr3;
+ UINT32 Eip;
+ UINT32 Eflags;
+ UINT32 Eax;
+ UINT32 Ecx;
+ UINT32 Edx;
+ UINT32 Ebx;
+ UINT32 Esp;
+ UINT32 Ebp;
+ UINT32 Esi;
+ UINT32 Edi;
+ UINT16 Es;
UINT16 Reserved_74;
- UINT16 CS;
+ UINT16 Cs;
UINT16 Reserved_78;
- UINT16 SS;
+ UINT16 Ss;
UINT16 Reserved_82;
- UINT16 DS;
+ UINT16 Ds;
UINT16 Reserved_86;
- UINT16 FS;
+ UINT16 Fs;
UINT16 Reserved_90;
- UINT16 GS;
+ UINT16 Gs;
UINT16 Reserved_94;
UINT16 LDTSegmentSelector;
UINT16 Reserved_98;
- UINT16 T;
+ UINT16 Tflag;
UINT16 IOMapBaseAddress;
} IA32_TASK_STATE_SEGMENT;
@@ -6717,12 +6717,12 @@ typedef union {
UINT32 BaseMid:8; ///< Base Address 23..16
UINT32 Type:4; ///< Type (1 0 B 1)
UINT32 Reserved_43:1; ///< 0
- UINT32 DPL:2; ///< Descriptor Privilege Level
- UINT32 P:1; ///< Segment Present
+ UINT32 Dpl:2; ///< Descriptor Privilege Level
+ UINT32 Present:1; ///< Segment Present
UINT32 LimitHigh:4; ///< Segment Limit 19..16
- UINT32 AVL:1; ///< Available for use by system software
+ UINT32 Avl:1; ///< Available for use by system software
UINT32 Reserved_52:2; ///< 0 0
- UINT32 G:1; ///< Granularity
+ UINT32 Granularity:1; ///< Granularity
UINT32 BaseHigh:8; ///< Base Address 31..24
} Bits;
UINT64 Uint64;
@@ -6757,11 +6757,11 @@ typedef union {
//
typedef struct {
UINT32 Reserved_0;
- UINT64 RSP0;
- UINT64 RSP1;
- UINT64 RSP2;
+ UINT64 Rsp0;
+ UINT64 Rsp1;
+ UINT64 Rsp2;
UINT64 Reserved_28;
- UINT64 IST[7];
+ UINT64 Ist[7];
UINT64 Reserved_92;
UINT16 Reserved_100;
UINT16 IOMapBaseAddress;
@@ -6774,12 +6774,12 @@ typedef union {
UINT32 BaseMidl:8; ///< Base Address 23..16
UINT32 Type:4; ///< Type (1 0 B 1)
UINT32 Reserved_43:1; ///< 0
- UINT32 DPL:2; ///< Descriptor Privilege Level
- UINT32 P:1; ///< Segment Present
+ UINT32 Dpl:2; ///< Descriptor Privilege Level
+ UINT32 Present:1; ///< Segment Present
UINT32 LimitHigh:4; ///< Segment Limit 19..16
- UINT32 AVL:1; ///< Available for use by system software
+ UINT32 Avl:1; ///< Available for use by system software
UINT32 Reserved_52:2; ///< 0 0
- UINT32 G:1; ///< Granularity
+ UINT32 Granularity:1; ///< Granularity
UINT32 BaseMidh:8; ///< Base Address 31..24
UINT32 BaseHigh:32; ///< Base Address 63..32
UINT32 Reserved_96:32; ///< Reserved
--
2.15.1.windows.2
^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH 3/4] UefiCpuPkg/UefiCpuPkg.uni: Add missing string definition for new PCDs
2017-12-25 1:06 ` [PATCH 3/4] UefiCpuPkg/UefiCpuPkg.uni: Add missing string definition for new PCDs Jian J Wang
@ 2017-12-25 1:58 ` Bi, Dandan
2017-12-25 2:28 ` Wang, Jian J
0 siblings, 1 reply; 19+ messages in thread
From: Bi, Dandan @ 2017-12-25 1:58 UTC (permalink / raw)
To: Wang, Jian J, edk2-devel@lists.01.org; +Cc: Dong, Eric, Laszlo Ersek
Hi Jian,
Could you add the "string" keyword before the string token when you commit the patch. You can refer to other codes in the uni file.
With this update, Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Thanks,
Dandan
-----Original Message-----
From: Wang, Jian J
Sent: Monday, December 25, 2017 9:07 AM
To: edk2-devel@lists.01.org
Cc: Bi, Dandan <dandan.bi@intel.com>; Dong, Eric <eric.dong@intel.com>; Laszlo Ersek <lersek@redhat.com>
Subject: [PATCH 3/4] UefiCpuPkg/UefiCpuPkg.uni: Add missing string definition for new PCDs
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
---
UefiCpuPkg/UefiCpuPkg.uni | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/UefiCpuPkg/UefiCpuPkg.uni b/UefiCpuPkg/UefiCpuPkg.uni index a7073b10c8..6fcfc6e7f2 100644
--- a/UefiCpuPkg/UefiCpuPkg.uni
+++ b/UefiCpuPkg/UefiCpuPkg.uni
@@ -230,5 +230,17 @@
"Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.<BR><BR>\n"
"This PCD is ignored if CPU processor trace is disabled.<BR><BR>\n"
"Default value is 0 which means single range output scheme will be used if CPU processor trace is enabled.<BR>\n"
- "0 - Single Range output scheme.<BR>\n"
- "1 - ToPA(Table of physical address) scheme.<BR>\n"
\ No newline at end of file
+ "0 - Single Range output scheme.<BR>\n"
+ "1 - ToPA(Table of physical address) scheme.<BR>\n"
+
+#STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuStackSwitchExceptionList_PROMPT #language en-US "Specify exception vectors which need switching stack."
+
+#STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuStackSwitchExceptionList_HELP #language en-US "List of exception vectors which need switching stack.\n"
+ "This PCD will only take into effect if PcdCpuStackGuard is enabled.n"
+ "By default exception #DD(8), #PF(14) are supported.n"
+
+#STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuKnownGoodStackSize_PROMPT #language en-US "Specify size of good stack of exception which need switching stack."
+
+#STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuKnownGoodStackSize_HELP #language en-US "Size of good stack for an exception.\n"
+ "This PCD will only take into effect if PcdCpuStackGuard is enabled.\n"
+
--
2.15.1.windows.2
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 2/4] MdeModulePkg/Core: Coding style clean-up
2017-12-25 1:06 ` [PATCH 2/4] MdeModulePkg/Core: " Jian J Wang
2017-12-25 1:19 ` Zeng, Star
@ 2017-12-25 2:01 ` Bi, Dandan
1 sibling, 0 replies; 19+ messages in thread
From: Bi, Dandan @ 2017-12-25 2:01 UTC (permalink / raw)
To: Wang, Jian J, edk2-devel@lists.01.org; +Cc: Zeng, Star, Dong, Eric
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Thanks,
Dandan
-----Original Message-----
From: Wang, Jian J
Sent: Monday, December 25, 2017 9:07 AM
To: edk2-devel@lists.01.org
Cc: Bi, Dandan <dandan.bi@intel.com>; Zeng, Star <star.zeng@intel.com>; Dong, Eric <eric.dong@intel.com>
Subject: [PATCH 2/4] MdeModulePkg/Core: Coding style clean-up
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
---
MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
index bbdfa2bb8e..d7a86c0d30 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
@@ -126,6 +126,11 @@ EnableExecuteDisableBit (
The function will check if page table entry should be splitted to smaller
granularity.
+ @param Address Physical memory address.
+ @param Size Size of the given physical memory.
+ @param StackBase Base address of stack.
+ @param StackSize Size of stack.
+
@retval TRUE Page table should be split.
@retval FALSE Page table should not be split.
**/
--
2.15.1.windows.2
^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH 4/4] UefiCpuPkg: Update code to use new structure field names
2017-12-25 1:06 ` [PATCH 4/4] UefiCpuPkg: Update code to use new structure field names Jian J Wang
@ 2017-12-25 2:01 ` Bi, Dandan
0 siblings, 0 replies; 19+ messages in thread
From: Bi, Dandan @ 2017-12-25 2:01 UTC (permalink / raw)
To: Wang, Jian J, edk2-devel@lists.01.org; +Cc: Dong, Eric, Laszlo Ersek
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Thanks,
Dandan
-----Original Message-----
From: Wang, Jian J
Sent: Monday, December 25, 2017 9:07 AM
To: edk2-devel@lists.01.org
Cc: Bi, Dandan <dandan.bi@intel.com>; Dong, Eric <eric.dong@intel.com>; Laszlo Ersek <lersek@redhat.com>
Subject: [PATCH 4/4] UefiCpuPkg: Update code to use new structure field names
Due to coding style fix of the structure definition in BaseLib.h, all code referencing those structure must be updated accordingly.
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
---
.../Ia32/ArchExceptionHandler.c | 24 +++++++++++-----------
.../X64/ArchExceptionHandler.c | 6 +++---
UefiCpuPkg/Library/MpInitLib/MpLib.c | 2 +-
3 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
index 6ac8549839..4e89b0470f 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandle
+++ r.c
@@ -216,7 +216,7 @@ ArchSetupExcpetionStack (
TssDesc->Bits.BaseLow = (UINT16)TssBase;
TssDesc->Bits.BaseMid = (UINT8)(TssBase >> 16);
TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;
- TssDesc->Bits.P = 1;
+ TssDesc->Bits.Present = 1;
TssDesc->Bits.LimitHigh = 0;
TssDesc->Bits.BaseHigh = (UINT8)(TssBase >> 24);
@@ -240,7 +240,7 @@ ArchSetupExcpetionStack (
TssDesc->Bits.BaseLow = (UINT16)TssBase;
TssDesc->Bits.BaseMid = (UINT8)(TssBase >> 16);
TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;
- TssDesc->Bits.P = 1;
+ TssDesc->Bits.Present = 1;
TssDesc->Bits.LimitHigh = 0;
TssDesc->Bits.BaseHigh = (UINT8)(TssBase >> 24);
@@ -253,17 +253,17 @@ ArchSetupExcpetionStack (
continue;
}
- Tss->EIP = (UINT32)(TemplateMap.ExceptionStart
+ Tss->Eip = (UINT32)(TemplateMap.ExceptionStart
+ Vector * TemplateMap.ExceptionStubHeaderSize);
- Tss->EFLAGS = 0x2;
- Tss->ESP = StackTop;
- Tss->CR3 = AsmReadCr3 ();
- Tss->ES = AsmReadEs ();
- Tss->CS = AsmReadCs ();
- Tss->SS = AsmReadSs ();
- Tss->DS = AsmReadDs ();
- Tss->FS = AsmReadFs ();
- Tss->GS = AsmReadGs ();
+ Tss->Eflags = 0x2;
+ Tss->Esp = StackTop;
+ Tss->Cr3 = AsmReadCr3 ();
+ Tss->Es = AsmReadEs ();
+ Tss->Cs = AsmReadCs ();
+ Tss->Ss = AsmReadSs ();
+ Tss->Ds = AsmReadDs ();
+ Tss->Fs = AsmReadFs ();
+ Tss->Gs = AsmReadGs ();
StackTop -= StackSwitchData->Ia32.KnownGoodStackSize;
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
index 1dcf4277de..4d52b4eb0e 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler
+++ .c
@@ -186,7 +186,7 @@ ArchSetupExcpetionStack (
//
TssDesc = StackSwitchData->X64.ExceptionTssDesc;
Tss = StackSwitchData->X64.ExceptionTss;
- if (StackSwitchData->X64.StackSwitchExceptionNumber > ARRAY_SIZE (Tss->IST)) {
+ if (StackSwitchData->X64.StackSwitchExceptionNumber > ARRAY_SIZE
+ (Tss->Ist)) {
return EFI_INVALID_PARAMETER;
}
@@ -221,7 +221,7 @@ ArchSetupExcpetionStack (
TssDesc->Bits.BaseLow = (UINT16)TssBase;
TssDesc->Bits.BaseMidl = (UINT8)(TssBase >> 16);
TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;
- TssDesc->Bits.P = 1;
+ TssDesc->Bits.Present = 1;
TssDesc->Bits.LimitHigh = 0;
TssDesc->Bits.BaseMidh = (UINT8)(TssBase >> 24);
TssDesc->Bits.BaseHigh = (UINT32)(TssBase >> 32);
@@ -236,7 +236,7 @@ ArchSetupExcpetionStack (
//
// Fixup IST
//
- Tss->IST[Index] = StackTop;
+ Tss->Ist[Index] = StackTop;
StackTop -= StackSwitchData->X64.KnownGoodStackSize;
//
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 0c2058a7b0..da1a43c430 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -243,7 +243,7 @@ RestoreVolatileRegisters (
VolatileRegisters->Tr < VolatileRegisters->Gdtr.Limit) {
Tss = (IA32_TSS_DESCRIPTOR *)(VolatileRegisters->Gdtr.Base +
VolatileRegisters->Tr);
- if (Tss->Bits.P == 1) {
+ if (Tss->Bits.Present == 1) {
Tss->Bits.Type &= 0xD; // 1101 - Clear busy bit just in case
AsmWriteTr (VolatileRegisters->Tr);
}
--
2.15.1.windows.2
^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH 1/4] MdePkg/BaseLib.h: Coding style clean-up
2017-12-25 1:51 ` Bi, Dandan
@ 2017-12-25 2:23 ` Wang, Jian J
0 siblings, 0 replies; 19+ messages in thread
From: Wang, Jian J @ 2017-12-25 2:23 UTC (permalink / raw)
To: Bi, Dandan, edk2-devel@lists.01.org; +Cc: Zeng, Star, Dong, Eric
Ok. Thanks for catching it.
Regards,
Jian
> -----Original Message-----
> From: Bi, Dandan
> Sent: Monday, December 25, 2017 9:51 AM
> To: Wang, Jian J <jian.j.wang@intel.com>; edk2-devel@lists.01.org
> Cc: Zeng, Star <star.zeng@intel.com>; Dong, Eric <eric.dong@intel.com>
> Subject: RE: [PATCH 1/4] MdePkg/BaseLib.h: Coding style clean-up
>
> Hi Jian,
>
> This patch is fine.
> Could you help to add a period(.) for following function description when you
> commit the patch? Thanks!
> /**
> Load given selector into TR register // Add a period(.) here, or ECC tool will
> report an error here.
>
> @param[in] Selector Task segment selector
> **/
> VOID
> EFIAPI
> AsmWriteTr (
> IN UINT16 Selector
> );
>
> With this update, Reviewed-by: Dandan Bi <dandan.bi@intel.com>
>
> Regards,
> Dandan
> -----Original Message-----
> From: Wang, Jian J
> Sent: Monday, December 25, 2017 9:07 AM
> To: edk2-devel@lists.01.org
> Cc: Bi, Dandan <dandan.bi@intel.com>; Zeng, Star <star.zeng@intel.com>;
> Dong, Eric <eric.dong@intel.com>
> Subject: [PATCH 1/4] MdePkg/BaseLib.h: Coding style clean-up
>
> Cc: Dandan Bi <dandan.bi@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
> ---
> MdePkg/Include/Library/BaseLib.h | 72 ++++++++++++++++++++------------------
> --
> 1 file changed, 36 insertions(+), 36 deletions(-)
>
> diff --git a/MdePkg/Include/Library/BaseLib.h
> b/MdePkg/Include/Library/BaseLib.h
> index 2b98af4cd1..f51079aeb1 100644
> --- a/MdePkg/Include/Library/BaseLib.h
> +++ b/MdePkg/Include/Library/BaseLib.h
> @@ -6672,41 +6672,41 @@ typedef union {
> typedef struct {
> UINT16 PreviousTaskLink;
> UINT16 Reserved_2;
> - UINT32 ESP0;
> - UINT16 SS0;
> + UINT32 Esp0;
> + UINT16 Ss0;
> UINT16 Reserved_10;
> - UINT32 ESP1;
> - UINT16 SS1;
> + UINT32 Esp1;
> + UINT16 Ss1;
> UINT16 Reserved_18;
> - UINT32 ESP2;
> - UINT16 SS2;
> + UINT32 Esp2;
> + UINT16 Ss2;
> UINT16 Reserved_26;
> - UINT32 CR3;
> - UINT32 EIP;
> - UINT32 EFLAGS;
> - UINT32 EAX;
> - UINT32 ECX;
> - UINT32 EDX;
> - UINT32 EBX;
> - UINT32 ESP;
> - UINT32 EBP;
> - UINT32 ESI;
> - UINT32 EDI;
> - UINT16 ES;
> + UINT32 Cr3;
> + UINT32 Eip;
> + UINT32 Eflags;
> + UINT32 Eax;
> + UINT32 Ecx;
> + UINT32 Edx;
> + UINT32 Ebx;
> + UINT32 Esp;
> + UINT32 Ebp;
> + UINT32 Esi;
> + UINT32 Edi;
> + UINT16 Es;
> UINT16 Reserved_74;
> - UINT16 CS;
> + UINT16 Cs;
> UINT16 Reserved_78;
> - UINT16 SS;
> + UINT16 Ss;
> UINT16 Reserved_82;
> - UINT16 DS;
> + UINT16 Ds;
> UINT16 Reserved_86;
> - UINT16 FS;
> + UINT16 Fs;
> UINT16 Reserved_90;
> - UINT16 GS;
> + UINT16 Gs;
> UINT16 Reserved_94;
> UINT16 LDTSegmentSelector;
> UINT16 Reserved_98;
> - UINT16 T;
> + UINT16 Tflag;
> UINT16 IOMapBaseAddress;
> } IA32_TASK_STATE_SEGMENT;
>
> @@ -6717,12 +6717,12 @@ typedef union {
> UINT32 BaseMid:8; ///< Base Address 23..16
> UINT32 Type:4; ///< Type (1 0 B 1)
> UINT32 Reserved_43:1; ///< 0
> - UINT32 DPL:2; ///< Descriptor Privilege Level
> - UINT32 P:1; ///< Segment Present
> + UINT32 Dpl:2; ///< Descriptor Privilege Level
> + UINT32 Present:1; ///< Segment Present
> UINT32 LimitHigh:4; ///< Segment Limit 19..16
> - UINT32 AVL:1; ///< Available for use by system software
> + UINT32 Avl:1; ///< Available for use by system software
> UINT32 Reserved_52:2; ///< 0 0
> - UINT32 G:1; ///< Granularity
> + UINT32 Granularity:1; ///< Granularity
> UINT32 BaseHigh:8; ///< Base Address 31..24
> } Bits;
> UINT64 Uint64;
> @@ -6757,11 +6757,11 @@ typedef union {
> //
> typedef struct {
> UINT32 Reserved_0;
> - UINT64 RSP0;
> - UINT64 RSP1;
> - UINT64 RSP2;
> + UINT64 Rsp0;
> + UINT64 Rsp1;
> + UINT64 Rsp2;
> UINT64 Reserved_28;
> - UINT64 IST[7];
> + UINT64 Ist[7];
> UINT64 Reserved_92;
> UINT16 Reserved_100;
> UINT16 IOMapBaseAddress;
> @@ -6774,12 +6774,12 @@ typedef union {
> UINT32 BaseMidl:8; ///< Base Address 23..16
> UINT32 Type:4; ///< Type (1 0 B 1)
> UINT32 Reserved_43:1; ///< 0
> - UINT32 DPL:2; ///< Descriptor Privilege Level
> - UINT32 P:1; ///< Segment Present
> + UINT32 Dpl:2; ///< Descriptor Privilege Level
> + UINT32 Present:1; ///< Segment Present
> UINT32 LimitHigh:4; ///< Segment Limit 19..16
> - UINT32 AVL:1; ///< Available for use by system software
> + UINT32 Avl:1; ///< Available for use by system software
> UINT32 Reserved_52:2; ///< 0 0
> - UINT32 G:1; ///< Granularity
> + UINT32 Granularity:1; ///< Granularity
> UINT32 BaseMidh:8; ///< Base Address 31..24
> UINT32 BaseHigh:32; ///< Base Address 63..32
> UINT32 Reserved_96:32; ///< Reserved
> --
> 2.15.1.windows.2
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 3/4] UefiCpuPkg/UefiCpuPkg.uni: Add missing string definition for new PCDs
2017-12-25 1:58 ` Bi, Dandan
@ 2017-12-25 2:28 ` Wang, Jian J
0 siblings, 0 replies; 19+ messages in thread
From: Wang, Jian J @ 2017-12-25 2:28 UTC (permalink / raw)
To: Bi, Dandan, edk2-devel@lists.01.org; +Cc: Dong, Eric, Laszlo Ersek
Sure. Thanks.
Regards,
Jian
> -----Original Message-----
> From: Bi, Dandan
> Sent: Monday, December 25, 2017 9:59 AM
> To: Wang, Jian J <jian.j.wang@intel.com>; edk2-devel@lists.01.org
> Cc: Dong, Eric <eric.dong@intel.com>; Laszlo Ersek <lersek@redhat.com>
> Subject: RE: [PATCH 3/4] UefiCpuPkg/UefiCpuPkg.uni: Add missing string
> definition for new PCDs
>
> Hi Jian,
>
> Could you add the "string" keyword before the string token when you commit
> the patch. You can refer to other codes in the uni file.
> With this update, Reviewed-by: Dandan Bi <dandan.bi@intel.com>
>
> Thanks,
> Dandan
> -----Original Message-----
> From: Wang, Jian J
> Sent: Monday, December 25, 2017 9:07 AM
> To: edk2-devel@lists.01.org
> Cc: Bi, Dandan <dandan.bi@intel.com>; Dong, Eric <eric.dong@intel.com>;
> Laszlo Ersek <lersek@redhat.com>
> Subject: [PATCH 3/4] UefiCpuPkg/UefiCpuPkg.uni: Add missing string definition
> for new PCDs
>
> Cc: Dandan Bi <dandan.bi@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
> ---
> UefiCpuPkg/UefiCpuPkg.uni | 16 ++++++++++++++--
> 1 file changed, 14 insertions(+), 2 deletions(-)
>
> diff --git a/UefiCpuPkg/UefiCpuPkg.uni b/UefiCpuPkg/UefiCpuPkg.uni index
> a7073b10c8..6fcfc6e7f2 100644
> --- a/UefiCpuPkg/UefiCpuPkg.uni
> +++ b/UefiCpuPkg/UefiCpuPkg.uni
> @@ -230,5 +230,17 @@
> "Processor trace is enabled
> through set BIT44(CPU_FEATURE_PROC_TRACE) in
> PcdCpuFeaturesSetting.<BR><BR>\n"
> "This PCD is ignored if CPU
> processor trace is disabled.<BR><BR>\n"
> "Default value is 0 which means
> single range output scheme will be used if CPU processor trace is
> enabled.<BR>\n"
> - "0 - Single Range output
> scheme.<BR>\n"
>
> - "1 - ToPA(Table of physical
> address) scheme.<BR>\n"
> \ No newline at end of file
> + "0 - Single Range output
> scheme.<BR>\n"
> + "1 - ToPA(Table of physical
> address) scheme.<BR>\n"
> +
> +#STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuStackSwitchExceptionList_PROMP
> T #language en-US "Specify exception vectors which need switching stack."
> +
> +#STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuStackSwitchExceptionList_HELP
> #language en-US "List of exception vectors which need switching stack.\n"
> + "This PCD will only take into
> effect if PcdCpuStackGuard is enabled.n"
> + "By default exception #DD(8),
> #PF(14) are supported.n"
> +
> +#STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuKnownGoodStackSize_PROMPT
> #language en-US "Specify size of good stack of exception which need switching
> stack."
> +
> +#STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuKnownGoodStackSize_HELP
> #language en-US "Size of good stack for an exception.\n"
> + "This PCD will only take into effect if
> PcdCpuStackGuard is enabled.\n"
> +
> --
> 2.15.1.windows.2
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 0/4] Coding style clean-up
2017-12-25 1:06 [PATCH 0/4] Coding style clean-up Jian J Wang
` (3 preceding siblings ...)
2017-12-25 1:06 ` [PATCH 4/4] UefiCpuPkg: Update code to use new structure field names Jian J Wang
@ 2017-12-26 16:47 ` Kinney, Michael D
2017-12-27 0:40 ` Wang, Jian J
4 siblings, 1 reply; 19+ messages in thread
From: Kinney, Michael D @ 2017-12-26 16:47 UTC (permalink / raw)
To: Wang, Jian J, edk2-devel@lists.01.org, Kinney, Michael D
Jian,
I do not think this change should be made.
One of the exceptions for not following the
EDK II code style is if the field names are
defined in a public specification. In this case
these fields are all listed in a structure in
the Intel 64 and IA-32 Architectures Software
Development Manual, Section 7.2.1, Figure 7-2
using upper case register names.
Thanks,
Mike
> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org]
> On Behalf Of Jian J Wang
> Sent: Sunday, December 24, 2017 5:07 PM
> To: edk2-devel@lists.01.org
> Subject: [edk2] [PATCH 0/4] Coding style clean-up
>
> This patch series are meant for cleaning up code
> according to coding style
> requirements.
>
> Jian J Wang (4):
> MdePkg/BaseLib.h: Coding style clean-up
> MdeModulePkg/Core: Coding style clean-up
> UefiCpuPkg/UefiCpuPkg.uni: Add missing string
> definition for new PCDs
> UefiCpuPkg: Update code to use new structure field
> names
>
> MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 5
> ++
> MdePkg/Include/Library/BaseLib.h | 72
> +++++++++++-----------
> .../Ia32/ArchExceptionHandler.c | 24
> ++++----
> .../X64/ArchExceptionHandler.c | 6
> +-
> UefiCpuPkg/Library/MpInitLib/MpLib.c | 2
> +-
> UefiCpuPkg/UefiCpuPkg.uni | 16
> ++++-
> 6 files changed, 71 insertions(+), 54 deletions(-)
>
> --
> 2.15.1.windows.2
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 0/4] Coding style clean-up
2017-12-26 16:47 ` [PATCH 0/4] Coding style clean-up Kinney, Michael D
@ 2017-12-27 0:40 ` Wang, Jian J
2017-12-27 9:29 ` Gao, Liming
2017-12-27 16:35 ` Kinney, Michael D
0 siblings, 2 replies; 19+ messages in thread
From: Wang, Jian J @ 2017-12-27 0:40 UTC (permalink / raw)
To: Kinney, Michael D, edk2-devel@lists.01.org
Hi Mike,
Since this patch has been checked in trunk, do you think it should be reverted?
In addition, instead of using exception list for the ECC tool, I think it'd be better
to update ECC tool to use keyword match to check if a field name is public spec
defined one. Otherwise, if there's new structure type using those field names,
the tool will still report errors.
Regards,
Jian
> -----Original Message-----
> From: Kinney, Michael D
> Sent: Wednesday, December 27, 2017 12:48 AM
> To: Wang, Jian J <jian.j.wang@intel.com>; edk2-devel@lists.01.org; Kinney,
> Michael D <michael.d.kinney@intel.com>
> Subject: RE: [edk2] [PATCH 0/4] Coding style clean-up
>
> Jian,
>
> I do not think this change should be made.
>
> One of the exceptions for not following the
> EDK II code style is if the field names are
> defined in a public specification. In this case
> these fields are all listed in a structure in
> the Intel 64 and IA-32 Architectures Software
> Development Manual, Section 7.2.1, Figure 7-2
> using upper case register names.
>
> Thanks,
>
> Mike
>
>
>
> > -----Original Message-----
> > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org]
> > On Behalf Of Jian J Wang
> > Sent: Sunday, December 24, 2017 5:07 PM
> > To: edk2-devel@lists.01.org
> > Subject: [edk2] [PATCH 0/4] Coding style clean-up
> >
> > This patch series are meant for cleaning up code
> > according to coding style
> > requirements.
> >
> > Jian J Wang (4):
> > MdePkg/BaseLib.h: Coding style clean-up
> > MdeModulePkg/Core: Coding style clean-up
> > UefiCpuPkg/UefiCpuPkg.uni: Add missing string
> > definition for new PCDs
> > UefiCpuPkg: Update code to use new structure field
> > names
> >
> > MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 5
> > ++
> > MdePkg/Include/Library/BaseLib.h | 72
> > +++++++++++-----------
> > .../Ia32/ArchExceptionHandler.c | 24
> > ++++----
> > .../X64/ArchExceptionHandler.c | 6
> > +-
> > UefiCpuPkg/Library/MpInitLib/MpLib.c | 2
> > +-
> > UefiCpuPkg/UefiCpuPkg.uni | 16
> > ++++-
> > 6 files changed, 71 insertions(+), 54 deletions(-)
> >
> > --
> > 2.15.1.windows.2
> >
> > _______________________________________________
> > edk2-devel mailing list
> > edk2-devel@lists.01.org
> > https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 0/4] Coding style clean-up
2017-12-27 0:40 ` Wang, Jian J
@ 2017-12-27 9:29 ` Gao, Liming
2017-12-27 16:35 ` Kinney, Michael D
1 sibling, 0 replies; 19+ messages in thread
From: Gao, Liming @ 2017-12-27 9:29 UTC (permalink / raw)
To: Wang, Jian J, Kinney, Michael D, edk2-devel@lists.01.org
Jian:
I prefer to roll back this change. So, the definition in BaseLib.h can be kept in the same style.
Thanks
Liming
>-----Original Message-----
>From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
>Wang, Jian J
>Sent: Wednesday, December 27, 2017 8:40 AM
>To: Kinney, Michael D <michael.d.kinney@intel.com>; edk2-
>devel@lists.01.org
>Subject: Re: [edk2] [PATCH 0/4] Coding style clean-up
>
>Hi Mike,
>
>Since this patch has been checked in trunk, do you think it should be reverted?
>In addition, instead of using exception list for the ECC tool, I think it'd be
>better
>to update ECC tool to use keyword match to check if a field name is public
>spec
>defined one. Otherwise, if there's new structure type using those field names,
>the tool will still report errors.
>
>Regards,
>Jian
>
>> -----Original Message-----
>> From: Kinney, Michael D
>> Sent: Wednesday, December 27, 2017 12:48 AM
>> To: Wang, Jian J <jian.j.wang@intel.com>; edk2-devel@lists.01.org; Kinney,
>> Michael D <michael.d.kinney@intel.com>
>> Subject: RE: [edk2] [PATCH 0/4] Coding style clean-up
>>
>> Jian,
>>
>> I do not think this change should be made.
>>
>> One of the exceptions for not following the
>> EDK II code style is if the field names are
>> defined in a public specification. In this case
>> these fields are all listed in a structure in
>> the Intel 64 and IA-32 Architectures Software
>> Development Manual, Section 7.2.1, Figure 7-2
>> using upper case register names.
>>
>> Thanks,
>>
>> Mike
>>
>>
>>
>> > -----Original Message-----
>> > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org]
>> > On Behalf Of Jian J Wang
>> > Sent: Sunday, December 24, 2017 5:07 PM
>> > To: edk2-devel@lists.01.org
>> > Subject: [edk2] [PATCH 0/4] Coding style clean-up
>> >
>> > This patch series are meant for cleaning up code
>> > according to coding style
>> > requirements.
>> >
>> > Jian J Wang (4):
>> > MdePkg/BaseLib.h: Coding style clean-up
>> > MdeModulePkg/Core: Coding style clean-up
>> > UefiCpuPkg/UefiCpuPkg.uni: Add missing string
>> > definition for new PCDs
>> > UefiCpuPkg: Update code to use new structure field
>> > names
>> >
>> > MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 5
>> > ++
>> > MdePkg/Include/Library/BaseLib.h | 72
>> > +++++++++++-----------
>> > .../Ia32/ArchExceptionHandler.c | 24
>> > ++++----
>> > .../X64/ArchExceptionHandler.c | 6
>> > +-
>> > UefiCpuPkg/Library/MpInitLib/MpLib.c | 2
>> > +-
>> > UefiCpuPkg/UefiCpuPkg.uni | 16
>> > ++++-
>> > 6 files changed, 71 insertions(+), 54 deletions(-)
>> >
>> > --
>> > 2.15.1.windows.2
>> >
>> > _______________________________________________
>> > edk2-devel mailing list
>> > edk2-devel@lists.01.org
>> > https://lists.01.org/mailman/listinfo/edk2-devel
>_______________________________________________
>edk2-devel mailing list
>edk2-devel@lists.01.org
>https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 0/4] Coding style clean-up
2017-12-27 0:40 ` Wang, Jian J
2017-12-27 9:29 ` Gao, Liming
@ 2017-12-27 16:35 ` Kinney, Michael D
2017-12-28 0:27 ` Wang, Jian J
1 sibling, 1 reply; 19+ messages in thread
From: Kinney, Michael D @ 2017-12-27 16:35 UTC (permalink / raw)
To: Wang, Jian J, edk2-devel@lists.01.org, Kinney, Michael D
Yes. Please revert.
I am not sure I understand the ECC tool update you are suggesting.
Can you provide more details?
Mike
> -----Original Message-----
> From: Wang, Jian J
> Sent: Tuesday, December 26, 2017 4:40 PM
> To: Kinney, Michael D <michael.d.kinney@intel.com>; edk2-
> devel@lists.01.org
> Subject: RE: [edk2] [PATCH 0/4] Coding style clean-up
>
> Hi Mike,
>
> Since this patch has been checked in trunk, do you think
> it should be reverted?
> In addition, instead of using exception list for the ECC
> tool, I think it'd be better
> to update ECC tool to use keyword match to check if a
> field name is public spec
> defined one. Otherwise, if there's new structure type
> using those field names,
> the tool will still report errors.
>
> Regards,
> Jian
>
> > -----Original Message-----
> > From: Kinney, Michael D
> > Sent: Wednesday, December 27, 2017 12:48 AM
> > To: Wang, Jian J <jian.j.wang@intel.com>; edk2-
> devel@lists.01.org; Kinney,
> > Michael D <michael.d.kinney@intel.com>
> > Subject: RE: [edk2] [PATCH 0/4] Coding style clean-up
> >
> > Jian,
> >
> > I do not think this change should be made.
> >
> > One of the exceptions for not following the
> > EDK II code style is if the field names are
> > defined in a public specification. In this case
> > these fields are all listed in a structure in
> > the Intel 64 and IA-32 Architectures Software
> > Development Manual, Section 7.2.1, Figure 7-2
> > using upper case register names.
> >
> > Thanks,
> >
> > Mike
> >
> >
> >
> > > -----Original Message-----
> > > From: edk2-devel [mailto:edk2-devel-
> bounces@lists.01.org]
> > > On Behalf Of Jian J Wang
> > > Sent: Sunday, December 24, 2017 5:07 PM
> > > To: edk2-devel@lists.01.org
> > > Subject: [edk2] [PATCH 0/4] Coding style clean-up
> > >
> > > This patch series are meant for cleaning up code
> > > according to coding style
> > > requirements.
> > >
> > > Jian J Wang (4):
> > > MdePkg/BaseLib.h: Coding style clean-up
> > > MdeModulePkg/Core: Coding style clean-up
> > > UefiCpuPkg/UefiCpuPkg.uni: Add missing string
> > > definition for new PCDs
> > > UefiCpuPkg: Update code to use new structure field
> > > names
> > >
> > > MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c |
> 5
> > > ++
> > > MdePkg/Include/Library/BaseLib.h |
> 72
> > > +++++++++++-----------
> > > .../Ia32/ArchExceptionHandler.c |
> 24
> > > ++++----
> > > .../X64/ArchExceptionHandler.c |
> 6
> > > +-
> > > UefiCpuPkg/Library/MpInitLib/MpLib.c |
> 2
> > > +-
> > > UefiCpuPkg/UefiCpuPkg.uni |
> 16
> > > ++++-
> > > 6 files changed, 71 insertions(+), 54 deletions(-)
> > >
> > > --
> > > 2.15.1.windows.2
> > >
> > > _______________________________________________
> > > edk2-devel mailing list
> > > edk2-devel@lists.01.org
> > > https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 0/4] Coding style clean-up
2017-12-27 16:35 ` Kinney, Michael D
@ 2017-12-28 0:27 ` Wang, Jian J
2017-12-28 0:37 ` Kinney, Michael D
0 siblings, 1 reply; 19+ messages in thread
From: Wang, Jian J @ 2017-12-28 0:27 UTC (permalink / raw)
To: Kinney, Michael D, edk2-devel@lists.01.org
Current ECC use <type-name>.<field-name> in exception list to exclude those special
field name spec defined. Whenever there's a new structure introduced with those field
names, which have been added to exception list, the ECC will still report coding style
violation. Maybe we can just use <field-name> to do field name match for any structure
type to exclude those special names. This can avoid the false reports as many as possible.
Regards,
Jian
> -----Original Message-----
> From: Kinney, Michael D
> Sent: Thursday, December 28, 2017 12:35 AM
> To: Wang, Jian J <jian.j.wang@intel.com>; edk2-devel@lists.01.org; Kinney,
> Michael D <michael.d.kinney@intel.com>
> Subject: RE: [edk2] [PATCH 0/4] Coding style clean-up
>
> Yes. Please revert.
>
> I am not sure I understand the ECC tool update you are suggesting.
> Can you provide more details?
>
> Mike
>
> > -----Original Message-----
> > From: Wang, Jian J
> > Sent: Tuesday, December 26, 2017 4:40 PM
> > To: Kinney, Michael D <michael.d.kinney@intel.com>; edk2-
> > devel@lists.01.org
> > Subject: RE: [edk2] [PATCH 0/4] Coding style clean-up
> >
> > Hi Mike,
> >
> > Since this patch has been checked in trunk, do you think
> > it should be reverted?
> > In addition, instead of using exception list for the ECC
> > tool, I think it'd be better
> > to update ECC tool to use keyword match to check if a
> > field name is public spec
> > defined one. Otherwise, if there's new structure type
> > using those field names,
> > the tool will still report errors.
> >
> > Regards,
> > Jian
> >
> > > -----Original Message-----
> > > From: Kinney, Michael D
> > > Sent: Wednesday, December 27, 2017 12:48 AM
> > > To: Wang, Jian J <jian.j.wang@intel.com>; edk2-
> > devel@lists.01.org; Kinney,
> > > Michael D <michael.d.kinney@intel.com>
> > > Subject: RE: [edk2] [PATCH 0/4] Coding style clean-up
> > >
> > > Jian,
> > >
> > > I do not think this change should be made.
> > >
> > > One of the exceptions for not following the
> > > EDK II code style is if the field names are
> > > defined in a public specification. In this case
> > > these fields are all listed in a structure in
> > > the Intel 64 and IA-32 Architectures Software
> > > Development Manual, Section 7.2.1, Figure 7-2
> > > using upper case register names.
> > >
> > > Thanks,
> > >
> > > Mike
> > >
> > >
> > >
> > > > -----Original Message-----
> > > > From: edk2-devel [mailto:edk2-devel-
> > bounces@lists.01.org]
> > > > On Behalf Of Jian J Wang
> > > > Sent: Sunday, December 24, 2017 5:07 PM
> > > > To: edk2-devel@lists.01.org
> > > > Subject: [edk2] [PATCH 0/4] Coding style clean-up
> > > >
> > > > This patch series are meant for cleaning up code
> > > > according to coding style
> > > > requirements.
> > > >
> > > > Jian J Wang (4):
> > > > MdePkg/BaseLib.h: Coding style clean-up
> > > > MdeModulePkg/Core: Coding style clean-up
> > > > UefiCpuPkg/UefiCpuPkg.uni: Add missing string
> > > > definition for new PCDs
> > > > UefiCpuPkg: Update code to use new structure field
> > > > names
> > > >
> > > > MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c |
> > 5
> > > > ++
> > > > MdePkg/Include/Library/BaseLib.h |
> > 72
> > > > +++++++++++-----------
> > > > .../Ia32/ArchExceptionHandler.c |
> > 24
> > > > ++++----
> > > > .../X64/ArchExceptionHandler.c |
> > 6
> > > > +-
> > > > UefiCpuPkg/Library/MpInitLib/MpLib.c |
> > 2
> > > > +-
> > > > UefiCpuPkg/UefiCpuPkg.uni |
> > 16
> > > > ++++-
> > > > 6 files changed, 71 insertions(+), 54 deletions(-)
> > > >
> > > > --
> > > > 2.15.1.windows.2
> > > >
> > > > _______________________________________________
> > > > edk2-devel mailing list
> > > > edk2-devel@lists.01.org
> > > > https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 0/4] Coding style clean-up
2017-12-28 0:27 ` Wang, Jian J
@ 2017-12-28 0:37 ` Kinney, Michael D
2017-12-28 0:53 ` Wang, Jian J
0 siblings, 1 reply; 19+ messages in thread
From: Kinney, Michael D @ 2017-12-28 0:37 UTC (permalink / raw)
To: Wang, Jian J, edk2-devel@lists.01.org, Kinney, Michael D
Jian,
I think <typename>.<fieldname> is the correct way to list
this type of exception. Otherwise we can miss incorrect
use of that field name.
Mike
> -----Original Message-----
> From: Wang, Jian J
> Sent: Wednesday, December 27, 2017 4:28 PM
> To: Kinney, Michael D <michael.d.kinney@intel.com>;
> edk2-devel@lists.01.org
> Subject: RE: [edk2] [PATCH 0/4] Coding style clean-up
>
> Current ECC use <type-name>.<field-name> in exception
> list to exclude those special
> field name spec defined. Whenever there's a new
> structure introduced with those field
> names, which have been added to exception list, the ECC
> will still report coding style
> violation. Maybe we can just use <field-name> to do
> field name match for any structure
> type to exclude those special names. This can avoid the
> false reports as many as possible.
>
> Regards,
> Jian
>
>
> > -----Original Message-----
> > From: Kinney, Michael D
> > Sent: Thursday, December 28, 2017 12:35 AM
> > To: Wang, Jian J <jian.j.wang@intel.com>; edk2-
> devel@lists.01.org; Kinney,
> > Michael D <michael.d.kinney@intel.com>
> > Subject: RE: [edk2] [PATCH 0/4] Coding style clean-up
> >
> > Yes. Please revert.
> >
> > I am not sure I understand the ECC tool update you
> are suggesting.
> > Can you provide more details?
> >
> > Mike
> >
> > > -----Original Message-----
> > > From: Wang, Jian J
> > > Sent: Tuesday, December 26, 2017 4:40 PM
> > > To: Kinney, Michael D <michael.d.kinney@intel.com>;
> edk2-
> > > devel@lists.01.org
> > > Subject: RE: [edk2] [PATCH 0/4] Coding style clean-
> up
> > >
> > > Hi Mike,
> > >
> > > Since this patch has been checked in trunk, do you
> think
> > > it should be reverted?
> > > In addition, instead of using exception list for
> the ECC
> > > tool, I think it'd be better
> > > to update ECC tool to use keyword match to check if
> a
> > > field name is public spec
> > > defined one. Otherwise, if there's new structure
> type
> > > using those field names,
> > > the tool will still report errors.
> > >
> > > Regards,
> > > Jian
> > >
> > > > -----Original Message-----
> > > > From: Kinney, Michael D
> > > > Sent: Wednesday, December 27, 2017 12:48 AM
> > > > To: Wang, Jian J <jian.j.wang@intel.com>; edk2-
> > > devel@lists.01.org; Kinney,
> > > > Michael D <michael.d.kinney@intel.com>
> > > > Subject: RE: [edk2] [PATCH 0/4] Coding style
> clean-up
> > > >
> > > > Jian,
> > > >
> > > > I do not think this change should be made.
> > > >
> > > > One of the exceptions for not following the
> > > > EDK II code style is if the field names are
> > > > defined in a public specification. In this case
> > > > these fields are all listed in a structure in
> > > > the Intel 64 and IA-32 Architectures Software
> > > > Development Manual, Section 7.2.1, Figure 7-2
> > > > using upper case register names.
> > > >
> > > > Thanks,
> > > >
> > > > Mike
> > > >
> > > >
> > > >
> > > > > -----Original Message-----
> > > > > From: edk2-devel [mailto:edk2-devel-
> > > bounces@lists.01.org]
> > > > > On Behalf Of Jian J Wang
> > > > > Sent: Sunday, December 24, 2017 5:07 PM
> > > > > To: edk2-devel@lists.01.org
> > > > > Subject: [edk2] [PATCH 0/4] Coding style clean-
> up
> > > > >
> > > > > This patch series are meant for cleaning up
> code
> > > > > according to coding style
> > > > > requirements.
> > > > >
> > > > > Jian J Wang (4):
> > > > > MdePkg/BaseLib.h: Coding style clean-up
> > > > > MdeModulePkg/Core: Coding style clean-up
> > > > > UefiCpuPkg/UefiCpuPkg.uni: Add missing string
> > > > > definition for new PCDs
> > > > > UefiCpuPkg: Update code to use new structure
> field
> > > > > names
> > > > >
> > > > >
> MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c |
> > > 5
> > > > > ++
> > > > > MdePkg/Include/Library/BaseLib.h
> |
> > > 72
> > > > > +++++++++++-----------
> > > > > .../Ia32/ArchExceptionHandler.c
> |
> > > 24
> > > > > ++++----
> > > > > .../X64/ArchExceptionHandler.c
> |
> > > 6
> > > > > +-
> > > > > UefiCpuPkg/Library/MpInitLib/MpLib.c
> |
> > > 2
> > > > > +-
> > > > > UefiCpuPkg/UefiCpuPkg.uni
> |
> > > 16
> > > > > ++++-
> > > > > 6 files changed, 71 insertions(+), 54
> deletions(-)
> > > > >
> > > > > --
> > > > > 2.15.1.windows.2
> > > > >
> > > > > _______________________________________________
> > > > > edk2-devel mailing list
> > > > > edk2-devel@lists.01.org
> > > > > https://lists.01.org/mailman/listinfo/edk2-
> devel
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 0/4] Coding style clean-up
2017-12-28 0:37 ` Kinney, Michael D
@ 2017-12-28 0:53 ` Wang, Jian J
0 siblings, 0 replies; 19+ messages in thread
From: Wang, Jian J @ 2017-12-28 0:53 UTC (permalink / raw)
To: Kinney, Michael D, edk2-devel@lists.01.org
Theoretically, yes. But I think it's a rare case in which someone
will use ESP in a structure but not to represent ESP register.
Regards,
Jian
> -----Original Message-----
> From: Kinney, Michael D
> Sent: Thursday, December 28, 2017 8:37 AM
> To: Wang, Jian J <jian.j.wang@intel.com>; edk2-devel@lists.01.org; Kinney,
> Michael D <michael.d.kinney@intel.com>
> Subject: RE: [edk2] [PATCH 0/4] Coding style clean-up
>
> Jian,
>
> I think <typename>.<fieldname> is the correct way to list
> this type of exception. Otherwise we can miss incorrect
> use of that field name.
>
> Mike
>
> > -----Original Message-----
> > From: Wang, Jian J
> > Sent: Wednesday, December 27, 2017 4:28 PM
> > To: Kinney, Michael D <michael.d.kinney@intel.com>;
> > edk2-devel@lists.01.org
> > Subject: RE: [edk2] [PATCH 0/4] Coding style clean-up
> >
> > Current ECC use <type-name>.<field-name> in exception
> > list to exclude those special
> > field name spec defined. Whenever there's a new
> > structure introduced with those field
> > names, which have been added to exception list, the ECC
> > will still report coding style
> > violation. Maybe we can just use <field-name> to do
> > field name match for any structure
> > type to exclude those special names. This can avoid the
> > false reports as many as possible.
> >
> > Regards,
> > Jian
> >
> >
> > > -----Original Message-----
> > > From: Kinney, Michael D
> > > Sent: Thursday, December 28, 2017 12:35 AM
> > > To: Wang, Jian J <jian.j.wang@intel.com>; edk2-
> > devel@lists.01.org; Kinney,
> > > Michael D <michael.d.kinney@intel.com>
> > > Subject: RE: [edk2] [PATCH 0/4] Coding style clean-up
> > >
> > > Yes. Please revert.
> > >
> > > I am not sure I understand the ECC tool update you
> > are suggesting.
> > > Can you provide more details?
> > >
> > > Mike
> > >
> > > > -----Original Message-----
> > > > From: Wang, Jian J
> > > > Sent: Tuesday, December 26, 2017 4:40 PM
> > > > To: Kinney, Michael D <michael.d.kinney@intel.com>;
> > edk2-
> > > > devel@lists.01.org
> > > > Subject: RE: [edk2] [PATCH 0/4] Coding style clean-
> > up
> > > >
> > > > Hi Mike,
> > > >
> > > > Since this patch has been checked in trunk, do you
> > think
> > > > it should be reverted?
> > > > In addition, instead of using exception list for
> > the ECC
> > > > tool, I think it'd be better
> > > > to update ECC tool to use keyword match to check if
> > a
> > > > field name is public spec
> > > > defined one. Otherwise, if there's new structure
> > type
> > > > using those field names,
> > > > the tool will still report errors.
> > > >
> > > > Regards,
> > > > Jian
> > > >
> > > > > -----Original Message-----
> > > > > From: Kinney, Michael D
> > > > > Sent: Wednesday, December 27, 2017 12:48 AM
> > > > > To: Wang, Jian J <jian.j.wang@intel.com>; edk2-
> > > > devel@lists.01.org; Kinney,
> > > > > Michael D <michael.d.kinney@intel.com>
> > > > > Subject: RE: [edk2] [PATCH 0/4] Coding style
> > clean-up
> > > > >
> > > > > Jian,
> > > > >
> > > > > I do not think this change should be made.
> > > > >
> > > > > One of the exceptions for not following the
> > > > > EDK II code style is if the field names are
> > > > > defined in a public specification. In this case
> > > > > these fields are all listed in a structure in
> > > > > the Intel 64 and IA-32 Architectures Software
> > > > > Development Manual, Section 7.2.1, Figure 7-2
> > > > > using upper case register names.
> > > > >
> > > > > Thanks,
> > > > >
> > > > > Mike
> > > > >
> > > > >
> > > > >
> > > > > > -----Original Message-----
> > > > > > From: edk2-devel [mailto:edk2-devel-
> > > > bounces@lists.01.org]
> > > > > > On Behalf Of Jian J Wang
> > > > > > Sent: Sunday, December 24, 2017 5:07 PM
> > > > > > To: edk2-devel@lists.01.org
> > > > > > Subject: [edk2] [PATCH 0/4] Coding style clean-
> > up
> > > > > >
> > > > > > This patch series are meant for cleaning up
> > code
> > > > > > according to coding style
> > > > > > requirements.
> > > > > >
> > > > > > Jian J Wang (4):
> > > > > > MdePkg/BaseLib.h: Coding style clean-up
> > > > > > MdeModulePkg/Core: Coding style clean-up
> > > > > > UefiCpuPkg/UefiCpuPkg.uni: Add missing string
> > > > > > definition for new PCDs
> > > > > > UefiCpuPkg: Update code to use new structure
> > field
> > > > > > names
> > > > > >
> > > > > >
> > MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c |
> > > > 5
> > > > > > ++
> > > > > > MdePkg/Include/Library/BaseLib.h
> > |
> > > > 72
> > > > > > +++++++++++-----------
> > > > > > .../Ia32/ArchExceptionHandler.c
> > |
> > > > 24
> > > > > > ++++----
> > > > > > .../X64/ArchExceptionHandler.c
> > |
> > > > 6
> > > > > > +-
> > > > > > UefiCpuPkg/Library/MpInitLib/MpLib.c
> > |
> > > > 2
> > > > > > +-
> > > > > > UefiCpuPkg/UefiCpuPkg.uni
> > |
> > > > 16
> > > > > > ++++-
> > > > > > 6 files changed, 71 insertions(+), 54
> > deletions(-)
> > > > > >
> > > > > > --
> > > > > > 2.15.1.windows.2
> > > > > >
> > > > > > _______________________________________________
> > > > > > edk2-devel mailing list
> > > > > > edk2-devel@lists.01.org
> > > > > > https://lists.01.org/mailman/listinfo/edk2-
> > devel
^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2017-12-28 0:48 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-12-25 1:06 [PATCH 0/4] Coding style clean-up Jian J Wang
2017-12-25 1:06 ` [PATCH 1/4] MdePkg/BaseLib.h: " Jian J Wang
2017-12-25 1:51 ` Bi, Dandan
2017-12-25 2:23 ` Wang, Jian J
2017-12-25 1:06 ` [PATCH 2/4] MdeModulePkg/Core: " Jian J Wang
2017-12-25 1:19 ` Zeng, Star
2017-12-25 2:01 ` Bi, Dandan
2017-12-25 1:06 ` [PATCH 3/4] UefiCpuPkg/UefiCpuPkg.uni: Add missing string definition for new PCDs Jian J Wang
2017-12-25 1:58 ` Bi, Dandan
2017-12-25 2:28 ` Wang, Jian J
2017-12-25 1:06 ` [PATCH 4/4] UefiCpuPkg: Update code to use new structure field names Jian J Wang
2017-12-25 2:01 ` Bi, Dandan
2017-12-26 16:47 ` [PATCH 0/4] Coding style clean-up Kinney, Michael D
2017-12-27 0:40 ` Wang, Jian J
2017-12-27 9:29 ` Gao, Liming
2017-12-27 16:35 ` Kinney, Michael D
2017-12-28 0:27 ` Wang, Jian J
2017-12-28 0:37 ` Kinney, Michael D
2017-12-28 0:53 ` Wang, Jian J
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