From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 6594F740038 for ; Thu, 7 Dec 2023 10:52:40 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=ylUfd6O84mH4vZUDRuo/gUYVGoNLWNZtFNCfna2M1Ss=; c=relaxed/simple; d=groups.io; h=ARC-Seal:ARC-Message-Signature:ARC-Authentication-Results:From:To:CC:Subject:Thread-Topic:Thread-Index:Date:Message-ID:References:In-Reply-To:Accept-Language:nodisclaimer:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Language:Content-Type:Content-Transfer-Encoding; s=20140610; t=1701946358; v=1; b=m/5jJo+kY7fDQSllOhEdSt92opcBBowJ82SIzTaiUIrzOPM3lXcLMoz7gvdSqjvAUTQLiiUi rE9UhkSjK8UyTXZyRuqs4Rj27rC2raJLvbMdRdX5GgbEpgvmFhusao8KPvr2eJF6+eOy3ygBDbG WFjS0u5uO2Uykp57J7mkDBCI= X-Received: by 127.0.0.2 with SMTP id fC9pYY7687511xQoDsva7HDj; Thu, 07 Dec 2023 02:52:38 -0800 X-Received: from EUR05-VI1-obe.outbound.protection.outlook.com (EUR05-VI1-obe.outbound.protection.outlook.com [40.107.21.56]) by mx.groups.io with SMTP id smtpd.web10.81272.1701946357459460291 for ; Thu, 07 Dec 2023 02:52:38 -0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=D4Xk/ljyKfE4ZwZnZmrlleNEcfDvTdQJFK+fQ32CT7vG19N57mKG77+xdyh/MJTTxd700HhGiocKXPF87/bD0eEJakGrJH+qTEVk3bG40+KNMhTepYzr0DpTjrLzDs1m2VD53VA/G7qW15/TIqRchTGQcVg+OxlldAhf3Y3MPoWidhYteUhNnpofQkx6Z9GP3v/Fy81IgToZVWVk0lXc8PCHUYjUbtzBG9e/J1Zdg17gKnI2gaoV2KrwZqu2kc01T+2a1/IyGW43raXOhWkxppYlXXLu6I3HigmgMhJlbPlrMIl2MciOnSXOW/Peco62g48tNMM4ZOcFlOEjLCIOtg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=04HETs4wqUg3xYAruHl8l6DNJuPwwaqeq57vUrL1iI0=; b=MLJwvl+ES4kcoBHNsY8C0nWaL3VCM5aj1KaDRFhzSgdvkB/oBoQXH1+IxAepxM+29UbOPgWdW2SjCCCuoWIhdzFFuCerOCTDl6twE8OqRqN6UJLFas9Xmj313fTaMHPPYHGV3Mc1JwXcWUW9xnAjB9XvmlqyLnDQJEIQwnrFZqgLisQi8HFE6irtz2NnHiLtgUzJquZ1bZJrF8uqMx2Clt30zFrEFsciiF04EM4ifV5VcrwU1culOHxs/HNidah9KCDyRh4MsbbdAzVTsDM1iSoZdhzNMl5oqNqgLGYF79R/SoWP+cfw8NuAm85UXHZE/L7Wrmmp4NLhOlu3Os0emQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass header.d=arm.com; arc=none X-Received: from DB4PR08MB7934.eurprd08.prod.outlook.com (2603:10a6:10:37a::11) by AS8PR08MB10070.eurprd08.prod.outlook.com (2603:10a6:20b:631::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7068.26; Thu, 7 Dec 2023 10:52:32 +0000 X-Received: from DB4PR08MB7934.eurprd08.prod.outlook.com ([fe80::51a9:3f29:6df3:c82]) by DB4PR08MB7934.eurprd08.prod.outlook.com ([fe80::51a9:3f29:6df3:c82%4]) with mapi id 15.20.7046.034; Thu, 7 Dec 2023 10:52:32 +0000 From: "Thomas Abraham" To: "devel@edk2.groups.io" , Sahil Kaushal CC: Ard Biesheuvel , Leif Lindholm , Sami Mujawar Subject: Re: [edk2-devel] [edk2-platforms][PATCH V3 1/1] Platform/ARM/N1sdp: Add support to parse NT_FW_CONFIG Thread-Topic: [edk2-devel] [edk2-platforms][PATCH V3 1/1] Platform/ARM/N1sdp: Add support to parse NT_FW_CONFIG Thread-Index: AQHZ1bGKk1prLrtusEm8o+pMY4hKCLCeQqmw Date: Thu, 7 Dec 2023 10:52:32 +0000 Message-ID: References: <20230823110318.826467-1-sahil@arm.com> In-Reply-To: <20230823110318.826467-1-sahil@arm.com> Accept-Language: en-IN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ts-tracking-id: AE1C226B7ECE72449D9E59513A3DEC11.0 x-checkrecipientchecked: true x-ms-publictraffictype: Email x-ms-traffictypediagnostic: DB4PR08MB7934:EE_|AS8PR08MB10070:EE_ x-ms-office365-filtering-correlation-id: 170dcdcf-ca31-47e6-9705-08dbf7129d6b nodisclaimer: true x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam-message-info: kIKruuL/EQck/8ZDtOtN+/0yQuTfOR258kyBGhW+YnwqqbFnZya7/k7adm6guig53kfJDpBVNK6pREySbrupglB130LSZsDIs0cZainjvy/H4wJ1E5AKN3KltRfxfUGcKuNvznsicmRUf6v6XX6f3OGuXScf5tAS3AL13VGbbNcfQp71qVD0ckJHJdjddv3jqTAVGkQ5SqR++ZPt+Kev54RvuU51oeLI5NpZyDuDYBW915aAJdpUz1Sq8dFmr4PvK5sqNw5cIaswQejSPG/+kaB1RqW4wKGwApCxFZpELX6Mm61wqrUjo8JojwE7/GOxj6Bm2bmqa24qyu2EV3wv6edjpUKb33wkfuAq4Fv3HB5PATs03T0ubkNKNKQUJ3b4Y4v/JXMHi9S6kKUACBLHEZtqONQRc9Pde/ZeJ399IjnN2lmfffvJf34YvbogI/SROfmmPmRq0yFLbiNnSk3rgLTirSYK7X8tMQ8acWOoZ6bV6HQD5ZECda32x3vrUrnb0/zkSmyIAozNiYqb04JHUk4ecb6BguWz6g9DHbxaYtlfZDHFoalECm5xArCgDQ0oERKFjjayHAVnAGuKnPOd3AqWjyuAKgsG963LXbi7G3LFi9007zLnHP3zM+YvyRP+RKkZUUA5uIl05ZHWMCDhSg== x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?694lNdRMdwfvRQjPtUad5lJbCr80aUamlkcYq1Ko5PepB5PLrGdhadd2gEBo?= =?us-ascii?Q?Ns488T2jZuWNOiUqwSZ/xjqIeU6L+yTFeT8EjEcbSQi75aHMU/n19VIhC2AS?= =?us-ascii?Q?8b5tR2jpLv3YJqF8YNTTpfsn6yaIW+pU/4Nc7K0z89n3FdapqFD5puxTyqnT?= =?us-ascii?Q?SJt17qYaEJw0YD0yrsQ4+GIomlV54XQs2bg4NXyfhToNXC7NqHpfHgUJ56yi?= =?us-ascii?Q?nImIfSlH125L98kf+Bgk3IJu3IV1qvB4gEZ1C1hYds4/bcXRh3whg4Uqkit9?= =?us-ascii?Q?Rli3TRdj2vSLjMjo49z8H+VAvj4CyL0h4dqrXPbEL1SPm7Dk4OxR2Tkaehxu?= =?us-ascii?Q?Jo3coQwa2B7NN6h78Ahad3Jnq8fmSROyxqrLG+zssLiCk8jrddmW0sXu+ZvZ?= =?us-ascii?Q?fqryq6Yxux8Gq0XbH6IXB10bZA+9ifbXlMkeVd5a/FKTjUOFQTRIo89rVXjs?= =?us-ascii?Q?nh/Ffq2KUGOy92BWt0w/IOLQLCwLenMlL/tpbkjYfTKwkVmZqRLcrMOLdAE1?= =?us-ascii?Q?ZdaE2TClSselCF8JUs7AvwyOHKRC0WFNHc09kX6ZWHf8LhsX86LM/36HcBK1?= =?us-ascii?Q?JM3okBvKcUYKQsJDr0QWpfVw+c0yvEk+rl5YrfcnJQNzvsJELD+xVj5gN1CO?= =?us-ascii?Q?e+ELm6VDEbhV0nOma4DLGGl9VuW5nQWrV3wH8RhbjfANooxUYexQIC4i7eQL?= =?us-ascii?Q?Xm46k8I+MABzrDQLI8ZSXrITi8hqDDGwc0bwHAptYeLfWDeVvGttQPwLuGIF?= =?us-ascii?Q?6X+DK6hpiBkGUbBb9NZqy06DO8NCHs6iCrswp5Vhi4jbRWqe+rZy/dqPtR9B?= =?us-ascii?Q?DVMl9SclqzLwVwI+8NxchiBJjaTYkl5YAxBVAowEFFBU1hTCmG5tyKX+ACcI?= =?us-ascii?Q?9/gMPa7yiuf0AgnBrovxl1ycI04lSZrIgQxeH6YiJliYsuCuwqaxhEb1IRz1?= =?us-ascii?Q?a6JMOs1GgCToDn9DmZPp0ujzci35QZAUyb2uzmaIdTA063JYHXdoJbWa/6Ag?= =?us-ascii?Q?ZKRSWbwIYHo894uBEpV1TuI5UMw9Oa87dvmE+XdhKcmppUPVEDw3/JP23fnG?= =?us-ascii?Q?SgtPqNR0A5hl9ARlvXac/pNH95oI/v+si+5UABHn1BwGItasDXhwWxOvBoqt?= =?us-ascii?Q?i1WqU7ZPoGNGSRvCCnyJTDXQRRjLEGgIk6nhPkWSbjZhrPl5OPQHseSgXlbW?= =?us-ascii?Q?G4Zl3ET4ir5ZVES2o6MG3W7YzpjnDmKBmpk9ORLj4KjW+qno1UIkTkQ3nl1N?= =?us-ascii?Q?4zuB/p4E0QYPTc7IEMxJanmZPG0Ikzg381oZj3qYx45RqFB2q/fbae3BM1Sz?= =?us-ascii?Q?WAgyY1H9d75JhMFNr7bZjOww0QF7M7nUMD6tVmOM1eLokXHfET3fSdftdoFZ?= =?us-ascii?Q?VW9k77zwYRqDcvRiWGSnwRAv25IjzXmU/iUYoE4gSEbAeqtbd92FGkGcHu86?= =?us-ascii?Q?df6mv2ZRdD40igbahOUTTIWi2nDjZqi6HUhhuR3z6LuGCY6JcA9RkY2/fJ21?= =?us-ascii?Q?I1+bspwXaoAZzJYaW3Dnrc/EuslUSD47/ZQ+FdgUXN8RWOk+KJvN8RCJwk8D?= =?us-ascii?Q?Fzh6FtMNvAxxeQi9j1lfpQiZCht2N9bsixLoTbu5w1uqsEqagcMKevXu6yqD?= =?us-ascii?Q?HqlkZVPEeIUagoDCMSGLscI3XtRSPaDwsZKAebBRKmRI?= MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DB4PR08MB7934.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 170dcdcf-ca31-47e6-9705-08dbf7129d6b X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Dec 2023 10:52:32.5290 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 6ED2o/j7oryjMyk+yIhU3OjWgbb2obp26eLDzIKyed8y+w+/Oar7GY9HuMyb6xJnvJ37KxsqeXa4Y+Vxzpul3A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB10070 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,thomas.abraham@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: aAa0fbm4BxFAUq6f9cd4NZnex7686176AA= Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b="m/5jJo+k"; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=arm.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; arc=reject ("signature check failed: fail, {[1] = sig:microsoft.com:reject}") Hi Sahil, > -----Original Message----- > From: devel@edk2.groups.io On Behalf Of sahil via > groups.io > Sent: Wednesday, August 23, 2023 12:03 PM > To: devel@edk2.groups.io > Cc: Ard Biesheuvel ; Leif Lindholm > ; Sami Mujawar ; Sahil > > Subject: [edk2-devel] [edk2-platforms][PATCH V3 1/1] Platform/ARM/N1sdp: > Add support to parse NT_FW_CONFIG > > NT_FW_CONFIG DTB contains platform information passed by > Tf-A boot stage. > This information is used for Virtual memory map generation > during PEI phase and passed on to DXE phase as a HOB, where > it is used in ConfigurationManagerDxe. > > This patch adds a PEI to parse NT_FW_CONFIG and pass it to > other PEI modules(as PPI) and DXE modules(as HOB). > > Signed-off-by: sahil > --- > > Notes: > v3: > - Fixed code review comments > - Added a PEI to parse nt_fw_config > > Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec > | 8 +- > Platform/ARM/N1Sdp/N1SdpPlatform.dsc = | > 5 +- > Platform/ARM/N1Sdp/N1SdpPlatform.fdf = | > 3 +- > > Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Config > urationManagerDxe.inf | 6 +- > Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf > | 41 ++++++ > Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf > | 8 +- > Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h > | 14 +-- > > Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Config > urationManager.c | 24 ++-- > Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c > | 133 ++++++++++++++++++++ > Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c > | 12 +- > Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c > | 33 +++-- > Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S > | 4 +- > 12 files changed, 255 insertions(+), 36 deletions(-) > > diff --git a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec > b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec > index d59f25a5b915..7118da25dce0 100644 > --- a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec > +++ b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec > @@ -1,7 +1,7 @@ > ## @file > > # Describes the entire platform configuration. > > # > > -# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.
> > +# Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.
> > # > > # SPDX-License-Identifier: BSD-2-Clause-Patent > > # > > @@ -22,6 +22,8 @@ > Include # Root include for the package > > > > [Guids.common] > > + # ARM NeoverseN1Soc Platform Info descriptor > > + gArmNeoverseN1SocPlatformInfoDescriptorGuid =3D { 0x9fa16eb5, 0xce13, > 0x4d37, { 0x96, 0xf0, 0x0a, 0xb5, 0xf1, 0xab, 0xff, 0x01 } } > > gArmNeoverseN1SocTokenSpaceGuid =3D { 0xab93eb78, 0x60d7, 0x4099, { 0x= ac, > 0xeb, 0x6d, 0xb5, 0x02, 0x58, 0x7c, 0x24 } } > > > > [PcdsFixedAtBuild] > > @@ -83,3 +85,7 @@ > > gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio32Translation|0x400 > 00000000|UINT64|0x0000004F > > > gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio64Translation|0x400 > 00000000|UINT64|0x00000050 > > > gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber|2|UINT3 > 2|0x00000051 > > + > > +[Ppis] > > + gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid =3D { 0x21D04AD4, > 0x4D23, 0x426D, { 0x8D, 0x3E, 0x92, 0x23, 0x3E, 0xF4, 0xB9, 0x5E } } > > + gArmNeoverseN1SocParameterPpiGuid =3D { 0x4DDD5A72, 0x31AD, 0x4B20, { > 0x8F, 0x5F, 0xB3, 0xE8, 0x24, 0x6F, 0x80, 0x2B } } > > diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc > b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc > index d04b22d3ef51..691d1af3c25c 100644 > --- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc > +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc > @@ -4,7 +4,7 @@ > # This provides platform specific component descriptions and libraries t= hat > > # conform to EFI/Framework standards. > > # > > -# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.
> > +# Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.
> > # > > # SPDX-License-Identifier: BSD-2-Clause-Patent > > # > > @@ -228,6 +228,9 @@ > # Platform driver > > Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.inf > > > > + # PEI Phase modules > > + Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf > > + > > # Human Interface Support > > MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > > > > diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf > b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf > index e5e24ea50294..baac8a3ef727 100644 > --- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf > +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf > @@ -1,7 +1,7 @@ > ## @file > > # FDF file of N1Sdp > > # > > -# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.
> > +# Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.
> > # > > # SPDX-License-Identifier: BSD-2-Clause-Patent > > ## > > @@ -195,6 +195,7 @@ READ_LOCK_STATUS =3D TRUE > INF MdeModulePkg/Core/Pei/PeiMain.inf > > INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf > > INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf > > + INF Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf > > > > FILE FV_IMAGE =3D 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { > > SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF > PROCESSING_REQUIRED =3D TRUE { > > diff --git > a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Con > figurationManagerDxe.inf > b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Con > figurationManagerDxe.inf > index 4f8e7f13021a..242490caf860 100644 > --- > a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Con > figurationManagerDxe.inf > +++ > b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Con > figurationManagerDxe.inf > @@ -1,7 +1,7 @@ > ## @file > > # Configuration Manager Dxe > > # > > -# Copyright (c) 2021, ARM Limited. All rights reserved.
> > +# Copyright (c) 2021 - 2023, ARM Limited. All rights reserved.
> > # > > # SPDX-License-Identifier: BSD-2-Clause-Patent > > # > > @@ -42,6 +42,7 @@ > > > [LibraryClasses] > > ArmPlatformLib > > + HobLib > > PrintLib > > UefiBootServicesTableLib > > UefiDriverEntryPoint > > @@ -170,5 +171,8 @@ > gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio64Translation > > gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber > > > > +[Guids] > > + gArmNeoverseN1SocPlatformInfoDescriptorGuid > > + > > [Depex] > > TRUE > > diff --git > a/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf > b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf > new file mode 100644 > index 000000000000..2eec8c327205 > --- /dev/null > +++ b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf > @@ -0,0 +1,41 @@ > +## @file > > +# This PEI module parse the NtFwConfig for N1Sdp platform and produce > > +# the PPI and HOB. > > +# > > +# Copyright (c) 2023, ARM Limited. All rights reserved.
> > +# > > +# SPDX-License-Identifier: BSD-2-Clause-Patent > > +# > > +## > > + > > +[Defines] > > + INF_VERSION =3D 0x0001001B > > + BASE_NAME =3D N1SdpNtFwConfigPei > > + FILE_GUID =3D CE76D56C-D3A5-4763-9138-DF09E1D1B61= 4 > > + MODULE_TYPE =3D PEIM > > + VERSION_STRING =3D 1.0 > > + ENTRY_POINT =3D Load > > + > > +[Sources] > > + NtFwConfigPei.c > > + > > +[Packages] > > + EmbeddedPkg/EmbeddedPkg.dec > > + MdePkg/MdePkg.dec > > + Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec > > + > > +[LibraryClasses] > > + DebugLib > > + FdtLib > > + HobLib > > + PeimEntryPoint > > + > > +[Ppis] > > + gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid > > + gArmNeoverseN1SocParameterPpiGuid > > + > > +[Guids] > > + gArmNeoverseN1SocPlatformInfoDescriptorGuid > > + > > +[Depex] > > + gArmNeoverseN1SocParameterPpiGuid > > diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.in= f > b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf > index 96e590cdd810..6e7e16b86838 100644 > --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf > +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf > @@ -1,7 +1,7 @@ > ## @file > > # Platform Library for N1Sdp. > > # > > -# Copyright (c) 2018-2021, ARM Limited. All rights reserved.
> > +# Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.
> > # > > # SPDX-License-Identifier: BSD-2-Clause-Patent > > # > > @@ -58,8 +58,8 @@ > > > gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress > > > > -[Guids] > > - gEfiHobListGuid ## CONSUMES ## SystemTable > > - > > [Ppis] > > gArmMpCoreInfoPpiGuid > > + gArmNeoverseN1SocParameterPpiGuid > > + gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid > > + > > diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h > b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h > index 097160c7e2d1..2f83d582ccf3 100644 > --- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h > +++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h > @@ -1,6 +1,6 @@ > /** @file > > * > > -* Copyright (c) 2018 - 2020, ARM Limited. All rights reserved. > > +* Copyright (c) 2018 - 2023, ARM Limited. All rights reserved. > > * > > * SPDX-License-Identifier: BSD-2-Clause-Patent > > * > > @@ -41,11 +41,6 @@ > #define NEOVERSEN1SOC_EXP_PERIPH_BASE0 0x1C000000 > > #define NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ 0x1300000 > > > > -// Base address to a structure of type NEOVERSEN1SOC_PLAT_INFO which is > > -// pre-populated by a earlier boot stage > > -#define NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE > (NEOVERSEN1SOC_NON_SECURE_SRAM_BASE + \ > > - 0x00008000) > > - > > /* > > * Platform information structure stored in Non-secure SRAM. Platform > > * information are passed from the trusted firmware with the below struc= ture > > @@ -55,12 +50,15 @@ > typedef struct { > > /*! 0 - Single Chip, 1 - Chip to Chip (C2C) */ > > UINT8 MultichipMode; > > - /*! Slave count in C2C mode */ > > - UINT8 SlaveCount; > > + /*! Secondary chip count in C2C mode */ > > + UINT8 SecondaryChipCount; > > /*! Local DDR memory size in GigaBytes */ > > UINT8 LocalDdrSize; > > /*! Remote DDR memory size in GigaBytes */ > > UINT8 RemoteDdrSize; > > } NEOVERSEN1SOC_PLAT_INFO; > > > > +typedef struct { > > + CONST VOID *NtFwConfig; > > +} NEOVERSEN1SOC_EL3_FW_HANDOFF_PARAM_PPI; > > #endif > > diff --git > a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Con > figurationManager.c > b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Con > figurationManager.c > index fa6408a7dd1e..e248826ec925 100644 > --- > a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Con > figurationManager.c > +++ > b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/Con > figurationManager.c > @@ -1,7 +1,7 @@ > /** @file > > Configuration Manager Dxe > > > > - Copyright (c) 2021, ARM Limited. All rights reserved.
> > + Copyright (c) 2021 - 2023, ARM Limited. All rights reserved.
> > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > @@ -16,6 +16,7 @@ > #include > > #include > > #include > > +#include > > #include > > #include > > #include > > @@ -28,6 +29,7 @@ > #include "Platform.h" > > > > extern struct EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE Hmat; > > +static NEOVERSEN1SOC_PLAT_INFO *PlatInfo; > > > > /** The platform configuration repository information. > > */ > > @@ -1242,13 +1244,21 @@ InitializePlatformRepository ( > IN EDKII_PLATFORM_REPOSITORY_INFO * CONST PlatRepoInfo > > ) > > { > > - NEOVERSEN1SOC_PLAT_INFO *PlatInfo; > > UINT64 Dram2Size; > > UINT64 RemoteDdrSize; > > + VOID *PlatInfoHob; > > + > > + PlatInfoHob =3D GetFirstGuidHob > (&gArmNeoverseN1SocPlatformInfoDescriptorGuid); > > + > > + if (PlatInfoHob =3D=3D NULL) { > > + DEBUG ((DEBUG_ERROR, "Platform HOB is NULL\n")); > > + return EFI_NOT_FOUND; > > + } > > + > > + PlatInfo =3D (NEOVERSEN1SOC_PLAT_INFO *)GET_GUID_HOB_DATA > (PlatInfoHob); > > > > RemoteDdrSize =3D 0; > > > > - PlatInfo =3D (NEOVERSEN1SOC_PLAT_INFO > *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE; > > Dram2Size =3D ((PlatInfo->LocalDdrSize - 2) * SIZE_1GB); > > > > PlatRepoInfo->MemAffInfo[LOCAL_DDR_REGION2].Length =3D Dram2Size; > > @@ -1512,7 +1522,6 @@ GetGicCInfo ( > ) > > { > > EDKII_PLATFORM_REPOSITORY_INFO * PlatformRepo; > > - NEOVERSEN1SOC_PLAT_INFO *PlatInfo; > > UINT32 TotalObjCount; > > UINT32 ObjIndex; > > > > @@ -1523,7 +1532,6 @@ GetGicCInfo ( > } > > > > PlatformRepo =3D This->PlatRepoInfo; > > - PlatInfo =3D (NEOVERSEN1SOC_PLAT_INFO > *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE; > > > > if (PlatInfo->MultichipMode =3D=3D 1) { > > TotalObjCount =3D PLAT_CPU_COUNT * 2; > > @@ -1623,7 +1631,6 @@ GetStandardNameSpaceObject ( > { > > EFI_STATUS Status; > > EDKII_PLATFORM_REPOSITORY_INFO * PlatformRepo; > > - NEOVERSEN1SOC_PLAT_INFO *PlatInfo; > > UINT32 AcpiTableCount; > > > > if ((This =3D=3D NULL) || (CmObject =3D=3D NULL)) { > > @@ -1634,7 +1641,7 @@ GetStandardNameSpaceObject ( > > > Status =3D EFI_NOT_FOUND; > > PlatformRepo =3D This->PlatRepoInfo; > > - PlatInfo =3D (NEOVERSEN1SOC_PLAT_INFO > *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE; > > + > > AcpiTableCount =3D ARRAY_SIZE (PlatformRepo->CmAcpiTableList); > > if (PlatInfo->MultichipMode =3D=3D 0) > > AcpiTableCount -=3D 1; > > @@ -1697,7 +1704,6 @@ GetArmNameSpaceObject ( > { > > EFI_STATUS Status; > > EDKII_PLATFORM_REPOSITORY_INFO * PlatformRepo; > > - NEOVERSEN1SOC_PLAT_INFO *PlatInfo; > > UINT32 GicRedistCount; > > UINT32 GicCpuCount; > > UINT32 ProcHierarchyInfoCount; > > @@ -1718,8 +1724,6 @@ GetArmNameSpaceObject ( > Status =3D EFI_NOT_FOUND; > > PlatformRepo =3D This->PlatRepoInfo; > > > > - // Probe for multi chip information > > - PlatInfo =3D (NEOVERSEN1SOC_PLAT_INFO > *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE; > > if (PlatInfo->MultichipMode =3D=3D 1) { > > GicRedistCount =3D 2; > > GicCpuCount =3D PLAT_CPU_COUNT * 2; > > diff --git a/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.= c > b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c > new file mode 100644 > index 000000000000..ff6a6a7933c3 > --- /dev/null > +++ b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c > @@ -0,0 +1,133 @@ > +/** @file > > + > > + Copyright (c) 2023, ARM Limited. All rights reserved.
> > + SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > +**/ > > + > > +#include > > +#include > > +#include > > + > > +#include > > +#include > > + > > +STATIC EFI_PEI_PPI_DESCRIPTOR gPpi; > > + > > +/** > > + The entrypoint of the module, parse NtFwConfig and produce the PPI and > HOB. > > + > > + @param[in] FileHandle Handle of the file being invoked. > > + @param[in] PeiServices Describes the list of possible PEI Services. > > + > > + @retval EFI_SUCCESS Either no NT_FW_CONFIG was given by EL3 > firmware > > + OR the N1Sdp FDT HOB was successfully created= . > > + @retval EFI_UNSUPPORTED FDT header sanity check failed. > > + @retval * Other errors are possible. > > +**/ > > + > > +EFI_STATUS > > +EFIAPI > > +Load ( This could have been named better. > > + IN EFI_PEI_FILE_HANDLE FileHandle, > > + IN CONST EFI_PEI_SERVICES **PeiServices > > + ) > > +{ > > + CONST NEOVERSEN1SOC_EL3_FW_HANDOFF_PARAM_PPI *ParamPpi; > > + CONST UINT32 *Property; > > + INT32 Offset; > > + NEOVERSEN1SOC_PLAT_INFO *PlatInfo; > > + INT32 Status; > > + > > + PlatInfo =3D BuildGuidHob ( > > + &gArmNeoverseN1SocPlatformInfoDescriptorGuid, > > + sizeof (*PlatInfo) > > + ); > > + > > + if (PlatInfo =3D=3D NULL) { > > + DEBUG (( > > + DEBUG_ERROR, > > + "[%a]: failed to allocate platform info HOB\n", > > + gEfiCallerBaseName > > + )); > > + return EFI_INVALID_PARAMETER; Is this the correct return value? > > + } > > + > > + Status =3D PeiServicesLocatePpi ( > > + &gArmNeoverseN1SocParameterPpiGuid, > > + 0, > > + NULL, > > + (VOID **)&ParamPpi > > + ); > > + > > + if (EFI_ERROR (Status)) { > > + DEBUG (( > > + DEBUG_ERROR, > > + "[%a]: failed to locate gArmNeoverseN1SocParameterPpiGuid - %r\n", > > + gEfiCallerBaseName, > > + Status > > + )); > > + return EFI_INVALID_PARAMETER; Same here and the below return values as well. > > + } > > + > > + if (fdt_check_header (ParamPpi->NtFwConfig) !=3D 0) { > > + DEBUG ((DEBUG_ERROR, "Invalid DTB file %p passed\n", ParamPpi- > >NtFwConfig)); > > + return EFI_INVALID_PARAMETER; > > + } > > + > > + Offset =3D fdt_subnode_offset (ParamPpi->NtFwConfig, 0, "platform-info= "); > > + if (Offset =3D=3D -FDT_ERR_NOTFOUND) { > > + DEBUG ((DEBUG_ERROR, "Invalid DTB : platform-info node not found\n")= ); > > + return EFI_INVALID_PARAMETER; > > + } > > + > > + Property =3D fdt_getprop (ParamPpi->NtFwConfig, Offset, "local-ddr-siz= e", > NULL); > > + if (Property =3D=3D NULL) { > > + DEBUG ((DEBUG_ERROR, "local-ddr-size property not found\n")); > > + return EFI_INVALID_PARAMETER; > > + } > > + > > + PlatInfo->LocalDdrSize =3D fdt32_to_cpu (*Property); > > + > > + Property =3D fdt_getprop (ParamPpi->NtFwConfig, Offset, "remote-ddr-si= ze", > NULL); > > + if (Property =3D=3D NULL) { > > + DEBUG ((DEBUG_ERROR, "remote-ddr-size property not found\n")); > > + return EFI_INVALID_PARAMETER; > > + } > > + > > + PlatInfo->RemoteDdrSize =3D fdt32_to_cpu (*Property); > > + > > + Property =3D fdt_getprop (ParamPpi->NtFwConfig, Offset, "secondary-chi= p- > count", NULL); > > + if (Property =3D=3D NULL) { > > + DEBUG ((DEBUG_ERROR, "secondary-chip-count property not found\n")); > > + return EFI_INVALID_PARAMETER; > > + } > > + > > + PlatInfo->SecondaryChipCount =3D fdt32_to_cpu (*Property); > > + > > + Property =3D fdt_getprop (ParamPpi->NtFwConfig, Offset, "multichip-mod= e", > NULL); > > + if (Property =3D=3D NULL) { > > + DEBUG ((DEBUG_ERROR, "multichip-mode property not found\n")); > > + return EFI_INVALID_PARAMETER; > > + } > > + > > + PlatInfo->MultichipMode =3D fdt32_to_cpu (*Property); > > + > > + gPpi.Flags =3D EFI_PEI_PPI_DESCRIPTOR_PPI > > + | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST; > > + gPpi.Guid =3D &gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid; > > + gPpi.Ppi =3D PlatInfo; > > + > > + Status =3D PeiServicesInstallPpi (&gPpi); > > + if (EFI_ERROR (Status)) { > > + DEBUG (( > > + DEBUG_ERROR, > > + "[%a]: failed to install PEI service - %r\n", > > + gEfiCallerBaseName, > > + Status > > + )); > > + return EFI_INVALID_PARAMETER; > > + } > > + > > + return EFI_SUCCESS; > > +} > > diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c > b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c > index c0effd37f333..52ee6299b3fe 100644 > --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c > +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c > @@ -1,6 +1,6 @@ > /** @file > > > > - Copyright (c) 2018-2021, ARM Limited. All rights reserved.
> > + Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.
> > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > @@ -8,8 +8,12 @@ > > > #include > > #include > > +#include > > #include > > > > +UINT64 gArgNtFwConfigDtPtr; > > +STATIC NEOVERSEN1SOC_EL3_FW_HANDOFF_PARAM_PPI > mNeoverseN1SocParameterPpi; > > + > > STATIC ARM_CORE_INFO mCoreInfoTable[] =3D { > > { 0x0, 0x0 }, // Cluster 0, Core 0 > > { 0x0, 0x1 }, // Cluster 0, Core 1 > > @@ -46,6 +50,7 @@ ArmPlatformInitialize ( > IN UINTN MpId > > ) > > { > > + mNeoverseN1SocParameterPpi.NtFwConfig =3D (VOID *)gArgNtFwConfigDtPtr; > > return RETURN_SUCCESS; > > } > > > > @@ -80,6 +85,11 @@ EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] =3D { > EFI_PEI_PPI_DESCRIPTOR_PPI, > > &gArmMpCoreInfoPpiGuid, > > &mMpCoreInfoPpi > > + }, > > + { > > + EFI_PEI_PPI_DESCRIPTOR_PPI, > > + &gArmNeoverseN1SocParameterPpiGuid, > > + &mNeoverseN1SocParameterPpi > > } > > }; > > > > diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem= .c > b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c > index 9e8a1efc557d..d6ef92677231 100644 > --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c > +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c > @@ -1,6 +1,6 @@ > /** @file > > > > - Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.
> > + Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.
> > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > @@ -10,6 +10,7 @@ > #include > > #include > > #include > > +#include > > #include > > > > // The total number of descriptors, including the final "end-of-table" d= escriptor. > > @@ -30,15 +31,31 @@ ArmPlatformGetVirtualMemoryMap ( > IN ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap > > ) > > { > > - UINTN Index; > > - ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; > > - EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; > > - NEOVERSEN1SOC_PLAT_INFO *PlatInfo; > > - UINT64 DramBlock2Size; > > - UINT64 RemoteDdrSize; > > + UINTN Index; > > + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; > > + EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; > > + CONST NEOVERSEN1SOC_PLAT_INFO *PlatInfo; > > + UINT64 DramBlock2Size; > > + UINT64 RemoteDdrSize; > Any reason to introduce this diff in this patch? > + EFI_STATUS Status; > > > > Index =3D 0; > > - PlatInfo =3D (NEOVERSEN1SOC_PLAT_INFO > *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE; > > + > > + Status =3D PeiServicesLocatePpi ( > > + &gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid, > > + 0, > > + NULL, > > + (VOID **)&PlatInfo > > + ); > > + if (EFI_ERROR (Status)) { > > + DEBUG (( > > + DEBUG_ERROR, > > + "[%a]: failed to locate gArmNeoverseN1SocPlatformInfoDescriptorPpi= Guid > - %r\n", > > + gEfiCallerBaseName, > > + Status > > + )); > > + } > > + If the PPI is not found, the data in PlatInfo is not valid. So on a error a= bove, would it be better to abort the boot? > > DramBlock2Size =3D ((UINT64)(PlatInfo->LocalDdrSize - > > NEOVERSEN1SOC_DRAM_BLOCK1_SIZE / SIZE_1GB) = * > > (UINT64)SIZE_1GB); > > diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper= .S > b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S > index 8d2069dea837..cbbe7aae9858 100644 > --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S > +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S > @@ -1,6 +1,6 @@ > /** @file > > * > > -* Copyright (c) 2019 - 2020, ARM Limited. All rights reserved. > > +* Copyright (c) 2019 - 2023, ARM Limited. All rights reserved. > > * > > * SPDX-License-Identifier: BSD-2-Clause-Patent > > * > > @@ -25,6 +25,8 @@ GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) > // the UEFI firmware through the CPU registers. > > // > > ASM_PFX(ArmPlatformPeiBootAction): > > + adr x10, gArgNtFwConfigDtPtr > > + str x0, [x10] > > ret > > > > // > > -- > 2.25.1 > > > > -=3D-=3D-=3D-=3D-=3D-=3D > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (#107975): https://edk2.groups.io/g/devel/message/10797= 5 > Mute This Topic: https://groups.io/mt/100912169/1785010 > Group Owner: devel+owner@edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub > [thomas.abraham@arm.com] > -=3D-=3D-=3D-=3D-=3D-=3D > IMPORTANT NOTICE: The contents of this email and any attachments are confid= ential and may also be privileged. If you are not the intended recipient, p= lease notify the sender immediately and do not disclose the contents to any= other person, use it for any purpose, or store or copy the information in = any medium. Thank you. -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#112180): https://edk2.groups.io/g/devel/message/112180 Mute This Topic: https://groups.io/mt/100912169/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-