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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Nov 2020 13:43:59.0224 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a203fffa-6bb0-4fce-cf1f-08d88a35abac X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT008.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR08MB5154 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Rebecca, I have reviewed the following files from this patch and my responses are i= nline marked [SAMI]. ArmPkg/Include/Chipset/AArch64.h ArmPkg/Include/Library/ArmLib.h ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h ArmPkg/Library/ArmLib/AArch64/AArch64Support.S ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c ArmPkg/Library/ArmLib/ArmLibPrivate.h Is it possible to split this patch into smaller patches, please? It will t= hen be easier to review the remaining files. Regards, Sami Mujawar -----Original Message----- From: devel@edk2.groups.io On Behalf Of Rebecca Cra= n via groups.io Sent: 11 November 2020 12:18 AM To: devel@edk2.groups.io Cc: Rebecca Cran ; Leif Lindholm = ; Ard Biesheuvel ; Michael D Kinney ; Liming Gao ; Zhiguang Liu Subject: [edk2-devel] [PATCH v3 3/3] ArmPkg: add Universal/Smbios as a gen= eric SMBIOS library Much of the data for the SMBIOS tables is generic, and need not be duplicated for each platform. Adapt code from edk2-platforms/Silicon/HiSilicon/Drivers/Smbios and edk2-platforms/Silicon/HiSilicon/Drivers/VersionInfoPeim, making them generic, and place them into edk2/ArmPkg/Universal/Smbios and edk2/ArmPkg/Drivers/VersionInfoPeim respectively. They depend on each platform implementing an OemMiscLib that provides OEM specific information such as CPU and cache information. The VersionInfoPeim generates the release date from the build time, and fetches the version string from PcdFirmwareVersionString. Signed-off-by: Rebecca Cran --- ArmPkg/ArmPkg.dec | 16 + .../VersionInfoPeim/VersionInfoPeim.inf | 46 ++ .../ProcessorSubClassDxe.inf | 55 ++ .../Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf | 89 +++ ArmPkg/Include/Chipset/AArch64.h | 4 + ArmPkg/Include/Guid/VersionInfoHobGuid.h | 29 + ArmPkg/Include/Library/ArmLib.h | 6 + ArmPkg/Include/Library/OemMiscLib.h | 86 +++ ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h | 6 + ArmPkg/Library/ArmLib/ArmLibPrivate.h | 100 ++- .../ProcessorSubClassDxe/ProcessorSubClass.h | 34 + .../Smbios/SmbiosMiscDxe/SmbiosMisc.h | 217 ++++++ .../Drivers/VersionInfoPeim/VersionInfoPeim.c | 90 +++ ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 15 + ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c | 17 + .../ProcessorSubClassDxe/ProcessorSubClass.c | 723 ++++++++++++++++++ .../SmbiosMiscDxe/SmbiosMiscDataTable.c | 50 ++ .../SmbiosMiscDxe/SmbiosMiscEntryPoint.c | 167 ++++ .../SmbiosMiscDxe/Type00/MiscBiosVendorData.c | 99 +++ .../Type00/MiscBiosVendorFunction.c | 232 ++++++ .../Type01/MiscSystemManufacturerData.c | 43 ++ .../Type01/MiscSystemManufacturerFunction.c | 171 +++++ .../Type02/MiscBaseBoardManufacturerData.c | 51 ++ .../MiscBaseBoardManufacturerFunction.c | 184 +++++ .../Type03/MiscChassisManufacturerData.c | 58 ++ .../Type03/MiscChassisManufacturerFunction.c | 182 +++++ .../MiscNumberOfInstallableLanguagesData.c | 39 + ...MiscNumberOfInstallableLanguagesFunction.c | 154 ++++ .../Type32/MiscBootInformationData.c | 41 + .../Type32/MiscBootInformationFunction.c | 66 ++ .../Library/ArmLib/AArch64/AArch64Support.S | 3 + .../Library/ArmLib/AArch64/ArmLibSupportV8.S | 2 +- ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S | 4 + ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm | 6 +- .../ProcessorSubClassStrings.uni | 23 + .../SmbiosMiscDxe/SmbiosMiscLibString.uni | 21 + .../SmbiosMiscDxe/Type00/MiscBiosVendor.uni | 18 + .../Type01/MiscSystemManufacturer.uni | 21 + .../Type02/MiscBaseBoardManufacturer.uni | 21 + .../Type03/MiscChassisManufacturer.uni | 18 + .../MiscNumberOfInstallableLanguages.uni | 43 ++ 41 files changed, 3213 insertions(+), 37 deletions(-) create mode 100644 ArmPkg/Drivers/VersionInfoPeim/VersionInfoPeim.inf create mode 100644 ArmPkg/Universal/Smbios/ProcessorSubClassDxe/Processor= SubClassDxe.inf create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.in= f create mode 100644 ArmPkg/Include/Guid/VersionInfoHobGuid.h create mode 100644 ArmPkg/Include/Library/OemMiscLib.h create mode 100644 ArmPkg/Universal/Smbios/ProcessorSubClassDxe/Processor= SubClass.h create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMisc.h create mode 100644 ArmPkg/Drivers/VersionInfoPeim/VersionInfoPeim.c create mode 100644 ArmPkg/Universal/Smbios/ProcessorSubClassDxe/Processor= SubClass.c create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDataTa= ble.c create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscEntryP= oint.c create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosV= endorData.c create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosV= endorFunction.c create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSyste= mManufacturerData.c create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSyste= mManufacturerFunction.c create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseB= oardManufacturerData.c create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseB= oardManufacturerFunction.c create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChass= isManufacturerData.c create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChass= isManufacturerFunction.c create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumbe= rOfInstallableLanguagesData.c create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumbe= rOfInstallableLanguagesFunction.c create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootI= nformationData.c create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootI= nformationFunction.c create mode 100644 ArmPkg/Universal/Smbios/ProcessorSubClassDxe/Processor= SubClassStrings.uni create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscLibStr= ing.uni create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosV= endor.uni create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSyste= mManufacturer.uni create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseB= oardManufacturer.uni create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChass= isManufacturer.uni create mode 100644 ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumbe= rOfInstallableLanguages.uni diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec index eaf1072d9ef3..64cfb7dc65e3 100644 --- a/ArmPkg/ArmPkg.dec +++ b/ArmPkg/ArmPkg.dec @@ -45,6 +45,8 @@ [Guids.common] # Include/Guid/ArmMpCoreInfo.h gArmMpCoreInfoGuid =3D { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65= , 0x8e, 0xd8, 0x57, 0xe8, 0x34} } =20 + gVersionInfoHobGuid =3D { 0xe13a14c, 0x859c, 0x4f22, {0x82, 0xbd, 0x18,= 0xe, 0xe1, 0x42, 0x12, 0xbf } } + [Protocols.common] ## Arm System Control and Management Interface(SCMI) Base protocol ## ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h @@ -115,6 +117,20 @@ [PcdsFixedAtBuild.common] # The Primary Core is ClusterId[0] & CoreId[0] gArmTokenSpaceGuid.PcdArmPrimaryCore|0|UINT32|0x00000037 =20 + # + # SMBIOS PCDs + # + gArmTokenSpaceGuid.PcdSystemProductName|L""|VOID*|0x30000053 + gArmTokenSpaceGuid.PcdSystemVersion|L""|VOID*|0x30000054 + gArmTokenSpaceGuid.PcdBaseBoardManufacturer|L""|VOID*|0x30000055 + gArmTokenSpaceGuid.PcdBaseBoardProductName|L""|VOID*|0x30000056 + gArmTokenSpaceGuid.PcdBaseBoardVersion|L""|VOID*|0x30000057 + gArmTokenSpaceGuid.PcdProcessorManufacturer|L""|VOID*|0x30000071 + gArmTokenSpaceGuid.PcdProcessorVersion|L""|VOID*|0x30000072 + gArmTokenSpaceGuid.PcdProcessorSerialNumber|L""|VOID*|0x30000073 + gArmTokenSpaceGuid.PcdProcessorAssetTag|L""|VOID*|0x30000074 + gArmTokenSpaceGuid.PcdProcessorPartNumber|L""|VOID*|0x30000075 + # # ARM L2x0 PCDs # diff --git a/ArmPkg/Drivers/VersionInfoPeim/VersionInfoPeim.inf b/ArmPkg/D= rivers/VersionInfoPeim/VersionInfoPeim.inf new file mode 100644 index 000000000000..c813dd84de4c --- /dev/null +++ b/ArmPkg/Drivers/VersionInfoPeim/VersionInfoPeim.inf @@ -0,0 +1,46 @@ +#/** @file +# +# Copyright (c) 2016, Hisilicon Limited. All rights reserved. +# Copyright (c) 2016, Linaro Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION =3D 1.29 + BASE_NAME =3D VersionInfoPeim + FILE_GUID =3D 3d45d0a0-4ded-4c01-b16f-2b3007c1fbe2 + MODULE_TYPE =3D PEIM + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D VersionInfoEntry + +[Sources.common] + VersionInfoPeim.c + +[Packages] + ArmPkg/ArmPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + HobLib + PcdLib + PeimEntryPoint + PrintLib + SerialPortLib + +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString + +[Guids] + gVersionInfoHobGuid + +[Depex] + TRUE + +[BuildOptions] + diff --git a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClas= sDxe.inf b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDx= e.inf new file mode 100644 index 000000000000..715f66912983 --- /dev/null +++ b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.in= f @@ -0,0 +1,55 @@ +#/** @file +# +# Copyright (c) 2015, Hisilicon Limited. All rights reserved. +# Copyright (c) 2015, Linaro Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + + +[Defines] + INF_VERSION =3D 1.29 + BASE_NAME =3D ProcessorSubClass + FILE_GUID =3D f3fe0e33-ea38-4069-9fb5-be23407207c7 + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D ProcessorSubClassEntryPoint + +[Sources] + ProcessorSubClass.c + ProcessorSubClassStrings.uni + +[Packages] + ArmPkg/ArmPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + ArmSmcLib + BaseLib + BaseMemoryLib + DebugLib + HiiLib + IoLib + MemoryAllocationLib + OemMiscLib + PcdLib + PrintLib + UefiDriverEntryPoint + +[Protocols] + gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED + +[Pcd] + gArmTokenSpaceGuid.PcdProcessorManufacturer + gArmTokenSpaceGuid.PcdProcessorVersion + gArmTokenSpaceGuid.PcdProcessorSerialNumber + gArmTokenSpaceGuid.PcdProcessorAssetTag + gArmTokenSpaceGuid.PcdProcessorPartNumber + +[Guids] + + +[Depex] + gEfiSmbiosProtocolGuid diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf b/Arm= Pkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf new file mode 100644 index 000000000000..1954f7207267 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf @@ -0,0 +1,89 @@ +## @file +# Component description file for SmbiosMisc instance. +# +# Parses the MiscSubclassDataTable and reports any generated data to the = DataHub. +# All .uni file who tagged with "ToolCode=3D"DUMMY"" in following file l= ist is included by +# MiscSubclassDriver.uni file, the StrGather tool will expand MiscSubcla= ssDriver.uni file +# and parse all .uni file. +# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+# Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2015, Linaro Limited. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +# +# Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +## + + +[Defines] + INF_VERSION =3D 1.29 + BASE_NAME =3D SmbiosMiscDxe + FILE_GUID =3D 7e5e26d4-0be9-401f-b5e1-1c2bda7ca777 + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D SmbiosMiscEntryPoint + +[Sources] + SmbiosMisc.h + SmbiosMiscDataTable.c + SmbiosMiscEntryPoint.c + SmbiosMiscLibString.uni + Type00/MiscBiosVendorData.c + Type00/MiscBiosVendorFunction.c + Type01/MiscSystemManufacturerData.c + Type01/MiscSystemManufacturerFunction.c + Type02/MiscBaseBoardManufacturerData.c + Type02/MiscBaseBoardManufacturerFunction.c + Type03/MiscChassisManufacturerData.c + Type03/MiscChassisManufacturerFunction.c + Type13/MiscNumberOfInstallableLanguagesData.c + Type13/MiscNumberOfInstallableLanguagesFunction.c + Type32/MiscBootInformationData.c + Type32/MiscBootInformationFunction.c + +[Packages] + ArmPkg/ArmPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + DevicePathLib + PcdLib + HiiLib + HobLib + MemoryAllocationLib + OemMiscLib + UefiBootServicesTableLib + UefiDriverEntryPoint + UefiLib + UefiRuntimeServicesTableLib + +[Protocols] + gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED + +[Pcd] + gArmTokenSpaceGuid.PcdFdSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareReleaseDateString + gArmTokenSpaceGuid.PcdSystemProductName + gArmTokenSpaceGuid.PcdSystemVersion + gArmTokenSpaceGuid.PcdBaseBoardManufacturer + gArmTokenSpaceGuid.PcdBaseBoardProductName + gArmTokenSpaceGuid.PcdBaseBoardVersion + gArmTokenSpaceGuid.PcdFdBaseAddress + + gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLang + +[Guids] + gEfiGenericVariableGuid + gVersionInfoHobGuid + +[Depex] + gEfiSmbiosProtocolGuid + + diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AAr= ch64.h index 0ade5cce91c3..7c2b592f92ee 100644 --- a/ArmPkg/Include/Chipset/AArch64.h +++ b/ArmPkg/Include/Chipset/AArch64.h @@ -112,6 +112,10 @@ #define ARM_VECTOR_LOW_A32_FIQ 0x700 #define ARM_VECTOR_LOW_A32_SERR 0x780 =20 +// The ID_AA64MMFR2_EL1 register was added in ARMv8.2. Since we +// build for ARMv8.0, we need to define the register here. +#define ID_AA64MMFR2_EL1 S3_0_C0_C7_2 + [SAMI] I think this file could be a separate patch by itself. e.g somethin= g like 'Add register encoding definition for Memory Model Feature Register = 2'.=20 No other comments for this file. [/SAMI] #define VECTOR_BASE(tbl) \ .section .text.##tbl##,"ax"; \ .align 11; \ diff --git a/ArmPkg/Include/Guid/VersionInfoHobGuid.h b/ArmPkg/Include/Gui= d/VersionInfoHobGuid.h new file mode 100644 index 000000000000..9eeb0a5f7482 --- /dev/null +++ b/ArmPkg/Include/Guid/VersionInfoHobGuid.h @@ -0,0 +1,29 @@ +/** @file +* +* Copyright (c) 2016, Hisilicon Limited. All rights reserved. +* Copyright (c) 2016, Linaro Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#ifndef _VERSION_INFO_HOB_GUID_H_ +#define _VERSION_INFO_HOB_GUID_H_ + +// {0E13A14C-859C-4f22-82BD-180EE14212BF} +#define VERSION_INFO_HOB_GUID \ + {0xe13a14c, 0x859c, 0x4f22, {0x82, 0xbd, 0x18, 0xe, 0xe1, 0x42, 0x12, 0= xbf}} + +extern GUID gVersionInfoHobGuid; + +#pragma pack(1) + +typedef struct { + EFI_TIME BuildTime; + CHAR16 String[1]; +} VERSION_INFO; + +#pragma pack() + +#endif + diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmL= ib.h index 5a27b7c2fc27..4a740b6ca298 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -132,6 +132,12 @@ ArmIsArchTimerImplemented ( VOID ); =20 +UINTN +EFIAPI +ArmIsCcidxImplemented ( + VOID + ); + [SAMI] This could be a separate patch along with ArmPkg/Library/ArmLib/AAr= ch64/AArch64Lib.c e.g. 'Add helper to read CCIDX status'. [/SAMI] UINTN EFIAPI ArmReadIdPfr0 ( diff --git a/ArmPkg/Include/Library/OemMiscLib.h b/ArmPkg/Include/Library/= OemMiscLib.h new file mode 100644 index 000000000000..78dc70426e24 --- /dev/null +++ b/ArmPkg/Include/Library/OemMiscLib.h @@ -0,0 +1,86 @@ +/** @file +* +* Copyright (c) 2015, Hisilicon Limited. All rights reserved. +* Copyright (c) 2015, Linaro Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + + +#ifndef OEM_MISC_LIB_H +#define OEM_MISC_LIB_H + +#include +#include + +typedef enum +{ + CPU_CACHE_L1 =3D 0, + CPU_CACHE_L2, + CPU_CACHE_L3, + CPU_CACHE_L4, + CPU_CACHE_L5, + CPU_CACHE_L6, + CPU_CACHE_L7 +} CPU_CACHE_LEVEL; + +typedef struct +{ + UINT8 Voltage; + UINT16 CurrentSpeed; + UINT16 MaxSpeed; + UINT16 ExternalClock; + UINT16 CoreCount; + UINT16 CoresEnabled; + UINT16 ThreadCount; +} MISC_PROCESSOR_DATA; + +typedef enum { + ProductNameType01, + SerialNumType01, + UuidType01, + SystemManufacturerType01, + AssertTagType02, + SrNumType02, + BoardManufacturerType02, + AssetTagType03, + SrNumType03, + VersionType03, + ChassisTypeType03 , + ManufacturerType03, +} GET_INFO_BMC_OFFSET; + +UINTN OemGetCpuFreq (UINT8 Socket); + +BOOLEAN +OemGetProcessorInformation ( + IN UINTN ProcessorNumber, + IN OUT PROCESSOR_STATUS_DATA *ProcessorStatus, + IN OUT PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristics, + IN OUT MISC_PROCESSOR_DATA *MiscProcessorData + ); + +BOOLEAN OemGetCacheInformation ( + IN UINT8 CacheLevel, + IN OUT SMBIOS_TABLE_TYPE7 *SmbiosCacheTable + ); + +UINT8 OemGetProcessorMaxSockets (VOID); + +UINTN PlatformGetCpuFreq (IN UINT8 Socket); + +UINTN PlatformGetCoreCount (VOID); + +EFI_STATUS OemGetChassisType(OUT UINT8 *ChassisType); + +BOOLEAN OemIsSocketPresent (UINTN Socket); + +VOID +UpdateSmbiosInfo ( + IN EFI_HII_HANDLE mHiiHandle, + IN EFI_STRING_ID TokenToUpdate, + IN UINT8 Offset + ); + +#endif // OEM_MISC_LIB_H diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h b/ArmPkg/Library/A= rmLib/AArch64/AArch64Lib.h index b2c8a8ea0b84..d6bcfc3b82ae 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h @@ -35,5 +35,11 @@ ArmCleanInvalidateDataCacheEntryBySetWay ( IN UINTN SetWayFormat ); =20 +UINTN +EFIAPI +ArmReadIdMmfr2 ( + VOID + ); + [SAMI] This could be a separate patch e.g. 'Add helper to read MMFR2' [/SAMI] #endif // __AARCH64_LIB_H__ =20 diff --git a/ArmPkg/Library/ArmLib/ArmLibPrivate.h b/ArmPkg/Library/ArmLib= /ArmLibPrivate.h index 2e90739eb858..d57c80edb572 100644 --- a/ArmPkg/Library/ArmLib/ArmLibPrivate.h +++ b/ArmPkg/Library/ArmLib/ArmLibPrivate.h @@ -9,46 +9,76 @@ #ifndef __ARM_LIB_PRIVATE_H__ #define __ARM_LIB_PRIVATE_H__ =20 -#define CACHE_SIZE_4_KB (3UL) -#define CACHE_SIZE_8_KB (4UL) -#define CACHE_SIZE_16_KB (5UL) -#define CACHE_SIZE_32_KB (6UL) -#define CACHE_SIZE_64_KB (7UL) -#define CACHE_SIZE_128_KB (8UL) +typedef union { + struct { + UINT32 InD :1; + UINT32 Level :3; + UINT32 TnD :1; + UINT32 Reserved :27; + } Bits; + UINT32 Data; +} CSSELR_DATA; [SAMI] Please add doxygen style documentation for the structure and its fi= elds. [/SAMI] =20 -#define CACHE_ASSOCIATIVITY_DIRECT (0UL) -#define CACHE_ASSOCIATIVITY_4_WAY (2UL) -#define CACHE_ASSOCIATIVITY_8_WAY (3UL) +typedef enum +{ + CSSELR_CACHE_TYPE_DATA_OR_UNIFIED =3D 0, + CSSELR_CACHE_TYPE_INSTRUCTION =3D 1 +} CSSELR_CACHE_TYPE; [SAMI] I am all in favour of using enums. Is it possible to update the enu= ms to confirm to the edk2 coding standard, please? The elements of the enumerated type must follow the data and function nami= ng convention.=20 Please see https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specific= ation/5_source_files/56_declarations_and_types#5-6-2-2-enumerated-types [/SAMI] =20 -#define CACHE_PRESENT (0UL) -#define CACHE_NOT_PRESENT (1UL) +typedef union { + struct { + UINT64 LineSize :3; + UINT64 Associativity :10; + UINT64 NumSets :15; + UINT64 Unknown :4; + UINT64 Reserved :32; + } BitsNonCcidx; + struct { + UINT64 LineSize :3; + UINT64 Associativity :21; + UINT64 Reserved1 :8; + UINT64 NumSets :24; + UINT64 Reserved2 :8; + } BitsCcidx; + UINT64 Data; +} CCSIDR_DATA; =20 -#define CACHE_LINE_LENGTH_32_BYTES (2UL) +typedef union { + struct { + UINT32 NumSets :24; + UINT32 Reserved :8; + } Bits; + UINT32 Data; +} CSSIDR2_DATA; =20 -#define SIZE_FIELD_TO_CACHE_SIZE(x) (((x) >> 6) & 0x0F) -#define SIZE_FIELD_TO_CACHE_ASSOCIATIVITY(x) (((x) >> 3) & 0x07) -#define SIZE_FIELD_TO_CACHE_PRESENCE(x) (((x) >> 2) & 0x01) -#define SIZE_FIELD_TO_CACHE_LINE_LENGTH(x) (((x) >> 0) & 0x03) +// The lower 32 bits are the same for both AARCH32 and AARCH64 +// so we can use the same structure for both. +typedef union { + struct { + UINT32 Ctype1 : 3; + UINT32 Ctype2 : 3; + UINT32 Ctype3 : 3; + UINT32 Ctype4 : 3; + UINT32 Ctype5 : 3; + UINT32 Ctype6 : 3; + UINT32 Ctype7 : 3; + UINT32 LoUIS : 3; + UINT32 LoC : 3; + UINT32 LoUU : 3; + UINT32 Icb : 3; + } Bits; + UINT32 Data; +} CLIDR_DATA; =20 -#define DATA_CACHE_SIZE_FIELD(x) (((x) >> 12) & 0x0FFF) -#define INSTRUCTION_CACHE_SIZE_FIELD(x) (((x) >> 0) & 0x0FFF) +typedef enum { + CLIDR_CACHE_TYPE_NONE =3D 0, + CLIDR_CACHE_TYPE_INSTRUCTION_ONLY =3D 1, + CLIDR_CACHE_TYPE_DATA_ONLY =3D 2, + CLIDR_CACHE_TYPE_SEPARATE =3D 3, + CLIDR_CACHE_TYPE_UNIFIED =3D 4 +} CLIDR_CACHE_TYPE; =20 -#define DATA_CACHE_SIZE(x) (SIZE_FIELD_TO_CACHE_SIZE(D= ATA_CACHE_SIZE_FIELD(x))) -#define DATA_CACHE_ASSOCIATIVITY(x) (SIZE_FIELD_TO_CACHE_ASSOCI= ATIVITY(DATA_CACHE_SIZE_FIELD(x))) -#define DATA_CACHE_PRESENT(x) (SIZE_FIELD_TO_CACHE_PRESEN= CE(DATA_CACHE_SIZE_FIELD(x))) -#define DATA_CACHE_LINE_LENGTH(x) (SIZE_FIELD_TO_CACHE_LINE_L= ENGTH(DATA_CACHE_SIZE_FIELD(x))) - -#define INSTRUCTION_CACHE_SIZE(x) (SIZE_FIELD_TO_CACHE_SIZE(I= NSTRUCTION_CACHE_SIZE_FIELD(x))) -#define INSTRUCTION_CACHE_ASSOCIATIVITY(x) (SIZE_FIELD_TO_CACHE_ASSOCI= ATIVITY(INSTRUCTION_CACHE_SIZE_FIELD(x))) -#define INSTRUCTION_CACHE_PRESENT(x) (SIZE_FIELD_TO_CACHE_PRESEN= CE(INSTRUCTION_CACHE_SIZE_FIELD(x))) -#define INSTRUCTION_CACHE_LINE_LENGTH(x) (SIZE_FIELD_TO_CACHE_LINE_L= ENGTH(INSTRUCTION_CACHE_SIZE_FIELD(x))) - -#define CACHE_TYPE(x) (((x) >> 25) & 0x0F) -#define CACHE_TYPE_WRITE_BACK (0x0EUL) - -#define CACHE_ARCHITECTURE(x) (((x) >> 24) & 0x01) -#define CACHE_ARCHITECTURE_UNIFIED (0UL) -#define CACHE_ARCHITECTURE_SEPARATE (1UL) +#define CLIDR_GET_CACHE_TYPE(x, level) ((x >> (3 * level)) & 0b111) =20 VOID CPSRMaskInsert ( @@ -61,7 +91,7 @@ CPSRRead ( VOID ); =20 -UINT32 +UINTN ReadCCSIDR ( IN UINT32 CSSELR ); diff --git a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClas= s.h b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.h new file mode 100644 index 000000000000..a8a4ab2b1beb --- /dev/null +++ b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.h @@ -0,0 +1,34 @@ +/** @file +* +* Copyright (c) 2015, Hisilicon Limited. All rights reserved. +* Copyright (c) 2015, Linaro Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#ifndef PROCESSOR_SUBCLASS_DRIVER_H +#define PROCESSOR_SUBCLASS_DRIVER_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +extern UINT8 ProcessorSubClassStrings[]; + +#endif // PROCESSOR_SUBCLASS_DRIVER_H diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMisc.h b/ArmPkg/U= niversal/Smbios/SmbiosMiscDxe/SmbiosMisc.h new file mode 100644 index 000000000000..80c77517fabc --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMisc.h @@ -0,0 +1,217 @@ +/**@file + +Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.
+Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+Copyright (c) 2015, Linaro Limited. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +Module Name: + + SmbiosMisc.h + +Abstract: + + Header file for the SmbiosMisc Driver. + +Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +**/ + +#ifndef SMBIOS_MISC_DRIVER_H +#define SMBIOS_MISC_DRIVER_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +// +// Data table entry update function. +// +typedef EFI_STATUS (EFIAPI EFI_MISC_SMBIOS_DATA_FUNCTION) ( + IN VOID *RecordData, + IN EFI_SMBIOS_PROTOCOL *Smbios + ); + + +// +// Data table entry definition. +// +typedef struct { + // + // intermediate input data for SMBIOS record + // + VOID *RecordData; + EFI_MISC_SMBIOS_DATA_FUNCTION *Function; +} EFI_MISC_SMBIOS_DATA_TABLE; + + +// +// Data Table extern definitions. +// +#define MISC_SMBIOS_TABLE_EXTERNS(NAME1, NAME2, NAME3) \ +extern NAME1 NAME2 ## Data; \ +extern EFI_MISC_SMBIOS_DATA_FUNCTION NAME3 ## Function; + + +// +// Data Table entries +// + +#define MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION(NAME1, NAME2) \ +{ \ + & NAME1 ## Data, \ + NAME2 ## Function \ +} + + +// +// Global definition macros. +// +#define MISC_SMBIOS_TABLE_DATA(NAME1, NAME2) \ + NAME1 NAME2 ## Data + +#define MISC_SMBIOS_TABLE_FUNCTION(NAME2) \ + EFI_STATUS EFIAPI NAME2 ## Function( \ + IN VOID *RecordData, \ + IN EFI_SMBIOS_PROTOCOL *Smbios \ + ) + +// +// Data Table Array Entries +// +extern EFI_HII_HANDLE mHiiHandle; + +typedef struct _EFI_TYPE11_OEM_STRING{ + UINT8 Offset; + EFI_STRING_ID RefOemDefineString; +} EFI_TYPE11_OEM_STRING; + +typedef struct _EFI_TYPE12_SYSTEM_CONFIGURATION_OPTIONS_STRING{ + UINT8 Offset; + EFI_STRING_ID RefType12SystemConfigurationOptions= String; +} EFI_TYPE12_SYSTEM_CONFIGURATION_OPTIONS_STRING; + +typedef struct _EFI_TYPE13_BIOS_LANGUAGE_INFORMATION_STRING{ + UINT8 *LanguageSignature; + EFI_STRING_ID InstallableLanguageLongString; + EFI_STRING_ID InstallableLanguageAbbreviateString= ; +} EFI_TYPE13_BIOS_LANGUAGE_INFORMATION_STRING; + +typedef struct _EFI_TYPE40_ADDITIONAL_INFORMATION_ENTRY{ + UINT8 RefType; + UINT8 RefOffset; + EFI_STRING_ID RefString; + UINT8 Value; +} EFI_TYPE40_ADDITIONAL_INFORMATION_ENTRY; + +typedef enum { + STRING, + DATA, +} OEM_DEFINE_TYPE; + +typedef struct { + OEM_DEFINE_TYPE Type; + UINTN Token; + UINTN DataSize; +} OEM_DEFINE_INFO_STRING; + +typedef struct { + OEM_DEFINE_TYPE Type; + UINTN DataAddress; + UINTN DataSize; +} OEM_DEFINE_INFO_DATA; + +typedef union { + OEM_DEFINE_INFO_STRING DefineString; + OEM_DEFINE_INFO_DATA DefineData; +} EFI_OEM_DEFINE_ARRAY; + +typedef struct _DMI_STRING_STRUCTURE { + UINT8 Type; + UINT8 Offset; + UINT8 Valid; + UINT16 Length; + UINT8 String[1]; // Variable length fie= ld +} DMI_STRING_STRUCTURE; + +typedef struct { + UINT8 Type; // The SMBIOS str= ucture type + UINT8 FixedOffset; // The offset of = the string reference + // within the str= ucture's fixed data. +} DMI_UPDATABLE_STRING; + +EFI_STATUS +FindString ( + IN UINT8 Type, + IN UINT8 Offset, + IN EFI_STRING_ID TokenToUpdate +); + +EFI_STATUS +FindUuid ( + EFI_GUID *Uuid +); + +EFI_STATUS +StringToBiosVeriosn ( + IN EFI_STRING_ID BiosVersionToken, + OUT UINT8 *MajorVersion, + OUT UINT8 *MinorVersion +); + + +/** + Logs SMBIOS record. + + @param [in] Buffer Pointer to the data buffer. + @param [in] SmbiosHandle Pointer for retrieve handle. + +**/ +EFI_STATUS +LogSmbiosData ( + IN UINT8 *Buffer, + IN OUT EFI_SMBIOS_HANDLE *SmbiosHandle + ); + +/** + Get Link Type Handle. + + @param [in] SmbiosType Get this Type from SMBIOS table + @param [out] HandleArray Pointer to Hadndler array with has been fre= e by caller + @param [out] HandleCount Pointer to Hadndler Counter + +**/ +VOID +GetLinkTypeHandle( + IN UINT8 SmbiosType, + OUT UINT16 **HandleArray, + OUT UINTN *HandleCount + ); + +// +// Data Table Array +// +extern EFI_MISC_SMBIOS_DATA_TABLE mSmbiosMiscDataTable[]; + +// +// Data Table Array Entries +// +extern UINTN mSmbiosMiscDataTableEntries; + +extern UINT8 SmbiosMiscDxeStrings[]; + + + +#endif // SMBIOS_MISC_DRIVER_H diff --git a/ArmPkg/Drivers/VersionInfoPeim/VersionInfoPeim.c b/ArmPkg/Dri= vers/VersionInfoPeim/VersionInfoPeim.c new file mode 100644 index 000000000000..5b5dc47e7ea9 --- /dev/null +++ b/ArmPkg/Drivers/VersionInfoPeim/VersionInfoPeim.c @@ -0,0 +1,90 @@ +/** @file +* +* Copyright (c) 2016, Hisilicon Limited. All rights reserved. +* Copyright (c) 2016, Linaro Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +struct MonthDescription { + CONST CHAR8* MonthStr; + UINT32 MonthInt; +} gMonthDescription[] =3D { + { "Jan", 1 }, + { "Feb", 2 }, + { "Mar", 3 }, + { "Apr", 4 }, + { "May", 5 }, + { "Jun", 6 }, + { "Jul", 7 }, + { "Aug", 8 }, + { "Sep", 9 }, + { "Oct", 10 }, + { "Nov", 11 }, + { "Dec", 12 }, + { "???", 1 }, // Use 1 as default month +}; + +VOID GetReleaseTime (EFI_TIME *Time) +{ + CONST CHAR8 *ReleaseDate =3D __DATE__; + CONST CHAR8 *ReleaseTime =3D __TIME__; + UINTN i; + + for (i =3D 0;i < 12;i++) { + if (AsciiStrnCmp (ReleaseDate, gMonthDescription[i].MonthStr, 3) =3D= =3D 0) { + break; + } + } + + Time->Month =3D gMonthDescription[i].MonthInt; + Time->Day =3D AsciiStrDecimalToUintn(ReleaseDate+4); + Time->Year =3D AsciiStrDecimalToUintn(ReleaseDate+7); + Time->Hour =3D AsciiStrDecimalToUintn(ReleaseTime); + Time->Minute =3D AsciiStrDecimalToUintn(ReleaseTime+3); + Time->Second =3D AsciiStrDecimalToUintn(ReleaseTime+6); + + return; +} + +EFI_STATUS +EFIAPI +VersionInfoEntry ( + IN EFI_PEI_FILE_HANDLE FileHandle, + IN CONST EFI_PEI_SERVICES **PeiServices + ) +{ + VERSION_INFO *VersionInfo; + EFI_TIME Time =3D {0}; + CONST CHAR16 *ReleaseString =3D + (CHAR16 *) FixedPcdGetPtr (PcdFirmwareVersionString); + + GetReleaseTime (&Time); + + VersionInfo =3D BuildGuidHob (&gVersionInfoHobGuid, + sizeof (VERSION_INFO) - + sizeof (VersionInfo->String) + + StrSize (ReleaseString)); + if (VersionInfo =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "[%a]:[%d] Build HOB failed!\n", __FILE__, __LIN= E__)); + return EFI_OUT_OF_RESOURCES; + } + + CopyMem (&VersionInfo->BuildTime, &Time, sizeof (EFI_TIME)); + CopyMem (VersionInfo->String, ReleaseString, StrSize (ReleaseString)); + + return EFI_SUCCESS; +} diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/A= rmLib/AArch64/AArch64Lib.c index 3fbd591192e2..134fe56cb387 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c @@ -71,3 +71,18 @@ ArmCleanDataCache ( ArmDataSynchronizationBarrier (); AArch64DataCacheOperation (ArmCleanDataCacheEntryBySetWay); } + +UINTN +EFIAPI +ArmIsCcidxImplemented ( + VOID + ) [SAMI] Would return type BOOL be more suitable here?=20 This could be combined with changes in ArmPkg/Library/ArmLib/AArch64/AArch= 64Lib.c to create a separate patch. [/SAMI] +{ + UINTN Mmfr2; + + Mmfr2 =3D ArmReadIdMmfr2 (); + if (((Mmfr2 >> 20) & 0xF) =3D=3D 1) + return 1; + + return 0; [SAMI] This could be changed to: return (((Mmfr4 >> 24) & 0xF) =3D=3D 1) ? TRUE: FALSE; [/SAMI] +} diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c b/ArmPkg/Library/ArmLib/= Arm/ArmV7Lib.c index 2c4a23e1a1b2..4466e39dcc28 100644 --- a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c +++ b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c @@ -71,3 +71,20 @@ ArmCleanDataCache ( ArmDataSynchronizationBarrier (); ArmV7DataCacheOperation (ArmCleanDataCacheEntryBySetWay); } + +UINTN +EFIAPI +ArmIsCcidxImplemented ( + VOID + ) +{ + UINTN Mmfr4; + + Mmfr4 =3D ArmReadIdMmfr4 (); + if (((Mmfr4 >> 24) & 0xF) =3D=3D 1) { + return 1; + } + + return 0; +} [SAMI] Same comments as for ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c [/SAMI] + diff --git a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClas= s.c b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c new file mode 100644 index 000000000000..2b29945ce966 --- /dev/null +++ b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c @@ -0,0 +1,723 @@ +/** @file +* +* Copyright (c) 2020, NUVIA Inc. All rights reserved. +* Copyright (c) 2015, Hisilicon Limited. All rights reserved. +* Copyright (c) 2015, Linaro Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include "ProcessorSubClass.h" + +EFI_HII_HANDLE mHiiHandle; + +EFI_SMBIOS_PROTOCOL *mSmbios; + +SMBIOS_TABLE_TYPE4 mSmbiosProcessorTable[] =3D { + //CPU0 + { + { //Header + EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, //Type + sizeof (SMBIOS_TABLE_TYPE4), //Length + 0 //Handle + }, + 1, //Socket + CentralProcessor, //ProcessorType + ProcessorFamilyIndicatorFamily2, //ProcessorFamily + 2, //ProcessorManufactur= e + { //ProcessorId + { //Signature + 0 + }, + { //FeatureFlags + 0 + } + }, + 3, //ProcessorVersion + { //Voltage + 0 + }, + 0, //ExternalClock + 0, //MaxSpeed + 0, //CurrentSpeed + 0, //Status + ProcessorUpgradeUnknown, //ProcessorUpgrade + 0xFFFF, //L1CacheHandle + 0xFFFF, //L2CacheHandle + 0xFFFF, //L3CacheHandle + 4, //SerialNumber + 5, //AssetTag + 6, //PartNumber + 0, //CoreCount + 0, //EnabledCoreCount + 0, //ThreadCount + 0, //ProcessorCharacteri= stics + ProcessorFamilyARM, //ProcessorFamily2 + 0, //CoreCount2 + 0, //EnabledCoreCount2 + 0 //ThreadCount2 + }, + + //CPU1 + { + { //Header + EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, //Type + sizeof (SMBIOS_TABLE_TYPE4), //Length + 0 //Handle + }, + 1, //Socket + CentralProcessor, //ProcessorType + ProcessorFamilyIndicatorFamily2, //ProcessorFamily + 2, //ProcessorManufactur= e + { //ProcessorId + { //Signature + 0 + }, + { //FeatureFlags + 0 + } + }, + 3, //ProcessorVersion + { //Voltage + 0 + }, + 0, //ExternalClock + 0, //MaxSpeed + 0, //CurrentSpeed + 0, //Status + ProcessorUpgradeUnknown, //ProcessorUpgrade + 0xFFFF, //L1CacheHandle + 0xFFFF, //L2CacheHandle + 0xFFFF, //L3CacheHandle + 4, //SerialNumber + 5, //AssetTag + 6, //PartNumber + 0, //CoreCount + 0, //EnabledCoreCount + 0, //ThreadCount + 0, //ProcessorCharacteri= stics + ProcessorFamilyARMv8, //ProcessorFamily2 + 0, //CoreCount2 + 0, //EnabledCoreCount2 + 0 //ThreadCount2 + } +}; + + +UINT16 +GetCpuFrequency ( + IN UINT8 ProcessorNumber +) +{ + return (UINT16)(PlatformGetCpuFreq (ProcessorNumber)/1000/1000); +} + +UINTN +GetCacheSocketStr ( + IN UINT8 CacheLevel, + IN UINT8 CacheSubLevel, + OUT CHAR16 *CacheSocketStr + ) +{ + UINTN CacheSocketStrLen; + + if (CacheLevel =3D=3D CPU_CACHE_L1 && CacheSubLevel =3D=3D 0) { + CacheSocketStrLen =3D UnicodeSPrint (CacheSocketStr, SMBIOS_STRING_MA= X_LENGTH - 1, L"L%x Instruction Cache", CacheLevel + 1); + } else if (CacheLevel =3D=3D CPU_CACHE_L1 && CacheSubLevel =3D=3D 1) { + CacheSocketStrLen =3D UnicodeSPrint (CacheSocketStr, SMBIOS_STRING_MA= X_LENGTH - 1, L"L%x Data Cache", CacheLevel + 1); + } else { + CacheSocketStrLen =3D UnicodeSPrint (CacheSocketStr, SMBIOS_STRING_MA= X_LENGTH - 1, L"L%x Cache", CacheLevel + 1); + } + + return CacheSocketStrLen; +} + +/** + Add Type 7 SMBIOS Record for Cache Information. + + @param[in] ProcessorNumber Processor number of specified process= or. + @param[out] L1CacheHandle Pointer to the handle of the L1 Cache= SMBIOS record. + @param[out] L2CacheHandle Pointer to the handle of the L2 Cache= SMBIOS record. + @param[out] L3CacheHandle Pointer to the handle of the L3 Cache= SMBIOS record. + +**/ +EFI_STATUS +AddSmbiosCacheTypeTable ( + IN UINTN ProcessorNumber, + OUT EFI_SMBIOS_HANDLE *L1CacheHandle, + OUT EFI_SMBIOS_HANDLE *L2CacheHandle, + OUT EFI_SMBIOS_HANDLE *L3CacheHandle + ) +{ + EFI_STATUS Status; + SMBIOS_TABLE_TYPE7 *Type7Record; + EFI_SMBIOS_HANDLE SmbiosHandle; + UINTN TableSize; + UINT8 CacheLevel; + UINT8 CacheSubLevel; + CHAR8 *OptionalStrStart; + EFI_STRING CacheSocketStr; + UINTN CacheSocketStrLen; + UINTN StringBufferSize; + + CLIDR_DATA Clidr; + CSSELR_DATA Csselr; + CCSIDR_DATA Ccsidr; + + UINT16 CacheSize16; + UINT32 CacheSize32; + UINT64 CacheSize64; + BOOLEAN CcidxSupported; + UINT32 Associativity; + UINT8 MaxCacheLevel; + + CONST UINT8 MAX_ARM_CACHE_LEVEL =3D 7; + + Status =3D EFI_SUCCESS; + + MaxCacheLevel =3D 0; + + // Read the CLIDR register to find out what caches are present. + Clidr.Data =3D ReadCLIDR (); + + // Get the cache type for the L1 cache. If it's 0, there are no caches. + if (CLIDR_GET_CACHE_TYPE (Clidr.Data, 0) =3D=3D CLIDR_CACHE_TYPE_NONE) = { + return EFI_SUCCESS; + } + + for (CacheLevel =3D 1; CacheLevel < MAX_ARM_CACHE_LEVEL; CacheLevel++) = { + if (CLIDR_GET_CACHE_TYPE (Clidr.Data, CacheLevel) =3D=3D CLIDR_CACHE_= TYPE_NONE) { + MaxCacheLevel =3D CacheLevel; + break; + } + } + + CcidxSupported =3D ArmIsCcidxImplemented (); + + for (CacheLevel =3D 0; CacheLevel < MaxCacheLevel; CacheLevel++) + { + Type7Record =3D NULL; + + CLIDR_CACHE_TYPE CacheType =3D CLIDR_GET_CACHE_TYPE (Clidr.Data, Cach= eLevel); + + // At each level of cache, we can have a single type (unified, instru= ction or data), + // or two types - separate data and instruction caches. If we have se= parate + // instruction and data caches, then on the first iteration (CacheSub= Level =3D 0) + // process the instruction cache. + for (CacheSubLevel =3D 0; CacheSubLevel <=3D 1; CacheSubLevel++) { + // If there's no separate data/instruction cache, skip the second i= teration + if (CacheSubLevel > 0 && CacheType !=3D CLIDR_CACHE_TYPE_SEPARATE) = { + continue; + } + + // Allocate and fetch the cache description+++ + StringBufferSize =3D sizeof (CHAR16) * SMBIOS_STRING_MAX_LENGTH; + CacheSocketStr =3D AllocateZeroPool (StringBufferSize); + if (CacheSocketStr =3D=3D NULL) { + Status =3D EFI_OUT_OF_RESOURCES; + goto Exit; + } + + CacheSocketStrLen =3D GetCacheSocketStr (CacheLevel, CacheSubLevel,= CacheSocketStr); + + TableSize =3D sizeof (SMBIOS_TABLE_TYPE7) + CacheSocketStrLen + 1 += 1; + Type7Record =3D AllocateZeroPool (TableSize); + if (Type7Record =3D=3D NULL) { + Status =3D EFI_OUT_OF_RESOURCES; + goto Exit; + } + + Type7Record->Hdr.Type =3D EFI_SMBIOS_TYPE_CACHE_INFORMATION; + Type7Record->Hdr.Length =3D sizeof (SMBIOS_TABLE_TYPE7); + Type7Record->Hdr.Handle =3D SMBIOS_HANDLE_PI_RESERVED; + + Type7Record->SocketDesignation =3D 1; + + Type7Record->SupportedSRAMType.Unknown =3D 1; + Type7Record->CurrentSRAMType.Unknown =3D 1; + Type7Record->CacheSpeed =3D 0; + Type7Record->ErrorCorrectionType =3D CacheErrorUnknown; + + Csselr.Data =3D 0; + Csselr.Bits.Level =3D CacheLevel; + + if (CacheSubLevel =3D=3D 0) { + if (CacheType =3D=3D CLIDR_CACHE_TYPE_INSTRUCTION_ONLY || + CacheType =3D=3D CLIDR_CACHE_TYPE_SEPARATE) { + Csselr.Bits.InD =3D CSSELR_CACHE_TYPE_INSTRUCTION; // Instructi= on cache + Type7Record->SystemCacheType =3D CacheTypeInstruction; + } else { + Csselr.Bits.InD =3D CSSELR_CACHE_TYPE_DATA_OR_UNIFIED; + if (CacheType =3D=3D CLIDR_CACHE_TYPE_DATA_ONLY) { + Type7Record->SystemCacheType =3D CacheTypeData; + } else { + Type7Record->SystemCacheType =3D CacheTypeUnified; + } + } + } else { + Type7Record->SystemCacheType =3D CacheTypeData; + Csselr.Bits.InD =3D CSSELR_CACHE_TYPE_DATA_OR_UNIFIED; + } + + // Read the CCSIDR register to get the cache architecture + Ccsidr.Data =3D ReadCCSIDR (Csselr.Data); + + if (CcidxSupported) { + CacheSize64 =3D (UINT64)(1 << (Ccsidr.BitsCcidx.LineSize + 4)) * = (Ccsidr.BitsCcidx.Associativity + 1) * (Ccsidr.BitsCcidx.NumSets + 1); + Associativity =3D Ccsidr.BitsCcidx.Associativity; + } else { + CacheSize64 =3D (1 << (Ccsidr.BitsNonCcidx.LineSize + 4)) * (Ccsi= dr.BitsNonCcidx.Associativity + 1) * (Ccsidr.BitsNonCcidx.NumSets + 1); + Associativity =3D Ccsidr.BitsNonCcidx.Associativity; + } + + CacheSize64 /=3D 1024; // Minimum granularity is 1K + + // Encode the cache size into the format SMBIOS wants + if (CacheSize64 < MAX_INT16) { + CacheSize16 =3D CacheSize64; + CacheSize32 =3D CacheSize16; + } else if ((CacheSize64 / 64) < MAX_INT16) { + CacheSize16 =3D (1 << 15) | (CacheSize64 / 64); + CacheSize32 =3D CacheSize16; + } else { + if ((CacheSize64 / 1024) <=3D 2047) { + CacheSize32 =3D CacheSize64; + } else { + CacheSize32 =3D (1 << 31) | (CacheSize64 / 64); + } + + CacheSize16 =3D -1; + } + + Type7Record->Associativity =3D Associativity + 1; + Type7Record->MaximumCacheSize =3D CacheSize16; + Type7Record->InstalledSize =3D CacheSize16; + Type7Record->MaximumCacheSize2 =3D CacheSize32; + Type7Record->InstalledSize2 =3D CacheSize32; + + switch (Associativity + 1) { + case 2: + Type7Record->Associativity =3D CacheAssociativity2Way; + break; + case 4: + Type7Record->Associativity =3D CacheAssociativity4Way; + break; + case 8: + Type7Record->Associativity =3D CacheAssociativity8Way; + break; + case 16: + Type7Record->Associativity =3D CacheAssociativity16Way; + break; + case 12: + Type7Record->Associativity =3D CacheAssociativity12Way; + break; + case 24: + Type7Record->Associativity =3D CacheAssociativity24Way; + break; + case 32: + Type7Record->Associativity =3D CacheAssociativity32Way; + break; + case 48: + Type7Record->Associativity =3D CacheAssociativity48Way; + break; + case 64: + Type7Record->Associativity =3D CacheAssociativity64Way; + break; + case 20: + Type7Record->Associativity =3D CacheAssociativity20Way; + break; + default: + Type7Record->Associativity =3D CacheAssociativityOther; + break; + } + + Type7Record->CacheConfiguration =3D (3 << 8) | (1 << 7) | (3 << 5) = | (0 << 3) | CacheLevel; + + // Allow the platform to fill in other information such as speed, S= RAM type etc. + if (!OemGetCacheInformation (CacheLevel, Type7Record)) { + continue; + } + + OptionalStrStart =3D (CHAR8 *) (Type7Record + 1); + UnicodeStrToAsciiStrS (CacheSocketStr, OptionalStrStart, CacheSocke= tStrLen + 1); + + SmbiosHandle =3D SMBIOS_HANDLE_PI_RESERVED; + // Finally, install the table + Status =3D mSmbios->Add (mSmbios, NULL, &SmbiosHandle, (EFI_SMBIOS_= TABLE_HEADER *)Type7Record); + if (EFI_ERROR (Status)) { + goto Exit; + } + + // Config L1/L2/L3 Cache Handle + switch (CacheLevel) { + case CPU_CACHE_L1: + *L1CacheHandle =3D SmbiosHandle; + break; + case CPU_CACHE_L2: + *L2CacheHandle =3D SmbiosHandle; + break; + case CPU_CACHE_L3: + *L3CacheHandle =3D SmbiosHandle; + break; + default: + break; + } +Exit: + if (Type7Record !=3D NULL) + { + FreePool (Type7Record); + } + if (CacheSocketStr !=3D NULL) + { + FreePool (CacheSocketStr); + CacheSocketStr =3D NULL; + } + } + } + + return Status; +} + +/** + Add Type 4 SMBIOS Record for Processor Information. + + @param[in] ProcessorNumber Processor number of specified process= or. + +**/ +EFI_STATUS +AddSmbiosProcessorTypeTable ( + IN UINTN ProcessorNumber + ) +{ + EFI_STATUS Status; + SMBIOS_TABLE_TYPE4 *Type4Record; + EFI_SMBIOS_HANDLE SmbiosHandle; + EFI_SMBIOS_HANDLE L1CacheHandle; + EFI_SMBIOS_HANDLE L2CacheHandle; + EFI_SMBIOS_HANDLE L3CacheHandle; + + CHAR8 *OptionalStrStart; + UINT8 *LegacyVoltage; + EFI_STRING_ID ProcessorManu; + EFI_STRING_ID ProcessorVersion; + EFI_STRING_ID SerialNumber; + EFI_STRING_ID AssetTag; + EFI_STRING_ID PartNumber; + EFI_STRING ProcessorSocketStr; + EFI_STRING ProcessorManuStr; + EFI_STRING ProcessorVersionStr; + EFI_STRING SerialNumberStr; + EFI_STRING AssetTagStr; + EFI_STRING PartNumberStr; + UINTN ProcessorSocketStrLen; + UINTN ProcessorManuStrLen; + UINTN ProcessorVersionStrLen; + UINTN SerialNumberStrLen; + UINTN AssetTagStrLen; + UINTN PartNumberStrLen; + UINTN StringBufferSize; + UINTN TotalSize; + + PROCESSOR_STATUS_DATA ProcessorStatus =3D {{0}}; + MISC_PROCESSOR_DATA MiscProcessorData; + + ARM_SMC_ARGS Args; + BOOLEAN Arm64SocIdSupported =3D FALSE; + int Jep106Code; + int SocRevision; + int SmcCallStatus; + UINT64 *ProcessorId; + + Type4Record =3D NULL; + ProcessorManuStr =3D NULL; + ProcessorVersionStr =3D NULL; + SerialNumberStr =3D NULL; + AssetTagStr =3D NULL; + PartNumberStr =3D NULL; + + + MiscProcessorData.Voltage =3D 0; + MiscProcessorData.CurrentSpeed =3D 0; + MiscProcessorData.CoreCount =3D 0; + MiscProcessorData.CoresEnabled =3D 0; + MiscProcessorData.ThreadCount =3D 0; + L1CacheHandle =3D 0xFFFF; + L2CacheHandle =3D 0xFFFF; + L3CacheHandle =3D 0xFFFF; + + ProcessorManu =3D STRING_TOKEN (STR_PROCESSOR_UNKNOWN); + ProcessorVersion =3D STRING_TOKEN (STR_PROCESSOR_UNKNOWN); + SerialNumber =3D STRING_TOKEN (STR_PROCESSOR_UNKNOWN); + AssetTag =3D STRING_TOKEN (STR_PROCESSOR_UNKNOWN); + PartNumber =3D STRING_TOKEN (STR_PROCESSOR_UNKNOWN); + + BOOLEAN Populated =3D OemGetProcessorInformation (ProcessorNumber, + &ProcessorStatus, + (PROCESSOR_CHARACTERIST= IC_FLAGS*)&mSmbiosProcessorTable[ProcessorNumber].ProcessorCharacteristics, + &MiscProcessorData); + if (Populated) + { + Status =3D AddSmbiosCacheTypeTable (ProcessorNumber, &L1CacheHandle, + &L2CacheHandle, &L3CacheHandle); + + ProcessorManu =3D STRING_TOKEN (STR_PROCESSOR_MANUFACTURE); + ProcessorVersion =3D STRING_TOKEN (STR_PROCESSOR_VERSION); + SerialNumber =3D STRING_TOKEN (STR_PROCESSOR_SERIAL_NUMBER); + AssetTag =3D STRING_TOKEN (STR_PROCESSOR_ASSET_TAG); + PartNumber =3D STRING_TOKEN (STR_PROCESSOR_PART_NUMBER); + + ProcessorManuStr =3D (CHAR16 *) PcdGetPtr (PcdProcessorManufacturer); + + if (StrLen (ProcessorManuStr) > 0) + { + HiiSetString (mHiiHandle, ProcessorManu, ProcessorManuStr, NULL); + } + + ProcessorVersionStr =3D (CHAR16 *) PcdGetPtr (PcdProcessorVersion); + + if (StrLen (ProcessorVersionStr) > 0) + { + HiiSetString (mHiiHandle, ProcessorVersion, ProcessorVersionStr, NU= LL); + } + + SerialNumberStr =3D (CHAR16 *) PcdGetPtr (PcdProcessorSerialNumber); + + if (StrLen (SerialNumberStr) > 0) + { + HiiSetString (mHiiHandle, SerialNumber, SerialNumberStr, NULL); + } + + AssetTagStr =3D (CHAR16 *) PcdGetPtr (PcdProcessorAssetTag); + + if (StrLen (AssetTagStr) > 0) + { + HiiSetString (mHiiHandle, AssetTag, AssetTagStr, NULL); + } + + PartNumberStr =3D (CHAR16 *) PcdGetPtr (PcdProcessorPartNumber); + + if (StrLen (PartNumberStr) > 0) + { + HiiSetString (mHiiHandle, PartNumber, PartNumberStr, NULL); + } + } + + // Processor Socket Designation + StringBufferSize =3D sizeof (CHAR16) * SMBIOS_STRING_MAX_LENGTH; + ProcessorSocketStr =3D AllocateZeroPool (StringBufferSize); + if (ProcessorSocketStr =3D=3D NULL) + { + Status =3D EFI_OUT_OF_RESOURCES; + goto Exit; + } + + ProcessorSocketStrLen =3D UnicodeSPrint (ProcessorSocketStr, StringBuff= erSize, L"CPU%02d", ProcessorNumber + 1); + + // Processor Manufacture + ProcessorManuStr =3D HiiGetPackageString (&gEfiCallerIdGuid, ProcessorM= anu, NULL); + ProcessorManuStrLen =3D StrLen (ProcessorManuStr); + + // Processor Version + ProcessorVersionStr =3D HiiGetPackageString (&gEfiCallerIdGuid, Process= orVersion, NULL); + ProcessorVersionStrLen =3D StrLen (ProcessorVersionStr); + + // Serial Number + SerialNumberStr =3D HiiGetPackageString (&gEfiCallerIdGuid, SerialNumbe= r, NULL); + SerialNumberStrLen =3D StrLen (SerialNumberStr); + + // Asset Tag + AssetTagStr =3D HiiGetPackageString (&gEfiCallerIdGuid, AssetTag, NULL)= ; + AssetTagStrLen =3D StrLen (AssetTagStr); + + // Part Number + PartNumberStr =3D HiiGetPackageString (&gEfiCallerIdGuid, PartNumber, N= ULL); + PartNumberStrLen =3D StrLen (PartNumberStr); + + TotalSize =3D sizeof (SMBIOS_TABLE_TYPE4) + ProcessorSocketStrLen + 1 + + ProcessorManuStrLen + 1 + + ProcessorVersionStrLen + 1 + + SerialNumberStrLen + 1 + + AssetTagStrLen + 1 + + PartNumberStrLen + 1 + 1; + Type4Record =3D AllocateZeroPool (TotalSize); + if (Type4Record =3D=3D NULL) + { + Status =3D EFI_OUT_OF_RESOURCES; + goto Exit; + } + + (VOID)CopyMem (Type4Record, &mSmbiosProcessorTable[ProcessorNumber], si= zeof (SMBIOS_TABLE_TYPE4)); + + LegacyVoltage =3D (UINT8*)&Type4Record->Voltage; + + *LegacyVoltage =3D MiscProcessorData.Voltage; + Type4Record->CurrentSpeed =3D MiscProcessorData.CurrentSp= eed; + Type4Record->MaxSpeed =3D MiscProcessorData.MaxSpeed; + Type4Record->Status =3D ProcessorStatus.Data; + Type4Record->L1CacheHandle =3D L1CacheHandle; + Type4Record->L2CacheHandle =3D L2CacheHandle; + Type4Record->L3CacheHandle =3D L3CacheHandle; + Type4Record->CoreCount =3D MiscProcessorData.CoreCount= ; + Type4Record->CoreCount2 =3D MiscProcessorData.CoreCount= ; + Type4Record->EnabledCoreCount =3D MiscProcessorData.CoresEnab= led; + Type4Record->EnabledCoreCount2 =3D MiscProcessorData.CoresEnab= led; + Type4Record->ThreadCount =3D MiscProcessorData.ThreadCou= nt; + Type4Record->ThreadCount2 =3D MiscProcessorData.ThreadCou= nt; + + Type4Record->ExternalClock =3D (UINT16)(ArmReadCntFrq () /= 1000 / 1000); + + ProcessorId =3D (UINT64 *)&Type4Record->ProcessorId; + + Args.Arg0 =3D ARM_SMC_ID_ARCH_VERSION; + ArmCallSmc (&Args); + SmcCallStatus =3D (int)Args.Arg0; + + if (SmcCallStatus < 0 || (SmcCallStatus >> 16) >=3D 1) { + Args.Arg0 =3D ARM_SMC_ID_ARCH_FEATURES; + Args.Arg1 =3D ARM_SMC_ID_ARCH_SOC_ID; + ArmCallSmc (&Args); + + if (Args.Arg0 >=3D 0) { + PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristicFlags =3D (P= ROCESSOR_CHARACTERISTIC_FLAGS*)&Type4Record->ProcessorCharacteristics; + Args.Arg0 =3D ARM_SMC_ID_ARCH_SOC_ID; + Args.Arg1 =3D 0; + ArmCallSmc (&Args); + SmcCallStatus =3D (int)Args.Arg0; + + if (SmcCallStatus >=3D 0) { + Arm64SocIdSupported =3D TRUE; + ProcessorCharacteristicFlags->ProcessorArm64SocId =3D 1; + Jep106Code =3D (int)Args.Arg0; + } else { + ProcessorCharacteristicFlags->ProcessorArm64SocId =3D 0; + } + Args.Arg0 =3D ARM_SMC_ID_ARCH_SOC_ID; + Args.Arg1 =3D 1; + ArmCallSmc (&Args); + SmcCallStatus =3D (int)Args.Arg0; + + if (SmcCallStatus >=3D 0) { + SocRevision =3D (int)Args.Arg0; + } + } + } + + if (Arm64SocIdSupported) { + *ProcessorId =3D ((UINT64)Jep106Code << 32) | SocRevision; + } else { + *ProcessorId =3D ArmReadMidr (); + } + + UINTN MainIdRegister =3D ArmReadMidr (); + if (((MainIdRegister >> 16) & 0xF) < 8) { + Type4Record->ProcessorFamily2 =3D ProcessorFamilyARM; + } else { + if (sizeof (VOID*) =3D=3D 4) { + Type4Record->ProcessorFamily2 =3D ProcessorFamilyARMv7; + } else { + Type4Record->ProcessorFamily2 =3D ProcessorFamilyARMv8; + } + } + + OptionalStrStart =3D (CHAR8 *) (Type4Record + 1); + UnicodeStrToAsciiStrS (ProcessorSocketStr, OptionalStrStart, ProcessorS= ocketStrLen + 1); + UnicodeStrToAsciiStrS (ProcessorManuStr, OptionalStrStart + ProcessorSo= cketStrLen + 1, ProcessorManuStrLen + 1); + UnicodeStrToAsciiStrS (ProcessorVersionStr, OptionalStrStart + Processo= rSocketStrLen + 1 + ProcessorManuStrLen + 1, ProcessorVersionStrLen + 1); + UnicodeStrToAsciiStrS (SerialNumberStr, OptionalStrStart + ProcessorSoc= ketStrLen + 1 + ProcessorManuStrLen + 1 + ProcessorVersionStrLen + 1, Seria= lNumberStrLen + 1); + UnicodeStrToAsciiStrS (AssetTagStr, OptionalStrStart + ProcessorSocketS= trLen + 1 + ProcessorManuStrLen + 1 + ProcessorVersionStrLen + 1 + SerialNu= mberStrLen + 1, AssetTagStrLen + 1); + UnicodeStrToAsciiStrS (PartNumberStr, OptionalStrStart + ProcessorSocke= tStrLen + 1 + ProcessorManuStrLen + 1 + ProcessorVersionStrLen + 1 + Serial= NumberStrLen + 1 + AssetTagStrLen + 1, PartNumberStrLen + 1); + + SmbiosHandle =3D SMBIOS_HANDLE_PI_RESERVED; + Status =3D mSmbios->Add (mSmbios, NULL, &SmbiosHandle, (EFI_SMBIOS_TABL= E_HEADER *)Type4Record); + if (EFI_ERROR (Status)) + { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type04 Table Log Failed! %r \= n", __FUNCTION__, __LINE__, Status)); + } + FreePool (Type4Record); + +Exit: + if (ProcessorSocketStr !=3D NULL) + { + FreePool (ProcessorSocketStr); + } + if (ProcessorManuStr !=3D NULL) + { + FreePool (ProcessorManuStr); + } + if (ProcessorVersionStr !=3D NULL) + { + FreePool (ProcessorVersionStr); + } + if (SerialNumberStr !=3D NULL) + { + FreePool (SerialNumberStr); + } + if (AssetTagStr !=3D NULL) + { + FreePool (AssetTagStr); + } + if (PartNumberStr !=3D NULL) + { + FreePool (PartNumberStr); + } + + return Status; +} + +/** + Standard EFI driver point. This driver locates the ProcessorConfigurat= ionData Variable, + if it exists, add the related SMBIOS tables by PI SMBIOS protocol. + + @param ImageHandle Handle for the image of this driver + @param SystemTable Pointer to the EFI System Table + + @retval EFI_SUCCESS The data was successfully stored. + +**/ +EFI_STATUS +EFIAPI +ProcessorSubClassEntryPoint( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + UINT32 SocketIndex; + + // + // Locate dependent protocols + // + Status =3D gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL, (VOID**)= &mSmbios); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Could not locate SMBIOS protocol. %r\n", Statu= s)); + return Status; + } + + // + // Add our default strings to the HII database. They will be modified l= ater. + // + mHiiHandle =3D HiiAddPackages ( + &gEfiCallerIdGuid, + NULL, + ProcessorSubClassStrings, + NULL, + NULL + ); + if (mHiiHandle =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + + // + // Add SMBIOS tables for populated sockets. + // + for (SocketIndex =3D 0; SocketIndex < OemGetProcessorMaxSockets(); Sock= etIndex++) { + Status =3D AddSmbiosProcessorTypeTable (SocketIndex); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Add Processor Type Table Failed! %r.\n", Sta= tus)); + return Status; + } + } + + return Status; +} diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDataTable.c b= /ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDataTable.c new file mode 100644 index 000000000000..eff045383991 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDataTable.c @@ -0,0 +1,50 @@ +/**@file + +Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.
+Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+Copyright (c) 2015, Linaro Limited. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +Module Name: + + SmbiosMiscDataTable.c + +Abstract: + + This file provides SMBIOS Misc Type. + +Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +**/ + +#include "SmbiosMisc.h" + + MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE0, MiscBiosVendor, MiscBio= sVendor) + MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE1, MiscSystemManufacturer,= MiscSystemManufacturer) + MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE3, MiscChassisManufacturer= , MiscChassisManufacturer) + MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE2, MiscBaseBoardManufactur= er, MiscBaseBoardManufacturer) + MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE13, MiscNumberOfInstallable= Languages, MiscNumberOfInstallableLanguages) + MISC_SMBIOS_TABLE_EXTERNS (SMBIOS_TABLE_TYPE32, MiscBootInformation, Mi= scBootInformation) + + +EFI_MISC_SMBIOS_DATA_TABLE mSmbiosMiscDataTable[] =3D { + // Type0 + MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscBiosVendor, MiscBiosVend= or), + // Type1 + MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscSystemManufacturer, Misc= SystemManufacturer), + // Type3 + MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscChassisManufacturer, Mis= cChassisManufacturer), + // Type2 + MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscBaseBoardManufacturer, M= iscBaseBoardManufacturer), + // Type13 + MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscNumberOfInstallableLangu= ages, MiscNumberOfInstallableLanguages), + // Type32 + MISC_SMBIOS_TABLE_ENTRY_DATA_AND_FUNCTION (MiscBootInformation, MiscBoo= tInformation), +}; + + +// +// Number of Data Table entries. +// +UINTN mSmbiosMiscDataTableEntries =3D + (sizeof (mSmbiosMiscDataTable)) / sizeof (EFI_MISC_SMBIOS_DATA_TABLE); diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscEntryPoint.c = b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscEntryPoint.c new file mode 100644 index 000000000000..fe81367d1c28 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscEntryPoint.c @@ -0,0 +1,167 @@ +/**@file + +Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.
+Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+Copyright (c) 2015, Linaro Limited. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +Module Name: + + SmbiosMiscEntryPoint.c + +Abstract: + + This driver parses the mSmbiosMiscDataTable structure and reports + any generated data using SMBIOS protocol. + +Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +**/ + +#include "SmbiosMisc.h" + +#define MAX_HANDLE_COUNT 0x10 + +EFI_HANDLE mImageHandle; +EFI_HII_HANDLE mHiiHandle; +EFI_SMBIOS_PROTOCOL *mSmbios =3D NULL; + +/** + Standard EFI driver point. This driver parses the mSmbiosMiscDataTable + structure and reports any generated data using SMBIOS protocol. + + @param ImageHandle Handle for the image of this driver + @param SystemTable Pointer to the EFI System Table + + @retval EFI_SUCCESS The data was successfully stored. + +**/ +EFI_STATUS +EFIAPI +SmbiosMiscEntryPoint( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + UINTN Index; + EFI_STATUS EfiStatus; + EFI_SMBIOS_PROTOCOL *Smbios; + + mImageHandle =3D ImageHandle; + + EfiStatus =3D gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL, (VOID= **)&Smbios); + if (EFI_ERROR (EfiStatus)) { + DEBUG ((DEBUG_ERROR, "Could not locate SMBIOS protocol. %r\n", EfiSt= atus)); + return EfiStatus; + } + + mSmbios =3D Smbios; + + mHiiHandle =3D HiiAddPackages ( + &gEfiCallerIdGuid, + mImageHandle, + SmbiosMiscDxeStrings, + NULL + ); + if (mHiiHandle =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + + for (Index =3D 0; Index < mSmbiosMiscDataTableEntries; ++Index) { + // + // If the entry have a function pointer, just log the data. + // + if (mSmbiosMiscDataTable[Index].Function !=3D NULL) { + EfiStatus =3D (*mSmbiosMiscDataTable[Index].Function)( + mSmbiosMiscDataTable[Index].RecordData, + Smbios + ); + + if (EFI_ERROR(EfiStatus)) { + DEBUG ((DEBUG_ERROR, "Misc smbios store error. Index=3D%d, Retur= nStatus=3D%r\n", Index, EfiStatus)); + return EfiStatus; + } + } + } + + return EfiStatus; +} + + +/** + Logs SMBIOS record. + + @param Buffer The data for the fixed portion of the SMB= IOS record. The format of the record is + determined by EFI_SMBIOS_TABLE_HEADER.Typ= e. The size of the formatted area is defined + by EFI_SMBIOS_TABLE_HEADER.Length and eit= her followed by a double-null (0x0000) or + a set of null terminated strings and a nu= ll. + @param SmbiosHandle A unique handle will be assigned to the S= MBIOS record. + + @retval EFI_SUCCESS Record was added. + @retval EFI_OUT_OF_RESOURCES Record was not added due to lack of syste= m resources. + +**/ +EFI_STATUS +LogSmbiosData ( + IN UINT8 *Buffer, + IN OUT EFI_SMBIOS_HANDLE *SmbiosHandle + ) +{ + EFI_STATUS Status; + + *SmbiosHandle =3D SMBIOS_HANDLE_PI_RESERVED; + + Status =3D mSmbios->Add ( + mSmbios, + NULL, + SmbiosHandle, + (EFI_SMBIOS_TABLE_HEADER *)Buffer + ); + + return Status; +} + + +VOID +GetLinkTypeHandle( + IN UINT8 SmbiosType, + OUT UINT16 **HandleArray, + OUT UINTN *HandleCount + ) +{ + EFI_STATUS Status; + EFI_SMBIOS_HANDLE SmbiosHandle; + EFI_SMBIOS_TABLE_HEADER *LinkTypeData =3D NULL; + + if (mSmbios =3D=3D NULL) { + return; + } + + SmbiosHandle =3D SMBIOS_HANDLE_PI_RESERVED; + + *HandleArray =3D AllocateZeroPool (sizeof(UINT16) * MAX_HANDLE_COUNT); + if (*HandleArray =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "HandleArray allocate memory resource failed.\n"= )); + return; + } + + *HandleCount =3D 0; + + while(1) { + Status =3D mSmbios->GetNext ( + mSmbios, + &SmbiosHandle, + &SmbiosType, + &LinkTypeData, + NULL + ); + + if (!EFI_ERROR (Status)) { + (*HandleArray)[*HandleCount] =3D LinkTypeData->Handle; + (*HandleCount)++; + } else { + break; + } + } +} + diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorDa= ta.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorData.c new file mode 100644 index 000000000000..d9a1ed418428 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorData.c @@ -0,0 +1,99 @@ +/*++ + +Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+Copyright (c) 2015, Linaro Limited. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +Module Name: + + MiscBiosVendorData.c + +Abstract: + + This file provides Smbios Type0 Data + +Based on the files under Nt32Pkg/MiscSubClassPlatformDxe/ + +**/ + + +#include "SmbiosMisc.h" + + +// +// Static (possibly build generated) Bios Vendor data. +// +MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE0, MiscBiosVendor) =3D { + { //Hdr + EFI_SMBIOS_TYPE_BIOS_INFORMATION, // Type, + 0, // Length, + 0 // Handle + }, + 1, //Vendor + 2, //BiosVersion + 0xE000, //BiosSegment + 3, //BiosReleaseDate + 0, //BiosSize + { //BiosCharacteristics + 0, // Reserved = :2 + 0, // Unknown = :1 + 0, // BiosCharacteristicsNotS= upported :1 + 0, // IsaIsSupported = :1 + 0, // McaIsSupported = :1 + 0, // EisaIsSupported = :1 + 1, // PciIsSupported = :1 + 0, // PcmciaIsSupported = :1 + 1, // PlugAndPlayIsSupported = :1 + 0, // ApmIsSupported = :1 + 1, // BiosIsUpgradable = :1 + 1, // BiosShadowingAllowed = :1 + 0, // VlVesaIsSupported = :1 + 0, // EscdSupportIsAvailable = :1 + 1, // BootFromCdIsSupported = :1 + 1, // SelectableBootIsSupport= ed :1 + 0, // RomBiosIsSocketed = :1 + 0, // BootFromPcmciaIsSupport= ed :1 + 1, // EDDSpecificationIsSuppo= rted :1 + 0, // JapaneseNecFloppyIsSupp= orted :1 + 0, // JapaneseToshibaFloppyIs= Supported :1 + 0, // Floppy525_360IsSupporte= d :1 + 0, // Floppy525_12IsSupported= :1 + 0, // Floppy35_720IsSupported= :1 + 0, // Floppy35_288IsSupported= :1 + 0, // PrintScreenIsSupported = :1 + 0, // Keyboard8042IsSupported= :1 + 0, // SerialIsSupported = :1 + 0, // PrinterIsSupported = :1 + 0, // CgaMonoIsSupported = :1 + 0, // NecPc98 = :1 + 0 // ReservedForVendor = :32 + }, + + { + 0x03, //BIOSCharacteristicsExt= ensionBytes[0] + // { //BiosReserved + // 1, // AcpiIsSupported = :1 + // 1, // UsbLegacyIsSuppor= ted :1 + // 0, // AgpIsSupported = :1 + // 0, // I20BootIsSupporte= d :1 + // 0, // Ls120BootIsSuppor= ted :1 + // 0, // AtapiZipDriveBoot= IsSupported :1 + // 0, // Boot1394IsSupport= ed :1 + // 0 // SmartBatteryIsSup= ported :1 + // }, + 0x0D //BIOSCharacteristicsExt= ensionBytes[1] + // { //SystemReserved + // 1, //BiosBootSpecIsSupp= orted :1 + // 0, //FunctionKeyNetwork= BootIsSupported :1 + // 1, //TargetContentDistr= ibutionEnabled :1 + // 1, //UefiSpecificationS= upported :1 + // 0, //VirtualMachineSupp= orted :1 + // 0 //ExtensionByte2Rese= rved :3 + // }, + }, + 0xFF, //SystemBiosMajorRelease; + 0xFF, //SystemBiosMinorRelease; + 0xFF, //EmbeddedControllerFirmwareM= ajorRelease; + 0xFF //EmbeddedControllerFirmwareM= inorRelease; +}; diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFu= nction.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunct= ion.c new file mode 100644 index 000000000000..2f6b35d80266 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.= c @@ -0,0 +1,232 @@ +/** @file + + Copyright (c) 2009, Intel Corporation. All rights reserved.
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+ Copyright (c) 2015, Linaro Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + + +Module Name: + + MiscBiosVendorData.c + +Abstract: + + This driver parses the mMiscSubclassDataTable structure and reports + any generated data to the DataHub. + +Based on the files under Nt32Pkg/MiscSubClassPlatformDxe/ + +--*/ + +// +#include "SmbiosMisc.h" +#include +#include + + +/** + Field Filling Function. Transform an EFI_EXP_BASE2_DATA to a byte, with= '64k' + as the unit. + + @param Value Pointer to Base2_Data + + @retval + +**/ +UINT8 +Base2ToByteWith64KUnit ( + IN UINTN Value + ) +{ + UINT8 Size; + + Size =3D Value / SIZE_64KB + (Value % SIZE_64KB + SIZE_64KB - 1) / SIZE= _64KB; + + return Size; +} + + +/** + +**/ +VOID * +GetBiosReleaseDate ( + VOID + ) +{ + CHAR16 *ReleaseDate =3D NULL; + VERSION_INFO *Version; + VOID *Hob; + + ReleaseDate =3D AllocateZeroPool ((sizeof (CHAR16)) * SMBIOS_STRING_MAX= _LENGTH); + if (ReleaseDate =3D=3D NULL) { + return NULL; + } + + Hob =3D GetFirstGuidHob (&gVersionInfoHobGuid); + if (Hob =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "[%a:%d] Version info HOB not found!\n", __FUNCT= ION__, __LINE__)); + return NULL; + } + + Version =3D GET_GUID_HOB_DATA (Hob); + (VOID)UnicodeSPrintAsciiFormat (ReleaseDate, + (sizeof (CHAR16)) * SMBIOS_STRING_MAX_LENGTH, + "%02d/%02d/%4d", + Version->BuildTime.Month, + Version->BuildTime.Day, + Version->BuildTime.Year + ); + + return ReleaseDate; +} + +VOID * +GetBiosVersion ( + VOID + ) +{ + VERSION_INFO *Version; + VOID *Hob; + + Hob =3D GetFirstGuidHob (&gVersionInfoHobGuid); + if (Hob =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "[%a:%d] Version info HOB not found!\n", __FUNCT= ION__, __LINE__)); + return NULL; + } + + Version =3D GET_GUID_HOB_DATA (Hob); + return Version->String; +} + + +/** + This function makes boot time changes to the contents of the + MiscBiosVendor (Type 0). + + @param RecordData Pointer to copy of RecordData from t= he Data Table. + + @retval EFI_SUCCESS All parameters were valid. + @retval EFI_UNSUPPORTED Unexpected RecordType value. + @retval EFI_INVALID_PARAMETER Invalid parameter was found. + +**/ +MISC_SMBIOS_TABLE_FUNCTION(MiscBiosVendor) +{ + CHAR8 *OptionalStrStart; + UINTN VendorStrLen; + UINTN VerStrLen; + UINTN DateStrLen; + UINTN BiosPhysicalSizeHexValue; + CHAR16 *Vendor; + CHAR16 *Version; + CHAR16 *ReleaseDate; + CHAR16 *Char16String; + EFI_STATUS Status; + EFI_STRING_ID TokenToUpdate; + EFI_STRING_ID TokenToGet; + SMBIOS_TABLE_TYPE0 *SmbiosRecord; + EFI_SMBIOS_HANDLE SmbiosHandle; + SMBIOS_TABLE_TYPE0 *InputData; + + // + // First check for invalid parameters. + // + if (RecordData =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + InputData =3D (SMBIOS_TABLE_TYPE0 *)RecordData; + + Vendor =3D (CHAR16 *) PcdGetPtr (PcdFirmwareVendor); + + if (StrLen (Vendor) > 0) { + TokenToUpdate =3D STRING_TOKEN (STR_MISC_BIOS_VENDOR); + HiiSetString (mHiiHandle, TokenToUpdate, Vendor, NULL); + } + + Version =3D GetBiosVersion(); + + if (StrLen (Version) > 0) { + TokenToUpdate =3D STRING_TOKEN (STR_MISC_BIOS_VERSION); + HiiSetString (mHiiHandle, TokenToUpdate, Version, NULL); + } else { + Version =3D (CHAR16 *) PcdGetPtr (PcdFirmwareVersionString); + if (StrLen (Version) > 0) { + TokenToUpdate =3D STRING_TOKEN (STR_MISC_BIOS_VERSION); + HiiSetString (mHiiHandle, TokenToUpdate, Version, NULL); + } + } + + Char16String =3D GetBiosReleaseDate (); + if (StrLen(Char16String) > 0) { + TokenToUpdate =3D STRING_TOKEN (STR_MISC_BIOS_RELEASE_DATE); + HiiSetString (mHiiHandle, TokenToUpdate, Char16String, NULL); + } + + TokenToGet =3D STRING_TOKEN (STR_MISC_BIOS_VENDOR); + Vendor =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL); + VendorStrLen =3D StrLen (Vendor); + + TokenToGet =3D STRING_TOKEN (STR_MISC_BIOS_VERSION); + Version =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL); + VerStrLen =3D StrLen (Version); + + TokenToGet =3D STRING_TOKEN (STR_MISC_BIOS_RELEASE_DATE); + ReleaseDate =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NUL= L); + DateStrLen =3D StrLen (ReleaseDate); + + // + // Now update the BiosPhysicalSize + // + BiosPhysicalSizeHexValue =3D FixedPcdGet32 (PcdFdSize); + + // + // Two zeros following the last string. + // + SmbiosRecord =3D AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE0) + Vendor= StrLen + 1 + VerStrLen + 1 + DateStrLen + 1 + 1); + if (SmbiosRecord =3D=3D NULL) { + Status =3D EFI_OUT_OF_RESOURCES; + goto Exit; + } + + (VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE0)); + + SmbiosRecord->Hdr.Length =3D sizeof (SMBIOS_TABLE_TYPE0); + SmbiosRecord->BiosSegment =3D (UINT16)(FixedPcdGet32 (PcdFdBaseAddress)= / SIZE_64KB); + SmbiosRecord->BiosSize =3D Base2ToByteWith64KUnit (BiosPhysicalSizeHexV= alue) - 1; + + OptionalStrStart =3D (CHAR8 *)(SmbiosRecord + 1); + UnicodeStrToAsciiStrS (Vendor, OptionalStrStart, VendorStrLen + 1); + UnicodeStrToAsciiStrS (Version, OptionalStrStart + VendorStrLen + 1, Ve= rStrLen + 1); + UnicodeStrToAsciiStrS (ReleaseDate, OptionalStrStart + VendorStrLen + 1= + VerStrLen + 1, DateStrLen + 1); + // + // Now we have got the full smbios record, call smbios protocol to add = this record. + // + Status =3D LogSmbiosData ((UINT8*)SmbiosRecord, &SmbiosHandle); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type00 Table Log Failed! %r= \n", __FUNCTION__, __LINE__, Status)); + } + + FreePool (SmbiosRecord); + +Exit: + if (Vendor !=3D NULL) { + FreePool (Vendor); + } + + if (Version !=3D NULL) { + FreePool (Version); + } + + if (ReleaseDate !=3D NULL) { + FreePool (ReleaseDate); + } + + if (Char16String !=3D NULL) { + FreePool (Char16String); + } + + return Status; +} diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufa= cturerData.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManuf= acturerData.c new file mode 100644 index 000000000000..8752dbd73132 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerD= ata.c @@ -0,0 +1,43 @@ +/*++ + +Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+Copyright (c) 2015, Linaro Limited. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +Module Name: + + MiscSystemManufacturerData.c + +Abstract: + + This file provides Smbios Type1 Data + +Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ + +**/ + +#include "SmbiosMisc.h" + + +// +// Static (possibly build generated) System Manufacturer data. +// +MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE1, MiscSystemManufacturer) =3D { + { // Hdr + EFI_SMBIOS_TYPE_SYSTEM_INFORMATION, // Type, + 0, // Length, + 0 // Handle + }, + 1, // Manufacturer + 2, // ProductName + 3, // Version + 4, // SerialNumber + { // Uuid + 0x00000000, 0x0000, 0x0000, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00= , 0x00} + }, + SystemWakeupTypePowerSwitch, // SystemWakeupType + 5, // SKUNumber, + 6 // Family +}; diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufa= cturerFunction.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemM= anufacturerFunction.c new file mode 100644 index 000000000000..2f96ce90575e --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerF= unction.c @@ -0,0 +1,171 @@ +/*++ + +Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.
+Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+Copyright (c) 2015, Linaro Limited. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +Module Name: + + MiscSystemManufacturerFunction.c + +Abstract: + + This driver parses the mMiscSubclassDataTable structure and reports + any generated data to smbios. + +Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ + +**/ + +#include "SmbiosMisc.h" + +/** + This function makes boot time changes to the contents of the + MiscSystemManufacturer (Type 1). + + @param RecordData Pointer to copy of RecordData from t= he Data Table. + + @retval EFI_SUCCESS All parameters were valid. + @retval EFI_UNSUPPORTED Unexpected RecordType value. + @retval EFI_INVALID_PARAMETER Invalid parameter was found. + +**/ +MISC_SMBIOS_TABLE_FUNCTION(MiscSystemManufacturer) +{ + CHAR8 *OptionalStrStart; + UINTN ManuStrLen; + UINTN VerStrLen; + UINTN PdNameStrLen; + UINTN SerialNumStrLen; + UINTN SKUNumStrLen; + UINTN FamilyStrLen; + EFI_STRING Manufacturer; + EFI_STRING ProductName; + EFI_STRING Version; + EFI_STRING SerialNumber; + EFI_STRING SKUNumber; + EFI_STRING Family; + EFI_STRING_ID TokenToGet; + EFI_SMBIOS_HANDLE SmbiosHandle; + SMBIOS_TABLE_TYPE1 *SmbiosRecord; + SMBIOS_TABLE_TYPE1 *InputData; + EFI_STATUS Status; + EFI_STRING_ID TokenToUpdate; + CHAR16 *Product; + CHAR16 *pVersion; + + // + // First check for invalid parameters. + // + if (RecordData =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + InputData =3D (SMBIOS_TABLE_TYPE1 *)RecordData; + + Product =3D (CHAR16 *) PcdGetPtr (PcdSystemProductName); + if (StrLen (Product) > 0) { + TokenToUpdate =3D STRING_TOKEN (STR_MISC_SYSTEM_PRODUCT_NAME); + HiiSetString (mHiiHandle, TokenToUpdate, Product, NULL); + } + + pVersion =3D (CHAR16 *) PcdGetPtr (PcdSystemVersion); + if (StrLen (pVersion) > 0) { + TokenToUpdate =3D STRING_TOKEN (STR_MISC_SYSTEM_VERSION); + HiiSetString (mHiiHandle, TokenToUpdate, pVersion, NULL); + } + UpdateSmbiosInfo (mHiiHandle, STRING_TOKEN (STR_MISC_SYSTEM_SERIAL_NUMB= ER), SerialNumType01); + UpdateSmbiosInfo (mHiiHandle, STRING_TOKEN (STR_MISC_SYSTEM_MANUFACTURE= R), SystemManufacturerType01); + + TokenToGet =3D STRING_TOKEN (STR_MISC_SYSTEM_MANUFACTURER); + Manufacturer =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NU= LL); + ManuStrLen =3D StrLen (Manufacturer); + + TokenToGet =3D STRING_TOKEN (STR_MISC_SYSTEM_PRODUCT_NAME); + ProductName =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NU= LL); + PdNameStrLen =3D StrLen (ProductName); + + TokenToGet =3D STRING_TOKEN (STR_MISC_SYSTEM_VERSION); + Version =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL= ); + VerStrLen =3D StrLen (Version); + + TokenToGet =3D STRING_TOKEN (STR_MISC_SYSTEM_SERIAL_NUMBER); + SerialNumber =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet,= NULL); + SerialNumStrLen =3D StrLen (SerialNumber); + + TokenToGet =3D STRING_TOKEN (STR_MISC_SYSTEM_SKU_NUMBER); + SKUNumber =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NU= LL); + SKUNumStrLen =3D StrLen (SKUNumber); + + TokenToGet =3D STRING_TOKEN (STR_MISC_SYSTEM_FAMILY); + Family =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NU= LL); + FamilyStrLen =3D StrLen (Family); + + // + // Two zeros following the last string. + // + SmbiosRecord =3D AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE1) + ManuSt= rLen + 1 + + PdNameS= trLen + 1 + + VerStrL= en + 1 + + SerialN= umStrLen + 1 + + SKUNumS= trLen + 1 + + FamilyS= trLen + 1 + 1); + + if (SmbiosRecord =3D=3D NULL) { + Status =3D EFI_OUT_OF_RESOURCES; + goto Exit; + } + + (VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE1)); + + SmbiosRecord->Hdr.Length =3D sizeof (SMBIOS_TABLE_TYPE1); + + SmbiosRecord->Uuid =3D InputData->Uuid; + + OptionalStrStart =3D (CHAR8 *)(SmbiosRecord + 1); + UnicodeStrToAsciiStrS (Manufacturer, OptionalStrStart, ManuStrLen + 1); + UnicodeStrToAsciiStrS (ProductName, OptionalStrStart + ManuStrLen + 1,= PdNameStrLen + 1); + UnicodeStrToAsciiStrS (Version, OptionalStrStart + ManuStrLen + 1 = + PdNameStrLen + 1, VerStrLen + 1); + UnicodeStrToAsciiStrS (SerialNumber, OptionalStrStart + ManuStrLen + 1 = + PdNameStrLen + 1 + VerStrLen + 1, SerialNumStrLen + 1); + UnicodeStrToAsciiStrS (SKUNumber, OptionalStrStart + ManuStrLen + 1 + P= dNameStrLen + 1 + VerStrLen + 1 + SerialNumStrLen + 1, SKUNumStrLen + 1); + UnicodeStrToAsciiStrS (Family, OptionalStrStart + ManuStrLen + 1 + PdNa= meStrLen + 1 + VerStrLen + 1 + SerialNumStrLen + 1 + SKUNumStrLen + 1, Fami= lyStrLen + 1); + + // + // Now we have got the full smbios record, call smbios protocol to add = this record. + // + Status =3D LogSmbiosData ((UINT8*)SmbiosRecord, &SmbiosHandle); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type01 Table Log Failed! %r \= n", __FUNCTION__, __LINE__, Status)); + } + + FreePool (SmbiosRecord); + +Exit: + if (Manufacturer !=3D NULL) { + FreePool (Manufacturer); + } + + if (ProductName !=3D NULL) { + FreePool (ProductName); + } + + if (Version !=3D NULL) { + FreePool (Version); + } + + if (SerialNumber !=3D NULL) { + FreePool (SerialNumber); + } + + if (SKUNumber !=3D NULL) { + FreePool (SKUNumber); + } + + if (Family !=3D NULL) { + FreePool (Family); + } + + return 0; +} diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardMan= ufacturerData.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoar= dManufacturerData.c new file mode 100644 index 000000000000..ed55d87310e2 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufactur= erData.c @@ -0,0 +1,51 @@ +/*++ + +Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+Copyright (c) 2015, Linaro Limited. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +Module Name: + + MiscBaseBoardManufacturerData.c + +Abstract: + + This file provide OEM to define Smbios Type2 Data + +Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +**/ + +#include "SmbiosMisc.h" + +// +// Static (possibly build generated) Chassis Manufacturer data. +// +MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE2, MiscBaseBoardManufacturer) =3D= { + { // Hdr + EFI_SMBIOS_TYPE_BASEBOARD_INFORMATION, // Type, + 0, // Length, + 0 // Handle + }, + 1, // BaseBoardMan= ufacturer + 2, // BaseBoardPro= ductName + 3, // BaseBoardVer= sion + 4, // BaseBoardSer= ialNumber + 5, // BaseBoardAss= etTag + { // FeatureFlag + 1, // Motherboard = :1 + 0, // RequiresDaug= hterCard :1 + 0, // Removable = :1 + 1, // Replaceable = :1 + 0, // HotSwappable= :1 + 0 // Reserved = :3 + }, + 6, // BaseBoardCha= ssisLocation + 0, // ChassisHandl= e; + BaseBoardTypeMotherBoard, // BoardType; + 0, // NumberOfCont= ainedObjectHandles; + { + 0 + } // ContainedObj= ectHandles[1]; +}; diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardMan= ufacturerFunction.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBase= BoardManufacturerFunction.c new file mode 100644 index 000000000000..0528651068c7 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufactur= erFunction.c @@ -0,0 +1,184 @@ +/** @file + + Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.
+ Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+ Copyright (c) 2015, Linaro Limited. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +Module Name: + + MiscBaseBoardManufacturerFunction.c + +Abstract: + + This driver parses the mSmbiosMiscDataTable structure and reports + any generated data using SMBIOS protocol. + +Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +**/ + +#include "SmbiosMisc.h" + + +/** + This function makes basic board manufacturer to the contents of the + Misc Base Board Manufacturer (Type 2). + + @param RecordData Pointer to copy of RecordData from t= he Data Table. + + @retval EFI_SUCCESS All parameters were valid. + @retval EFI_UNSUPPORTED Unexpected RecordType value. + @retval EFI_INVALID_PARAMETER Invalid parameter was found. + +**/ +MISC_SMBIOS_TABLE_FUNCTION(MiscBaseBoardManufacturer) +{ + CHAR8 *OptionalStrStart; + UINTN ManuStrLen; + UINTN ProductNameStrLen; + UINTN VerStrLen; + UINTN SerialNumStrLen; + UINTN AssetTagStrLen; + UINTN ChassisLocaStrLen; + UINTN HandleCount =3D 0; + UINT16 *HandleArray =3D NULL; + CHAR16 *BaseBoardManufacturer; + CHAR16 *BaseBoardProductName; + CHAR16 *Version; + EFI_STRING SerialNumber; + EFI_STRING AssetTag; + EFI_STRING ChassisLocation; + EFI_STRING_ID TokenToGet; + EFI_SMBIOS_HANDLE SmbiosHandle; + SMBIOS_TABLE_TYPE2 *SmbiosRecord; + SMBIOS_TABLE_TYPE2 *InputData =3D NULL; + EFI_STATUS Status; + + EFI_STRING_ID TokenToUpdate; + + // + // First check for invalid parameters. + // + if (RecordData =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + InputData =3D (SMBIOS_TABLE_TYPE2*)RecordData; + + BaseBoardManufacturer =3D (CHAR16 *) PcdGetPtr (PcdBaseBoardManufacture= r); + if (StrLen (BaseBoardManufacturer) > 0) { + TokenToUpdate =3D STRING_TOKEN (STR_MISC_BASE_BOARD_MANUFACTURER); + HiiSetString (mHiiHandle, TokenToUpdate, BaseBoardManufacturer, NULL)= ; + } + + BaseBoardProductName =3D (CHAR16 *) PcdGetPtr (PcdBaseBoardProductName)= ; + if (StrLen (BaseBoardProductName) > 0) { + TokenToUpdate =3D STRING_TOKEN (STR_MISC_BASE_BOARD_PRODUCT_NAME); + HiiSetString (mHiiHandle, TokenToUpdate, BaseBoardProductName, NULL); + } + + Version =3D (CHAR16 *) PcdGetPtr (PcdBaseBoardVersion); + if (StrLen (Version) > 0) { + TokenToUpdate =3D STRING_TOKEN (STR_MISC_BASE_BOARD_VERSION); + HiiSetString (mHiiHandle, TokenToUpdate, Version, NULL); + } + + UpdateSmbiosInfo (mHiiHandle, STRING_TOKEN (STR_MISC_BASE_BOARD_ASSET_T= AG), AssertTagType02); + UpdateSmbiosInfo (mHiiHandle, STRING_TOKEN (STR_MISC_BASE_BOARD_SERIAL_= NUMBER), SrNumType02); + UpdateSmbiosInfo (mHiiHandle, STRING_TOKEN (STR_MISC_BASE_BOARD_MANUFAC= TURER), BoardManufacturerType02); + + TokenToGet =3D STRING_TOKEN (STR_MISC_BASE_BOARD_MANUFACTURER); + BaseBoardManufacturer =3D HiiGetPackageString (&gEfiCallerIdGuid, Token= ToGet, NULL); + ManuStrLen =3D StrLen (BaseBoardManufacturer); + + TokenToGet =3D STRING_TOKEN (STR_MISC_BASE_BOARD_PRODUCT_NAME); + BaseBoardProductName =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenT= oGet, NULL); + ProductNameStrLen =3D StrLen (BaseBoardProductName); + + TokenToGet =3D STRING_TOKEN (STR_MISC_BASE_BOARD_VERSION); + Version =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL); + VerStrLen =3D StrLen (Version); + + TokenToGet =3D STRING_TOKEN (STR_MISC_BASE_BOARD_SERIAL_NUMBER); + SerialNumber =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NU= LL); + SerialNumStrLen =3D StrLen (SerialNumber); + + TokenToGet =3D STRING_TOKEN (STR_MISC_BASE_BOARD_ASSET_TAG); + AssetTag =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL); + AssetTagStrLen =3D StrLen (AssetTag); + + TokenToGet =3D STRING_TOKEN (STR_MISC_BASE_BOARD_CHASSIS_LOCATION); + ChassisLocation =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet,= NULL); + ChassisLocaStrLen =3D StrLen (ChassisLocation); + + // + // Two zeros following the last string. + // + SmbiosRecord =3D AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE2) + ManuSt= rLen + 1 + + Product= NameStrLen + 1 + + VerStrL= en + 1 + + SerialN= umStrLen + 1 + + AssetTa= gStrLen + 1 + + Chassis= LocaStrLen + 1 + 1); + if (SmbiosRecord =3D=3D NULL) { + Status =3D EFI_OUT_OF_RESOURCES; + goto Exit; + } + + (VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE2)); + SmbiosRecord->Hdr.Length =3D sizeof (SMBIOS_TABLE_TYPE2); + + // + // Update Contained objects Handle + // + SmbiosRecord->NumberOfContainedObjectHandles =3D 0; + GetLinkTypeHandle (EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, &HandleArray, &Han= dleCount); + if (HandleCount) { + SmbiosRecord->ChassisHandle =3D HandleArray[0]; + } + + FreePool(HandleArray); + + OptionalStrStart =3D (CHAR8 *)(SmbiosRecord + 1); + UnicodeStrToAsciiStrS (BaseBoardManufacturer, OptionalStrStart, ManuStr= Len + 1); + UnicodeStrToAsciiStrS (BaseBoardProductName, OptionalStrStart + ManuStr= Len + 1, ProductNameStrLen + 1); + UnicodeStrToAsciiStrS (Version, OptionalStrStart + ManuStrLen + 1 + Pro= ductNameStrLen + 1, VerStrLen + 1); + UnicodeStrToAsciiStrS (SerialNumber, OptionalStrStart + ManuStrLen + 1 = + ProductNameStrLen + 1 + VerStrLen + 1, SerialNumStrLen + 1); + UnicodeStrToAsciiStrS (AssetTag, OptionalStrStart + ManuStrLen + 1 + Pr= oductNameStrLen + 1 + VerStrLen + 1 + SerialNumStrLen + 1, AssetTagStrLen += 1); + UnicodeStrToAsciiStrS (ChassisLocation, OptionalStrStart + ManuStrLen += 1 + ProductNameStrLen + 1 + VerStrLen + 1 + SerialNumStrLen + 1 + AssetTag= StrLen + 1, ChassisLocaStrLen + 1); + + Status =3D LogSmbiosData ((UINT8*)SmbiosRecord, &SmbiosHandle); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type02 Table Log Failed! %r \= n", __FUNCTION__, __LINE__, Status)); + } + + FreePool (SmbiosRecord); + +Exit: + if (BaseBoardManufacturer !=3D NULL) { + FreePool (BaseBoardManufacturer); + } + + if (BaseBoardProductName !=3D NULL) { + FreePool (BaseBoardProductName); + } + + if (Version !=3D NULL) { + FreePool (Version); + } + + if (SerialNumber !=3D NULL) { + FreePool (SerialNumber); + } + + if (AssetTag !=3D NULL) { + FreePool (AssetTag); + } + + if (ChassisLocation !=3D NULL) { + FreePool (ChassisLocation); + } + + return 0; +} diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManuf= acturerData.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisMan= ufacturerData.c new file mode 100644 index 000000000000..25d1413ed873 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturer= Data.c @@ -0,0 +1,58 @@ +/*++ + +Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+Copyright (c) 2015, Linaro Limited. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +Module Name: + + MiscChassisManufacturerData.c + +Abstract: + + This file provides Smbios Type3 Data + +Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +**/ + +#include "SmbiosMisc.h" + + +// +// Static (possibly build generated) Chassis Manufacturer data. +// +MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE3, MiscChassisManufacturer) =3D { + { // Hdr + EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE , // Type, + 0, // Length, + 0 // Handle + }, + 1, // Manufactrure= r + MiscChassisTypeMainServerChassis, // Type + 2, // Version + 3, // SerialNumber + 4, // AssetTag + ChassisStateSafe, // BootupState + ChassisStateSafe, // PowerSupplyS= tate + ChassisStateSafe, // ThermalState + ChassisSecurityStatusNone, // SecurityStat= e + { + 0, // OemDefined[0= ] + 0, // OemDefined[1= ] + 0, // OemDefined[2= ] + 0 // OemDefined[3= ] + }, + 2, // Height + 1, // NumberofPowe= rCords + 0, // ContainedEle= mentCount + 0, // ContainedEle= mentRecordLength + { // ContainedEle= ments[0] + { + 0, // ContainedE= lementType + 0, // ContainedE= lementMinimum + 0 // ContainedE= lementMaximum + } + } +}; diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManuf= acturerFunction.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassi= sManufacturerFunction.c new file mode 100644 index 000000000000..84b4aaaeb89d --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturer= Function.c @@ -0,0 +1,182 @@ +/** @file + +Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.
+Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+Copyright (c) 2015, Linaro Limited. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +Module Name: + + MiscChassisManufacturerFunction.c + +Abstract: + + This driver parses the mMiscSubclassDataTable structure and reports + any generated data to smbios. + +Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +**/ + +#include "SmbiosMisc.h" + +UINT8 +GetChassisType ( + VOID + ) +{ + EFI_STATUS Status; + UINT8 ChassisType; + + Status =3D OemGetChassisType (&ChassisType); + if (EFI_ERROR (Status)) { + return 0; + } + + return ChassisType; +} + +/** + This function makes boot time changes to the contents of the + MiscChassisManufacturer (Type 3). + + @param RecordData Pointer to copy of RecordData from t= he Data Table. + + @retval EFI_SUCCESS All parameters were valid. + @retval EFI_UNSUPPORTED Unexpected RecordType value. + @retval EFI_INVALID_PARAMETER Invalid parameter was found. + +**/ +MISC_SMBIOS_TABLE_FUNCTION(MiscChassisManufacturer) +{ + CHAR8 *OptionalStrStart; + UINTN ManuStrLen; + UINTN VerStrLen; + UINTN AssertTagStrLen; + UINTN SerialNumStrLen; + UINTN ChaNumStrLen; + EFI_STRING Manufacturer; + EFI_STRING Version; + EFI_STRING SerialNumber; + EFI_STRING AssertTag; + EFI_STRING ChassisSkuNumber; + EFI_STRING_ID TokenToGet; + EFI_SMBIOS_HANDLE SmbiosHandle; + SMBIOS_TABLE_TYPE3 *SmbiosRecord; + SMBIOS_TABLE_TYPE3 *InputData; + EFI_STATUS Status; + + UINT8 ContainedElementCount; + CONTAINED_ELEMENT ContainedElements =3D {0}; + UINT8 ExtendLength =3D 0; + + UINT8 ChassisType; + + // + // First check for invalid parameters. + // + if (RecordData =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + InputData =3D (SMBIOS_TABLE_TYPE3 *)RecordData; + + UpdateSmbiosInfo (mHiiHandle, STRING_TOKEN (STR_MISC_CHASSIS_ASSET_TAG)= , AssetTagType03); + UpdateSmbiosInfo (mHiiHandle, STRING_TOKEN (STR_MISC_CHASSIS_SERIAL_NUM= BER), SrNumType03); + UpdateSmbiosInfo (mHiiHandle, STRING_TOKEN (STR_MISC_CHASSIS_VERSION), = VersionType03); + UpdateSmbiosInfo (mHiiHandle, STRING_TOKEN (STR_MISC_CHASSIS_MANUFACTUR= ER), ManufacturerType03); + + TokenToGet =3D STRING_TOKEN (STR_MISC_CHASSIS_MANUFACTURER); + Manufacturer =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NU= LL); + ManuStrLen =3D StrLen (Manufacturer); + + TokenToGet =3D STRING_TOKEN (STR_MISC_CHASSIS_VERSION); + Version =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL); + VerStrLen =3D StrLen (Version); + + TokenToGet =3D STRING_TOKEN (STR_MISC_CHASSIS_SERIAL_NUMBER); + SerialNumber =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NU= LL); + SerialNumStrLen =3D StrLen (SerialNumber); + + TokenToGet =3D STRING_TOKEN (STR_MISC_CHASSIS_ASSET_TAG); + AssertTag =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL)= ; + AssertTagStrLen =3D StrLen (AssertTag); + + TokenToGet =3D STRING_TOKEN (STR_MISC_CHASSIS_SKU_NUMBER); + ChassisSkuNumber =3D HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet= , NULL); + ChaNumStrLen =3D StrLen (ChassisSkuNumber); + + ContainedElementCount =3D InputData->ContainedElementCount; + + if (ContainedElementCount > 1) { + ExtendLength =3D (ContainedElementCount - 1) * sizeof (CONTAINED_ELEM= ENT); + } + + // + // Two zeros following the last string. + // + SmbiosRecord =3D AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE3) + Extend= Length + 1 + + ManuStr= Len + 1 + + VerStrL= en + 1 + + SerialN= umStrLen + 1 + + AssertT= agStrLen + 1 + + ChaNumS= trLen + 1 + 1); + if (SmbiosRecord =3D=3D NULL) { + Status =3D EFI_OUT_OF_RESOURCES; + goto Exit; + } + + (VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE3)); + + SmbiosRecord->Hdr.Length =3D sizeof (SMBIOS_TABLE_TYPE3) + ExtendLength= + 1; + + ChassisType =3D GetChassisType (); + if (ChassisType !=3D 0) { + SmbiosRecord->Type =3D ChassisType; + } + + //ContainedElements + (VOID)CopyMem (SmbiosRecord + 1, &ContainedElements, ExtendLength); + + //ChassisSkuNumber + *((UINT8 *)SmbiosRecord + sizeof (SMBIOS_TABLE_TYPE3) + ExtendLength) = =3D 5; + + OptionalStrStart =3D (CHAR8 *)((UINT8 *)SmbiosRecord + sizeof (SMBIOS_T= ABLE_TYPE3) + ExtendLength + 1); + UnicodeStrToAsciiStrS (Manufacturer, OptionalStrStart, ManuStrLen += 1); + UnicodeStrToAsciiStrS (Version, OptionalStrStart + ManuStrLen + 1, VerS= trLen + 1); + UnicodeStrToAsciiStrS (SerialNumber, OptionalStrStart + ManuStrLen + 1 = + VerStrLen + 1, SerialNumStrLen + 1); + UnicodeStrToAsciiStrS (AssertTag, OptionalStrStart + ManuStrLen + 1 + V= erStrLen + 1 + SerialNumStrLen + 1, AssertTagStrLen + 1); + UnicodeStrToAsciiStrS (ChassisSkuNumber, OptionalStrStart + ManuStrLen = + 1 + VerStrLen + 1 + SerialNumStrLen +1 + AssertTagStrLen + 1, ChaNumStrLe= n + 1); + // + // Now we have got the full smbios record, call smbios protocol to add = this record. + // + Status =3D LogSmbiosData ((UINT8*)SmbiosRecord, &SmbiosHandle); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type03 Table Log Failed! %r \= n", __FUNCTION__, __LINE__, Status)); + } + + FreePool (SmbiosRecord); + +Exit: + if (Manufacturer !=3D NULL) { + FreePool (Manufacturer); + } + + if (Version !=3D NULL) { + FreePool (Version); + } + + if (SerialNumber !=3D NULL) { + FreePool (SerialNumber); + } + + if (AssertTag !=3D NULL) { + FreePool (AssertTag); + } + + if (ChassisSkuNumber !=3D NULL) { + FreePool (ChassisSkuNumber); + } + + return 0; +} diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInst= allableLanguagesData.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscN= umberOfInstallableLanguagesData.c new file mode 100644 index 000000000000..fa4c574a82c5 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallable= LanguagesData.c @@ -0,0 +1,39 @@ +/**@file + +Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+Copyright (c) 2015, Linaro Limited. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +Module Name: + + MiscNumberOfInstallableLanguagesData.c + +Abstract: + + This file provides Smbios Type13 Data + +Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +**/ + +#include "SmbiosMisc.h" + +// +// Static (possibly build generated) Bios Vendor data. +// + +MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE13, MiscNumberOfInstallableLangua= ges) =3D +{ + { // Hdr + EFI_SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION, // Type, + 0, // Length, + 0 // Handle + }, + 0, // InstallableLan= guages + 0, // Flags + { + 0 // Reserved[15] + }, + 1 // CurrentLanguag= e +}; diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInst= allableLanguagesFunction.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/M= iscNumberOfInstallableLanguagesFunction.c new file mode 100644 index 000000000000..dc360aa74cea --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallable= LanguagesFunction.c @@ -0,0 +1,154 @@ +/** @file + +Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.
+Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+Copyright (c) 2015, Linaro Limited. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +**/ + +#include "SmbiosMisc.h" + +/** + Get next language from language code list (with separator ';'). + + @param LangCode Input: point to first language in the list. On + Otput: point to next language in the list, or + NULL if no more language in the list. + @param Lang The first language in the list. + +**/ +VOID +EFIAPI +GetNextLanguage ( + IN OUT CHAR8 **LangCode, + OUT CHAR8 *Lang + ) +{ + UINTN Index; + CHAR8 *StringPtr; + + if (LangCode =3D=3D NULL || *LangCode =3D=3D NULL || Lang =3D=3D NULL) = { + return; + } + + Index =3D 0; + StringPtr =3D *LangCode; + while (StringPtr[Index] !=3D 0 && StringPtr[Index] !=3D ';') { + Index++; + } + + (VOID)CopyMem (Lang, StringPtr, Index); + Lang[Index] =3D 0; + + if (StringPtr[Index] =3D=3D ';') { + Index++; + } + *LangCode =3D StringPtr + Index; +} + +/** + This function returns the number of supported languages on HiiHandle. + + @param HiiHandle The HII package list handle. + + @retval The number of supported languages. + +**/ +UINT16 +EFIAPI +GetSupportedLanguageNumber ( + IN EFI_HII_HANDLE HiiHandle + ) +{ + CHAR8 *Lang; + CHAR8 *Languages; + CHAR8 *LanguageString; + UINT16 LangNumber; + + Languages =3D HiiGetSupportedLanguages (HiiHandle); + if (Languages =3D=3D NULL) { + return 0; + } + + LangNumber =3D 0; + Lang =3D AllocatePool (AsciiStrSize (Languages)); + if (Lang !=3D NULL) { + LanguageString =3D Languages; + while (*LanguageString !=3D 0) { + GetNextLanguage (&LanguageString, Lang); + LangNumber++; + } + FreePool (Lang); + } + FreePool (Languages); + return LangNumber; +} + + +/** + This function makes boot time changes to the contents of the + MiscNumberOfInstallableLanguages (Type 13). + + @param RecordData Pointer to copy of RecordData from t= he Data Table. + + @retval EFI_SUCCESS All parameters were valid. + @retval EFI_UNSUPPORTED Unexpected RecordType value. + @retval EFI_INVALID_PARAMETER Invalid parameter was found. + +**/ +MISC_SMBIOS_TABLE_FUNCTION(MiscNumberOfInstallableLanguages) +{ + UINTN LangStrLen; + CHAR8 CurrentLang[SMBIOS_STRING_MAX= _LENGTH + 1]; + CHAR8 *OptionalStrStart; + EFI_STATUS Status; + EFI_SMBIOS_HANDLE SmbiosHandle; + SMBIOS_TABLE_TYPE13 *SmbiosRecord; + SMBIOS_TABLE_TYPE13 *InputData =3D NULL;; + + // + // First check for invalid parameters. + // + if (RecordData =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + InputData =3D (SMBIOS_TABLE_TYPE13 *)RecordData; + + InputData->InstallableLanguages =3D GetSupportedLanguageNumber (mHiiHan= dle); + + // + // Try to check if current langcode matches with the langcodes in insta= lled languages + // + ZeroMem (CurrentLang, SMBIOS_STRING_MAX_LENGTH - 1); + (VOID)AsciiStrCpyS (CurrentLang, SMBIOS_STRING_MAX_LENGTH - 1, "en|US|i= so8859-1"); + LangStrLen =3D AsciiStrLen (CurrentLang); + + // + // Two zeros following the last string. + // + SmbiosRecord =3D AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE13) + LangS= trLen + 1 + 1); + if (SmbiosRecord =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + + (VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE13)); + + SmbiosRecord->Hdr.Length =3D sizeof (SMBIOS_TABLE_TYPE13); + + OptionalStrStart =3D (CHAR8 *)(SmbiosRecord + 1); + (VOID)AsciiStrCpyS (OptionalStrStart, SMBIOS_STRING_MAX_LENGTH - 1, Cur= rentLang); + // + // Now we have got the full smbios record, call smbios protocol to add = this record. + // + Status =3D LogSmbiosData ((UINT8*)SmbiosRecord, &SmbiosHandle); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type13 Table Log Failed! %r \= n", __FUNCTION__, __LINE__, Status)); + } + + FreePool (SmbiosRecord); + return Status; +} diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformat= ionData.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformatio= nData.c new file mode 100644 index 000000000000..c00225a54005 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationData= .c @@ -0,0 +1,41 @@ +/**@file + +Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+Copyright (c) 2015, Linaro Limited. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +Module Name: + + MiscBootInformationData.c + +Abstract: + + This driver parses the mMiscSubclassDataTable structure and reports + any generated data to the DataHub. + +Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +**/ + +#include "SmbiosMisc.h" + +// +// Static (possibly build generated) Bios Vendor data. +// +MISC_SMBIOS_TABLE_DATA(SMBIOS_TABLE_TYPE32, MiscBootInformation) =3D { + { // Hdr + EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, // Type, + 0, // Length, + 0 // Handle + }, + { // Reserved[6] + 0, + 0, + 0, + 0, + 0, + 0 + }, + BootInformationStatusNoError // BootInformatio= nStatus +}; diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformat= ionFunction.c b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInform= ationFunction.c new file mode 100644 index 000000000000..25da6de1bfa6 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationFunc= tion.c @@ -0,0 +1,66 @@ +/** @file + boot information boot time changes. + SMBIOS type 32. + +Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.
+Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+Copyright (c) 2015, Linaro Limited. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +**/ + +#include "SmbiosMisc.h" + +/** + This function makes boot time changes to the contents of the + MiscBootInformation (Type 32). + + @param RecordData Pointer to copy of RecordData from t= he Data Table. + + @retval EFI_SUCCESS All parameters were valid. + @retval EFI_UNSUPPORTED Unexpected RecordType value. + @retval EFI_INVALID_PARAMETER Invalid parameter was found. + +**/ + +MISC_SMBIOS_TABLE_FUNCTION(MiscBootInformation) +{ + EFI_STATUS Status; + EFI_SMBIOS_HANDLE SmbiosHandle; + SMBIOS_TABLE_TYPE32 *SmbiosRecord; + SMBIOS_TABLE_TYPE32 *InputData; + + // + // First check for invalid parameters. + // + if (RecordData =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + InputData =3D (SMBIOS_TABLE_TYPE32 *)RecordData; + + // + // Two zeros following the last string. + // + SmbiosRecord =3D AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE32) + 1 + 1= ); + if (SmbiosRecord =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + + (VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE32)); + + SmbiosRecord->Hdr.Length =3D sizeof (SMBIOS_TABLE_TYPE32); + + // + // Now we have got the full smbios record, call smbios protocol to add = this record. + // + Status =3D LogSmbiosData ((UINT8*)SmbiosRecord, &SmbiosHandle); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type32 Table Log Failed! %r \= n", __FUNCTION__, __LINE__, Status)); + } + + FreePool (SmbiosRecord); + return Status; +} diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Libra= ry/ArmLib/AArch64/AArch64Support.S index 199374ff59e3..874bc2866ac3 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S @@ -424,6 +424,9 @@ ASM_FUNC(ArmCallWFI) wfi ret =20 +ASM_FUNC(ArmReadIdMmfr2) + mrs x0, ID_AA64MMFR2_EL1 // read EL1 MMFR2 + ret =20 ASM_FUNC(ArmReadMpidr) mrs x0, mpidr_el1 // read EL1 MPIDR diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S b/ArmPkg/Libr= ary/ArmLib/AArch64/ArmLibSupportV8.S index 0e8d21e2264f..0ae75e4cb9f9 100644 --- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S +++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S @@ -84,7 +84,7 @@ ASM_FUNC(ArmDisableAllExceptions) ret =20 =20 -// UINT32 +// UINTN // ReadCCSIDR ( // IN UINT32 CSSELR // ) [SAMI] This could be a separate patch. [/SAMI] diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S b/ArmPkg/Library/= ArmLib/Arm/ArmLibSupportV7.S index 01c91b10fcb7..39fdb0155065 100644 --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S @@ -60,6 +60,10 @@ ASM_FUNC(ArmDisableInterrupts) isb bx LR =20 +ASM_FUNC(ArmReadIdMmfr4): + mrc p15,0,r0,c0,c2,6 @ Read ID_MMFR4 Register + bx lr + [SAMI] This can be a separate patch along with ArmPkg/Library/ArmLib/Arm/A= rmLibSupportV7.asm e.g. Add helper to read MMFR4 [/SAMI] // UINT32 // ReadCCSIDR ( // IN UINT32 CSSELR [SAMI] Is it possible to find and replace the declaration/comments for Rea= dCCSIDR to reflect the change from UINT32->UINTN, please? [/SAMI] diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm b/ArmPkg/Librar= y/ArmLib/Arm/ArmLibSupportV7.asm index 26ffa331b929..d1bbb0a0fc98 100644 --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm @@ -64,7 +64,11 @@ isb bx LR =20 -// UINT32 + RVCT_ASM_EXPORT ArmReadIdMmfr4 + mrc p15,0,r0,c0,c2,6 ; Read ID_MMFR2 Register [SAMI] The comment should be ID_MMFR4 [/SAMI] + bx [SAMI] This should be 'bx LR'. [/SAMI] + +// UINTN // ReadCCSIDR ( // IN UINT32 CSSELR // ) diff --git a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClas= sStrings.uni b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubCla= ssStrings.uni new file mode 100644 index 000000000000..0f55beb95276 --- /dev/null +++ b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassString= s.uni @@ -0,0 +1,23 @@ +???///// @file +// +// Copyright (c) 2015, Hisilicon Limited. All rights reserved. +// Copyright (c) 2015, Linaro Limited. All rights reserved. +// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +///// + +/=3D# + +#langdef en-US "English" + +// +// Processor Information +// +#string STR_PROCESSOR_SOCKET_DESIGNATION #language en-US "Not Specifi= ed" +#string STR_PROCESSOR_MANUFACTURE #language en-US "Not Specifi= ed" +#string STR_PROCESSOR_VERSION #language en-US "Not Specifi= ed" +#string STR_PROCESSOR_SERIAL_NUMBER #language en-US "Not Specifi= ed" +#string STR_PROCESSOR_ASSET_TAG #language en-US "Not Specifi= ed" +#string STR_PROCESSOR_PART_NUMBER #language en-US "Not Specifi= ed" +#string STR_PROCESSOR_UNKNOWN #language en-US "Unknown" diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscLibString.uni= b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscLibString.uni new file mode 100644 index 000000000000..7a82e520904e --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscLibString.uni @@ -0,0 +1,21 @@ +???// *++ +// +// Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+// Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+// Copyright (c) 2015, Linaro Limited. All rights reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +// --*/ + + +/=3D# + +#langdef en-US "English" + +#include "./Type00/MiscBiosVendor.uni" +#include "./Type01/MiscSystemManufacturer.uni" +#include "./Type02/MiscBaseBoardManufacturer.uni" +#include "./Type03/MiscChassisManufacturer.uni" +#include "./Type13/MiscNumberOfInstallableLanguages.uni" diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendor.u= ni b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendor.uni new file mode 100644 index 000000000000..cf14e477d260 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendor.uni @@ -0,0 +1,18 @@ +???// *++ +// +// Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+// Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+// Copyright (c) 2015, Linaro Limited. All rights reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +// --*/ + +/=3D# + +#string STR_MISC_BIOS_VENDOR #language en-US "Not Specified" +#string STR_MISC_BIOS_VERSION #language en-US "Not Specified" +#string STR_MISC_BIOS_RELEASE_DATE #language en-US "Not Specified" +#string STR_MISC_BIOS_VENDOR #language en-US "Not Specified" +#string STR_MISC_BIOS_RELEASE_DATE #language en-US "01/01/2020" diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufa= cturer.uni b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufac= turer.uni new file mode 100644 index 000000000000..417a5986c79e --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturer.= uni @@ -0,0 +1,21 @@ +???// *++ +// +// Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+// Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+// Copyright (c) 2015, Linaro Limited. All rights reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +// --*/ + +/=3D# + +#string STR_MISC_SYSTEM_MANUFACTURER #language en-US "Not Specified" +#string STR_MISC_SYSTEM_PRODUCT_NAME #language en-US "Not Specified" +#string STR_MISC_SYSTEM_PRODUCT_NAME #language en-US "Not Specified" +#string STR_MISC_SYSTEM_VERSION #language en-US "Not Specified" +#string STR_MISC_SYSTEM_VERSION #language en-US "Not Specified" +#string STR_MISC_SYSTEM_SERIAL_NUMBER #language en-US "Not Specified" +#string STR_MISC_SYSTEM_SKU_NUMBER #language en-US "Not Specified" +#string STR_MISC_SYSTEM_FAMILY #language en-US "Not Specified" diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardMan= ufacturer.uni b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardM= anufacturer.uni new file mode 100644 index 000000000000..96398d837752 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufactur= er.uni @@ -0,0 +1,21 @@ +???// *++ +// +// Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+// Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+// Copyright (c) 2015, Linaro Limited. All rights reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +// --*/ + +/=3D# + +#string STR_MISC_BASE_BOARD_MANUFACTURER #language en-US "Not Specif= ied" +#string STR_MISC_BASE_BOARD_PRODUCT_NAME #language en-US "Not Specif= ied" +#string STR_MISC_BASE_BOARD_PRODUCT_NAME #language en-US "Not Specif= ied" +#string STR_MISC_BASE_BOARD_VERSION #language en-US "Not Specif= ied" +#string STR_MISC_BASE_BOARD_VERSION #language en-US "Not Specif= ied" +#string STR_MISC_BASE_BOARD_SERIAL_NUMBER #language en-US "Not Specif= ied" +#string STR_MISC_BASE_BOARD_ASSET_TAG #language en-US "Not Specif= ied" +#string STR_MISC_BASE_BOARD_CHASSIS_LOCATION #language en-US "Not Specif= ied" diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManuf= acturer.uni b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManuf= acturer.uni new file mode 100644 index 000000000000..a2b9500f94c5 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturer= .uni @@ -0,0 +1,18 @@ +???// *++ +// +// Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+// Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+// Copyright (c) 2015, Linaro Limited. All rights reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +// --*/ + +/=3D# + +#string STR_MISC_CHASSIS_MANUFACTURER #language en-US "Not Specified" +#string STR_MISC_CHASSIS_VERSION #language en-US "Not Specified" +#string STR_MISC_CHASSIS_SERIAL_NUMBER #language en-US "Not Specified" +#string STR_MISC_CHASSIS_ASSET_TAG #language en-US "Not Specified" +#string STR_MISC_CHASSIS_SKU_NUMBER #language en-US "Not Specified" diff --git a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInst= allableLanguages.uni b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNum= berOfInstallableLanguages.uni new file mode 100644 index 000000000000..559003369f21 --- /dev/null +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallable= Languages.uni @@ -0,0 +1,43 @@ +???// *++ +// +// Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+// Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+// Copyright (c) 2015, Linaro Limited. All rights reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// Based on files under Nt32Pkg/MiscSubClassPlatformDxe/ +// --*/ + +/=3D# + +/=3D# +// +// Language String (Long Format) +// +#string STR_MISC_BIOS_LANGUAGES_ENG_LONG #language en-US "en|US|i= so8859-1" +#string STR_MISC_BIOS_LANGUAGES_FRA_LONG #language en-US "fr|CA|i= so8859-1" +#string STR_MISC_BIOS_LANGUAGES_CHN_LONG #language en-US "zh|TW|u= nicode" +#string STR_MISC_BIOS_LANGUAGES_JPN_LONG #language en-US "ja|JP|u= nicode" +#string STR_MISC_BIOS_LANGUAGES_ITA_LONG #language en-US "it|IT|i= so8859-1" +#string STR_MISC_BIOS_LANGUAGES_SPA_LONG #language en-US "es|ES|i= so8859-1" +#string STR_MISC_BIOS_LANGUAGES_GER_LONG #language en-US "de|DE|i= so8859-1" +#string STR_MISC_BIOS_LANGUAGES_POR_LONG #language en-US "pt|PT|i= so8859-1" + + +// +// Language String (Abbreviated Format) +// +#string STR_MISC_BIOS_LANGUAGES_ENG_ABBREVIATE #language en-US "enUS" +#string STR_MISC_BIOS_LANGUAGES_FRA_ABBREVIATE #language en-US "frCA" +#string STR_MISC_BIOS_LANGUAGES_CHN_ABBREVIATE #language en-US "zhTW" +#string STR_MISC_BIOS_LANGUAGES_JPN_ABBREVIATE #language en-US "jaJP" +#string STR_MISC_BIOS_LANGUAGES_ITA_ABBREVIATE #language en-US "itIT" +#string STR_MISC_BIOS_LANGUAGES_SPA_ABBREVIATE #language en-US "esES" +#string STR_MISC_BIOS_LANGUAGES_GER_ABBREVIATE #language en-US "deDE" +#string STR_MISC_BIOS_LANGUAGES_POR_ABBREVIATE #language en-US "ptPT" + +#string STR_MISC_BIOS_LANGUAGES_SIMPLECH_ABBREVIATE #language en-US "zh= CN" +#string STR_MISC_BIOS_LANGUAGES_SIMPLECH_LONG #language en-US "zh= |CN|unicode" + + --=20 2.26.2