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Wed, 25 Nov 2020 14:44:50 +0000 Received: from DB7PR08MB3097.eurprd08.prod.outlook.com ([fe80::315c:f6c3:2600:bd39]) by DB7PR08MB3097.eurprd08.prod.outlook.com ([fe80::315c:f6c3:2600:bd39%6]) with mapi id 15.20.3589.030; Wed, 25 Nov 2020 14:44:49 +0000 From: "Sami Mujawar" To: "devel@edk2.groups.io" , Vijayenthiran Subramaniam , "leif@nuviainc.com" , Ard Biesheuvel CC: Thomas Abraham , Aditya Angadi , nd Subject: Re: [edk2-devel] [PATCH] ArmPlatformPkg: Enable support for flash in 64-bit address space Thread-Topic: [edk2-devel] [PATCH] ArmPlatformPkg: Enable support for flash in 64-bit address space Thread-Index: AQHWwy9F+C71xb1gZEqaZWCUEItCdKnY4TUQ Date: Wed, 25 Nov 2020 14:44:49 +0000 Message-ID: References: <1606310988-10772-1-git-send-email-vijayenthiran.subramaniam@arm.com> In-Reply-To: <1606310988-10772-1-git-send-email-vijayenthiran.subramaniam@arm.com> Accept-Language: en-GB, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ts-tracking-id: 845AEE22A5754A4AAC044CCD9F30955F.0 x-checkrecipientchecked: true Authentication-Results-Original: edk2.groups.io; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Nov 2020 14:44:56.9918 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 69fc522a-96c2-40fd-6918-08d89150adb4 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT059.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR08MB4063 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Vijay, Thank you for this patch. Please see my response inline marked [SAMI]. Regards, Sami Mujawar -----Original Message----- From: devel@edk2.groups.io On Behalf Of Vijayenthir= an Subramaniam via groups.io Sent: 25 November 2020 01:30 PM To: devel@edk2.groups.io; leif@nuviainc.com; Ard Biesheuvel Cc: Thomas Abraham ; Aditya Angadi Subject: [edk2-devel] [PATCH] ArmPlatformPkg: Enable support for flash in = 64-bit address space The existing NOR flash Dxe driver supports NOR flash devices connected in the 32-bit address space. Extend this driver to allow NOR flash devices connected to 64-bit address space to be usable as well. Signed-off-by: Vijayenthiran Subramaniam --- .../Drivers/NorFlashDxe/NorFlashDxe.c | 13 ++++++-- .../Drivers/NorFlashDxe/NorFlashDxe.inf | 3 ++ .../Drivers/NorFlashDxe/NorFlashFvbDxe.c | 31 ++++++++++++++----- 3 files changed, 37 insertions(+), 10 deletions(-) diff --git a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.c b/ArmPlatfor= mPkg/Drivers/NorFlashDxe/NorFlashDxe.c index d9e196cbf1..f3fbbafb7d 100644 --- a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.c +++ b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.c @@ -1298,9 +1298,16 @@ NorFlashInitialise ( =20 for (Index =3D 0; Index < mNorFlashDeviceCount; Index++) { // Check if this NOR Flash device contain the variable storage region - ContainVariableStorage =3D - (NorFlashDevices[Index].RegionBaseAddress <=3D PcdGet32 (PcdFlash= NvStorageVariableBase)) && - (PcdGet32 (PcdFlashNvStorageVariableBase) + PcdGet32 (PcdFlashNvS= torageVariableSize) <=3D NorFlashDevices[Index].RegionBaseAddress + NorFlas= hDevices[Index].Size); + + if (PcdGet64 (PcdFlashNvStorageVariableBase64) !=3D 0) { + ContainVariableStorage =3D + (NorFlashDevices[Index].RegionBaseAddress <=3D PcdGet64 (PcdFlashN= vStorageVariableBase64)) && + (PcdGet64 (PcdFlashNvStorageVariableBase64) + PcdGet32 (PcdFlashNv= StorageVariableSize) <=3D NorFlashDevices[Index].RegionBaseAddress + NorFla= shDevices[Index].Size); + } else { + ContainVariableStorage =3D + (NorFlashDevices[Index].RegionBaseAddress <=3D PcdGet32 (PcdFlashN= vStorageVariableBase)) && + (PcdGet32 (PcdFlashNvStorageVariableBase) + PcdGet32 (PcdFlashNvSt= orageVariableSize) <=3D NorFlashDevices[Index].RegionBaseAddress + NorFlash= Devices[Index].Size); + } [SAMI] Since you are updating the code here, can you limit the maximum lin= e length, please?=20 I prefer 80 chars but coding guidelines allows up to 120 see https://edk2-= docs.gitbook.io/edk-ii-c-coding-standards-specification/3_quick_reference#3= -3-files-general-rules [/SAMI] =20 Status =3D NorFlashCreateInstance ( NorFlashDevices[Index].DeviceBaseAddress, diff --git a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf b/ArmPlatf= ormPkg/Drivers/NorFlashDxe/NorFlashDxe.inf index a647c01687..b2a941d672 100644 --- a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf +++ b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf @@ -54,10 +54,13 @@ gEfiDiskIoProtocolGuid =20 [Pcd.common] + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize =20 diff --git a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashFvbDxe.c b/ArmPlat= formPkg/Drivers/NorFlashDxe/NorFlashFvbDxe.c index 9cdd85096a..ecbe009495 100644 --- a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashFvbDxe.c +++ b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashFvbDxe.c @@ -58,8 +58,17 @@ InitializeFvAndVariableStoreHeaders ( Headers =3D AllocateZeroPool(HeadersLength); =20 // FirmwareVolumeHeader->FvLength is declared to have the Variable area= AND the FTW working area AND the FTW Spare contiguous. - ASSERT(PcdGet32(PcdFlashNvStorageVariableBase) + PcdGet32(PcdFlashNvSto= rageVariableSize) =3D=3D PcdGet32(PcdFlashNvStorageFtwWorkingBase)); - ASSERT(PcdGet32(PcdFlashNvStorageFtwWorkingBase) + PcdGet32(PcdFlashNvS= torageFtwWorkingSize) =3D=3D PcdGet32(PcdFlashNvStorageFtwSpareBase)); + if (PcdGet64 (PcdFlashNvStorageVariableBase64) !=3D 0) { + ASSERT(PcdGet64(PcdFlashNvStorageVariableBase64) + PcdGet32(PcdFlashN= vStorageVariableSize) =3D=3D PcdGet64(PcdFlashNvStorageFtwWorkingBase64)); [SAMI] Please put a space between PcdGetxx and '('. Same applies to ASSERT= () as well. [/SAMI]=20 + } else { + ASSERT(PcdGet32(PcdFlashNvStorageVariableBase) + PcdGet32(PcdFlashNvS= torageVariableSize) =3D=3D PcdGet32(PcdFlashNvStorageFtwWorkingBase)); + } + + if (PcdGet64 (PcdFlashNvStorageFtwWorkingBase64) !=3D 0) { + ASSERT(PcdGet64(PcdFlashNvStorageFtwWorkingBase64) + PcdGet32(PcdFlas= hNvStorageFtwWorkingSize) =3D=3D PcdGet64(PcdFlashNvStorageFtwSpareBase64))= ; + } else { + ASSERT(PcdGet32(PcdFlashNvStorageFtwWorkingBase) + PcdGet32(PcdFlashN= vStorageFtwWorkingSize) =3D=3D PcdGet32(PcdFlashNvStorageFtwSpareBase)); + } // Check if the size of the area is at least one block size ASSERT((PcdGet32(PcdFlashNvStorageVariableSize) > 0) && (PcdGet32(PcdFl= ashNvStorageVariableSize) / Instance->Media.BlockSize > 0)); @@ -67,9 +76,16 @@ InitializeFvAndVariableStoreHeaders ( ASSERT((PcdGet32(PcdFlashNvStorageFtwSpareSize) > 0) && (PcdGet32(PcdFl= ashNvStorageFtwSpareSize) / Instance->Media.BlockSize > 0)); =20 // Ensure the Variable area Base Addresses are aligned on a block size = boundaries - ASSERT(PcdGet32(PcdFlashNvStorageVariableBase) % Instance->Media.BlockS= ize =3D=3D 0); - ASSERT(PcdGet32(PcdFlashNvStorageFtwWorkingBase) % Instance->Media.Bloc= kSize =3D=3D 0); - ASSERT(PcdGet32(PcdFlashNvStorageFtwSpareBase) % Instance->Media.BlockS= ize =3D=3D 0); + if (PcdGet64 (PcdFlashNvStorageVariableBase64) !=3D 0) { + ASSERT(PcdGet64(PcdFlashNvStorageVariableBase64) % Instance->Media.Bl= ockSize =3D=3D 0); + ASSERT(PcdGet64(PcdFlashNvStorageFtwWorkingBase64) % Instance->Media.= BlockSize =3D=3D 0); + ASSERT(PcdGet64(PcdFlashNvStorageFtwSpareBase64) % Instance->Media.Bl= ockSize =3D=3D 0); + } + else { [SAMI] Move else to previous line e.g. '} else {'=20 [/SAMI] + ASSERT(PcdGet32(PcdFlashNvStorageVariableBase) % Instance->Media.Bloc= kSize =3D=3D 0); + ASSERT(PcdGet32(PcdFlashNvStorageFtwWorkingBase) % Instance->Media.Bl= ockSize =3D=3D 0); + ASSERT(PcdGet32(PcdFlashNvStorageFtwSpareBase) % Instance->Media.Bloc= kSize =3D=3D 0); + } [SAMI] This entire code block from line 60 to 90 is asserting when an inv= alid parameter is detected so could ideally be in DEBUG_CODE (). But more importantly, in release builds the asserts would be turned off le= ading to incorrect values being used. I think this code can be improved to= return an error code if a parameter is invalid. This would be useful as so= me of these PCDs are dynamic.=20 [/SAMI] =20 // // EFI_FIRMWARE_VOLUME_HEADER @@ -736,10 +752,11 @@ NorFlashFvbInitialize ( EFI_MEMORY_UC | EFI_MEMORY_RUNTIME); ASSERT_EFI_ERROR (Status); =20 - mFlashNvStorageVariableBase =3D PcdGet32 (PcdFlashNvStorageVariableBase= ); + mFlashNvStorageVariableBase =3D (FixedPcdGet64 (PcdFlashNvStorageVariab= leBase64) !=3D 0) ? + FixedPcdGet64 (PcdFlashNvStorageVariableBase64) : FixedPcdGet32 (PcdF= lashNvStorageVariableBase); =20 // Set the index of the first LBA for the FVB - Instance->StartLba =3D (PcdGet32 (PcdFlashNvStorageVariableBase) - Inst= ance->RegionBaseAddress) / Instance->Media.BlockSize; + Instance->StartLba =3D (mFlashNvStorageVariableBase - Instance->RegionB= aseAddress) / Instance->Media.BlockSize; =20 BootMode =3D GetBootModeHob (); if (BootMode =3D=3D BOOT_WITH_DEFAULT_SETTINGS) { --=20 2.17.1