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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Sep 2020 14:01:48.2092 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 73851ffc-bedd-4aee-466f-08d864803542 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR03FT051.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB8PR08MB4123 Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_DB7PR08MB3260BBD4BA44710B42DA052890320DB7PR08MB3260eurp_" --_000_DB7PR08MB3260BBD4BA44710B42DA052890320DB7PR08MB3260eurp_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Thanks Pete and Andrei. Should we count these as RB or AB for the patch? Reviewed-by: Samer El-Haj-Mahmoud From: devel@edk2.groups.io On Behalf Of Andrei Wark= entin via groups.io Sent: Monday, September 21, 2020 4:01 PM To: Pete Batard ; Jeff Booher-Kaeding ; devel@edk2.groups.io Cc: Ard Biesheuvel ; Leif Lindholm Subject: Re: [edk2-devel] [PATCH v1 1/1] Platform/RaspberryPi/ConfigDxe: F= ix JTAG Pinout for Pi3/4 Hi folks, No objection at all. IIRC the original pin selection was driven by an arti= cle I read about using OpenOCD with Pi 3. A ________________________________ From: Pete Batard > Sent: Tuesday, September 15, 2020 7:26 AM To: Jeff Booher-Kaeding >; devel@edk2.groups.io > Cc: Ard Biesheuvel >= ; Leif Lindholm >; Andrei Warke= ntin > Subject: Re: [PATCH v1 1/1] Platform/RaspberryPi/ConfigDxe: Fix JTAG Pinou= t for Pi3/4 Copying Andrei on this, as the existing JTAG pinout is not technically incorrect, since GPIO pin 4 can be used for TDI in ALT5 mode, and we are using the relevant ALT mode in the existing code. See https://nam04.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fsyspro= gs.com%2FVisualKernel%2Ftutorials%2Fraspberry%2Fjtagsetup%2F&data=3D02%= 7C01%7Cawarkentin%40vmware.com%7C1c1badf5e6f1433b44b508d859728a32%7Cb39138c= a3cee4b4aa4d6cd83d9dd62f0%7C0%7C0%7C637357695767996220&sdata=3DrGIzM4Io= 36gFJrAK%2F4xZs0fm0DpXVvamhOYYXfc09ek%3D&reserved=3D0 As far as I'm concerned, I think it makes sense to use the same ALT mode and have all the JTAG pins grouped, but I'd like to confirm whether we deliberately chose not to use GPIO 26 in order to leave it available for some other purpose, before I approve this patch. If Andrei says he's okay with it, then I see no objection to this change. Regards, /Pete On 2020.09.14 22:32, Jeff Booher-Kaeding wrote: > Updated the pinout to match the Pi4 datasheet, tested with the RPi4, Pi3= Datasheet has same pinout. > > Signed-off-by: Jeff Booher-Kaeding > > > Cc: Ard Biesheuvel > > Cc: Leif Lindholm > > Cc: Pete Batard > > --- > Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platfo= rm/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c > index ac1004fe1836..6e793efb8227 100644 > --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c > +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c > @@ -502,7 +502,7 @@ ApplyVariables ( > * 1 VREF N/A 1 > > * 3 nTRST GPIO22 ALT4 15 > > * 4 GND N/A 9 > > - * 5 TDI GPIO4 ALT5 7 > > + * 5 TDI GPIO26 ALT4 37 > > * 7 TMS GPIO27 ALT4 13 > > * 9 TCK GPIO25 ALT4 22 > > * 11 RTCK GPIO23 ALT4 16 > > @@ -510,14 +510,14 @@ ApplyVariables ( > */ > > if (PcdGet32 (PcdDebugEnableJTAG)) { > > GpioPinFuncSet (22, GPIO_FSEL_ALT4); > > - GpioPinFuncSet (4, GPIO_FSEL_ALT5); > > + GpioPinFuncSet (26, GPIO_FSEL_ALT4); > > GpioPinFuncSet (27, GPIO_FSEL_ALT4); > > GpioPinFuncSet (25, GPIO_FSEL_ALT4); > > GpioPinFuncSet (23, GPIO_FSEL_ALT4); > > GpioPinFuncSet (24, GPIO_FSEL_ALT4); > > } else { > > GpioPinFuncSet (22, GPIO_FSEL_INPUT); > > - GpioPinFuncSet (4, GPIO_FSEL_INPUT); > > + GpioPinFuncSet (26, GPIO_FSEL_INPUT); > > GpioPinFuncSet (27, GPIO_FSEL_INPUT); > > GpioPinFuncSet (25, GPIO_FSEL_INPUT); > > GpioPinFuncSet (23, GPIO_FSEL_INPUT); > IMPORTANT NOTICE: The contents of this email and any attachments are confi= dential and may also be privileged. If you are not the intended recipient, = please notify the sender immediately and do not disclose the contents to an= y other person, use it for any purpose, or store or copy the information in= any medium. Thank you. --_000_DB7PR08MB3260BBD4BA44710B42DA052890320DB7PR08MB3260eurp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Thanks Pete and Andrei. Should we count these as RB= or AB for the patch?

 

Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-= Mahmoud@arm.com>

 

From: devel@edk2.groups.io <devel@edk2.gr= oups.io> On Behalf Of Andrei Warkentin via groups.io
Sent: Monday, September 21, 2020 4:01 PM
To: Pete Batard <pete@akeo.ie>; Jeff Booher-Kaeding <Jeff.= Booher-Kaeding@arm.com>; devel@edk2.groups.io
Cc: Ard Biesheuvel <Ard.Biesheuvel@arm.com>; Leif Lindholm &l= t;leif@nuviainc.com>
Subject: Re: [edk2-devel] [PATCH v1 1/1] Platform/RaspberryPi/Confi= gDxe: Fix JTAG Pinout for Pi3/4

 

Hi folks,

 

No objection at all. IIRC the original pin selection was dri= ven by an article I read about using OpenOCD with Pi 3.

 

A

From: Pete Batard <pe= te@akeo.ie>
Sent: Tuesday, September 15, 2020 7:26 AM
To: Jeff Booher-Kaeding <jeff.booher-kaeding@arm.com>; devel@edk2.groups.io <devel@edk2.groups.io>
Cc: Ard Biesheuvel <ar= d.biesheuvel@arm.com>; Leif Lindholm <leif@nuviainc.com>; Andrei Warkentin <awarkentin@vmware.com>
Subject: Re: [PATCH v1 1/1] Platform/RaspberryPi/ConfigDxe: Fix JTA= G Pinout for Pi3/4

 

Copying Andrei on th= is, as the existing JTAG pinout is not technically
incorrect, since GPIO pin 4 can be used for TDI in ALT5 mode, and we are <= br> using the relevant ALT mode in the existing code. See
https://nam04.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2F= sysprogs.com%2FVisualKernel%2Ftutorials%2Fraspberry%2Fjtagsetup%2F&amp;= data=3D02%7C01%7Cawarkentin%40vmware.com%7C1c1badf5e6f1433b44b508d859728a32= %7Cb39138ca3cee4b4aa4d6cd83d9dd62f0%7C0%7C0%7C637357695767996220&amp;sd= ata=3DrGIzM4Io36gFJrAK%2F4xZs0fm0DpXVvamhOYYXfc09ek%3D&amp;reserved=3D0=

As far as I'm concerned, I think it makes sense to use the same ALT mode <= br> and have all the JTAG pins grouped, but I'd like to confirm whether we deliberately chose not to use GPIO 26 in order to leave it available for <= br> some other purpose, before I approve this patch.

If Andrei says he's okay with it, then I see no objection to this change.<= br>
Regards,

/Pete

On 2020.09.14 22:32, Jeff Booher-Kaeding wrote:
> Updated the pinout to match the Pi4 datasheet, tested with the RPi4, = Pi3 Datasheet has same pinout.
>
> Signed-off-by: Jeff Booher-Kaeding <Jeff.booher-kaeding@arm.com>
>
> Cc: Ard Biesheuvel <ard.= biesheuvel@arm.com>
> Cc: Leif Lindholm <leif@nuvia= inc.com>
> Cc: Pete Batard <pete@akeo.ie&= gt;
> ---
>   Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 6 ++= +---
>   1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Pla= tform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
> index ac1004fe1836..6e793efb8227 100644
> --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
> +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
> @@ -502,7 +502,7 @@ ApplyVariables (
>      * 1      =      VREF        N/A=             &nb= sp;  1
>
>      * 3      =      nTRST       GPIO22&n= bsp;   ALT4    15
>
>      * 4      =      GND        = ; N/A           &nbs= p;   9
>
> -   * 5        &nbs= p;  TDI         GPIO4 &nb= sp;   ALT5    7
>
> +   * 5        &nbs= p;  TDI         GPIO26 &n= bsp;  ALT4    37
>
>      * 7      =      TMS        = ; GPIO27    ALT4    13
>
>      * 9      =      TCK        = ; GPIO25    ALT4    22
>
>      * 11      = ;    RTCK        GPIO23&n= bsp;   ALT4    16
>
> @@ -510,14 +510,14 @@ ApplyVariables (
>      */
>
>     if (PcdGet32 (PcdDebugEnableJTAG)) {
>
>       GpioPinFuncSet (22, GPIO_FSEL_ALT= 4);
>
> -    GpioPinFuncSet (4, GPIO_FSEL_ALT5);
>
> +    GpioPinFuncSet (26, GPIO_FSEL_ALT4);
>
>       GpioPinFuncSet (27, GPIO_FSEL_ALT= 4);
>
>       GpioPinFuncSet (25, GPIO_FSEL_ALT= 4);
>
>       GpioPinFuncSet (23, GPIO_FSEL_ALT= 4);
>
>       GpioPinFuncSet (24, GPIO_FSEL_ALT= 4);
>
>     } else {
>
>       GpioPinFuncSet (22, GPIO_FSEL_INP= UT);
>
> -    GpioPinFuncSet (4, GPIO_FSEL_INPUT);
>
> +    GpioPinFuncSet (26, GPIO_FSEL_INPUT);
>
>       GpioPinFuncSet (27, GPIO_FSEL_INP= UT);
>
>       GpioPinFuncSet (25, GPIO_FSEL_INP= UT);
>
>       GpioPinFuncSet (23, GPIO_FSEL_INP= UT);
>

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