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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Sunny, Thank you for reviewing my code. Here are my remarks. PSB -----Original Message----- From: Sunny Wang =20 Sent: Monday, July 12, 2021 4:08 PM To: Vikas Singh ; devel@edk2.groups.io Cc: Sami Mujawar ; leif@nuviainc.com; Meenakshi Aggar= wal ; Samer El-Haj-Mahmoud ; Varun Sethi ; arokia.samy ; kuldip dwivedi ; Ard Biesheuve= l ; Vikas Singh ; White Weng <= white.weng@nxp.com>; Ran Wang ; Sunny Wang Subject: [EXT] RE: [PATCH V2 3/4] NXP/LS1046aFrwyPkg: Enable ConfigurationM= anager on LS1046AFRWY Caution: EXT Email Hi Vikas, Just have two comments below. Others look good to me. 1. In LS1046aFrwyPkg.dsc, since you already include DynamicTablesPkg/Dynami= cTables.dsc.inc, I think we need to remove DynamicTableFactoryDxe.inf code = block. Could you check this? [[VIKAS]] No, DynamicTableFactoryDxe.inf code block Is required to override= , or I would say to choose what we want for our platform from DynamicTables= Pkg. This block can expose different "inf" files for different platforms as per = the need basis. =20 2. Remove " DEFINE DYNAMIC_ACPI_ENABLE =3D TRUE ". In our offline discussio= n, this would cause some build problems with the current CM implementation = (Multiple NXP platforms share One CM folder). [[VIKAS]] I don't think "DEFINE DYNAMIC_ACPI_ENABLE =3D TRUE" should cause = any problem while building other platforms. In fact this flag is to avoid a= ny build issue with other platforms. CM is common for all layer scape platf= orms but it will be only visible to any platform if and only if "DEFINE DYN= AMIC_ACPI_ENABLE =3D TRUE". Else platform must be building in old native mo= de. Could you share any scenario or something that I have missed out, will = check this implementation and try to rectify. Best Regards, Sunny Wang -----Original Message----- From: Vikas Singh Sent: Friday, June 18, 2021 11:28 PM To: devel@edk2.groups.io Cc: Sami Mujawar ; leif@nuviainc.com; Meenakshi Aggar= wal (meenakshi.aggarwal@nxp.com) ; Samer El-Haj= -Mahmoud ; V Sethi (v.sethi@nxp.com) ; arokia.samy ; kuldip.dwivedi@pures= oftware.com; Ard Biesheuvel ; vikas.singh@nxp.com; = Sunny Wang Subject: [PATCH V2 3/4] NXP/LS1046aFrwyPkg: Enable ConfigurationManager on = LS1046AFRWY This patch enables the use of ConfigurationManager (CM) and its services to= leverage the Dynamic ACPI support for NXP's LS1046aFrwy platform. Signed-off-by: Vikas Singh --- Platform/NXP/LS1046aFrwyPkg/Include/Platform.h | 152 ++++++++++++++++++++ = Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc | 28 ++++ Platform/NXP/LS= 1046aFrwyPkg/LS1046aFrwyPkg.fdf | 13 ++ Silicon/NXP/LS1046A/LS1046A.dsc.inc | 11 ++ 4 files changed, 204 insertions(+) diff --git a/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h b/Platform/NXP/= LS1046aFrwyPkg/Include/Platform.h new file mode 100644 index 0000000000..3c68d65cd3 --- /dev/null +++ b/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h @@ -0,0 +1,152 @@ +/** @file + * Platform headers + * + * Copyright 2021 NXP + * Copyright 2021 Puresoftware Ltd + * + * SPDX-License-Identifier: BSD-2-Clause-Patent + * +**/ + + +#ifndef LS1046AFRWY_PLATFORM_H +#define LS1046AFRWY_PLATFORM_H + +#define EFI_ACPI_ARM_OEM_REVISION 0x00000000 + +// Soc defines +#define PLAT_SOC_NAME "LS1046AFRWY" + +// Gic +#define GIC_VERSION 2 +#define GICD_BASE 0x1410000 +#define GICC_BASE 0x142f000 +#define GICH_BASE 0x1440000 +#define GICV_BASE 0x1460000 + +// UART +#define UART0_BASE 0x21C0500 +#define UART0_IT 86 +#define UART0_LENGTH 0x100 +#define SPCR_FLOW_CONTROL_NONE 0 + +// Timer +#define TIMER_BLOCK_COUNT 1 +#define TIMER_FRAME_COUNT 4 +#define TIMER_WATCHDOG_COUNT 1 +#define TIMER_BASE_ADDRESS 0x23E0000 // a.k.a CNTControlBase +#define TIMER_READ_BASE_ADDRESS 0x23F0000 // a.k.a CNTReadBase +#define TIMER_SEC_IT 29 +#define TIMER_NON_SEC_IT 30 +#define TIMER_VIRT_IT 27 +#define TIMER_HYP_IT 26 +#define TIMER_FRAME0_IT 78 +#define TIMER_FRAME1_IT 79 +#define TIMER_FRAME2_IT 92 + +// Mcfg +#define LS1046A_PCI_SEG0_CONFIG_BASE 0x4000000000 +#define LS1046A_PCI_SEG0 0x0 +#define LS1046A_PCI_SEG_BUSNUM_MIN 0x0 +#define LS1046A_PCI_SEG_BUSNUM_MAX 0xff +#define LS1046A_PCI_SEG1_CONFIG_BASE 0x4800000000 +#define LS1046A_PCI_SEG2_CONFIG_BASE 0x5000000000 +#define LS1046A_PCI_SEG1 0x1 +#define LS1046A_PCI_SEG2 0x2 + +// Platform specific info needed by Configuration Manager + +#define CFG_MGR_TABLE_ID SIGNATURE_64 ('L','S','1','0','4','6',' ','=20 +') + +// Specify the OEM defined tables +#define OEM_ACPI_TABLES 0 + +#define PLAT_PCI_SEG0 LS1046A_PCI_SEG0 +#define PLAT_PCI_SEG1_CONFIG_BASE LS1046A_PCI_SEG1_CONFIG_BASE +#define PLAT_PCI_SEG1 LS1046A_PCI_SEG1 +#define PLAT_PCI_SEG_BUSNUM_MIN LS1046A_PCI_SEG_BUSNUM_MIN +#define PLAT_PCI_SEG_BUSNUM_MAX LS1046A_PCI_SEG_BUSNUM_MAX +#define PLAT_PCI_SEG2_CONFIG_BASE LS1046A_PCI_SEG2_CONFIG_BASE +#define PLAT_PCI_SEG2 LS1046A_PCI_SEG2 + +#define PLAT_GIC_VERSION GIC_VERSION +#define PLAT_GICD_BASE GICD_BASE +#define PLAT_GICI_BASE GICI_BASE +#define PLAT_GICR_BASE GICR_BASE +#define PLAT_GICR_LEN GICR_LEN +#define PLAT_GICC_BASE GICC_BASE +#define PLAT_GICH_BASE GICH_BASE +#define PLAT_GICV_BASE GICV_BASE + +#define PLAT_CPU_COUNT 4 +#define PLAT_GTBLOCK_COUNT 0 +#define PLAT_GTFRAME_COUNT 0 +#define PLAT_PCI_CONFG_COUNT 2 + +#define PLAT_WATCHDOG_COUNT 0 +#define PLAT_GIC_REDISTRIBUTOR_COUNT 0 +#define PLAT_GIC_ITS_COUNT 0 + +/* GIC CPU Interface information + GIC_ENTRY (CPUInterfaceNumber, Mpidr, PmuIrq, VGicIrq,=20 + EnergyEfficiency) + */ +#define PLAT_GIC_CPU_INTERFACE { \ + GICC_ENTRY (0, GET_MPID (0, 0), 138, 0x19, 0), \ + GICC_ENTRY (1, GET_MPID (0, 1), 139, 0x19, 0), \ + GICC_ENTRY (2, GET_MPID (0, 2), 127, 0x19, 0), \ + GICC_ENTRY (3, GET_MPID (0, 3), 129, 0x19, 0), \ +} + +#define PLAT_WATCHDOG_INFO \ + { \ + } \ + +#define PLAT_TIMER_BLOCK_INFO \ + { \ + } \ + +#define PLAT_TIMER_FRAME_INFO \ + { \ + } \ + +#define PLAT_GIC_DISTRIBUTOR_INFO \ + { \ + PLAT_GICD_BASE, /* UINT64 PhysicalBaseAddress */ \ + 0, /* UINT32 SystemVectorBase */ \ + PLAT_GIC_VERSION /* UINT8 GicVersion */ \ + } \ + +#define PLAT_GIC_REDISTRIBUTOR_INFO \ + { \ + } \ + +#define PLAT_GIC_ITS_INFO \ + { \ + } \ + +#define PLAT_MCFG_INFO \ + { \ + { \ + PLAT_PCI_SEG1_CONFIG_BASE, \ + PLAT_PCI_SEG1, \ + PLAT_PCI_SEG_BUSNUM_MIN, \ + PLAT_PCI_SEG_BUSNUM_MAX, \ + }, \ + { \ + PLAT_PCI_SEG2_CONFIG_BASE, \ + PLAT_PCI_SEG2, \ + PLAT_PCI_SEG_BUSNUM_MIN, \ + PLAT_PCI_SEG_BUSNUM_MAX, \ + } \ + } \ + +#define PLAT_SPCR_INFO = \ + { = \ + UART0_BASE, = \ + UART0_IT, = \ + 115200, = \ + 0, = \ + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_16550 = \ + } = \ + +#endif // LS1046AFRWY_PLATFORM_H diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc b/Platform/NXP/= LS1046aFrwyPkg/LS1046aFrwyPkg.dsc index 67cf15cbe4..20111e6037 100755 --- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc +++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc @@ -3,6 +3,7 @@ # LS1046AFRWY Board package. # # Copyright 2019-2020 NXP +# Copyright 2021 Puresoftware Ltd # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,10 +23,18 @@ OUTPUT_DIRECTORY =3D Build/LS1046aFrwyPkg FLASH_DEFINITION =3D Platform/NXP/LS1046aFrwyPkg/LS1046aFr= wyPkg.fdf + # This flag controls the dynamic acpi generation + # + DEFINE DYNAMIC_ACPI_ENABLE =3D TRUE + !include Silicon/NXP/NxpQoriqLs.dsc.inc !include MdePkg/MdeLibs.dsc.inc !include Silicon/NXP/LS1046A/LS1046A.dsc.inc +!if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE + !include DynamicTablesPkg/DynamicTables.dsc.inc +!endif + [LibraryClasses.common] ArmPlatformLib|Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPla= tformLib.inf RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualReal= TimeClockLib.inf @@ -46,4 +55,23 @@ Silicon/NXP/Drivers/UsbHcdInitDxe/UsbHcd.inf + # + # Dynamic Table Factory + !if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE + =20 + DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactoryDxe + .inf { + + =20 + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/AcpiFadtLibArm.i + nf + =20 + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/AcpiGtdtLibArm.i + nf + =20 + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/AcpiMadtLibArm.i + nf + =20 + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMcfgLibArm/AcpiMcfgLibArm.i + nf + =20 + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiSpcrLibArm/AcpiSpcrLibArm.i + nf + } + !endif + + # + # Acpi Support + # + MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + ## diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf b/Platform/NXP/= LS1046aFrwyPkg/LS1046aFrwyPkg.fdf index 34c4e5a025..f3cac033bc 100755 --- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf +++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf @@ -3,6 +3,7 @@ # FLASH layout file for LS1046a board. # # Copyright 2019-2020 NXP +# Copyright 2021 Puresoftware Ltd # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -99,6 +100,18 @@ READ_LOCK_STATUS =3D TRUE INF MdeModulePkg/Universal/Metronome/Metronome.inf INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + # + # Acpi Support + # + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + + !if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE + INF=20 + Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/Configura + tionManagerDxe.inf + !include DynamicTablesPkg/DynamicTables.fdf.inc + !endif + # # Multiple Console IO support # diff --git a/Silicon/NXP/LS1046A/LS1046A.dsc.inc b/Silicon/NXP/LS1046A/LS10= 46A.dsc.inc index 7004533ed5..caebb321d0 100644 --- a/Silicon/NXP/LS1046A/LS1046A.dsc.inc +++ b/Silicon/NXP/LS1046A/LS1046A.dsc.inc @@ -2,6 +2,7 @@ # LS1046A Soc package. # # Copyright 2017-2020 NXP +# Copyright 2021-2021 Puresoftware Ltd # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -48,4 +49,14 @@ [Components.common] MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf +# +# Configuration Manager +!if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE + =20 + Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/Configura + tionManagerDxe.inf { + + *_*_*_PLATFORM_FLAGS =3D=20 + -I$(WORKSPACE)/Platform/NXP/LS1046aFrwyPkg/Include + *_*_*_PLATFORM_FLAGS =3D=20 + -I$(WORKSPACE)/Silicon/NXP/Chassis2/Include + } +!endif + ## -- 2.25.1 IMPORTANT NOTICE: The contents of this email and any attachments are confid= ential and may also be privileged. If you are not the intended recipient, p= lease notify the sender immediately and do not disclose the contents to any= other person, use it for any purpose, or store or copy the information in = any medium. Thank you.