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Great!

It is verified I can boot Linux from a virtio ESP using this patch on QEMU= virt machine.

Thanks,
Daniel
From: devel@edk2.groups.io= <devel@edk2.groups.io> on behalf of gaoliming <gaoliming@byosoft.= com.cn>
Sent: Friday, May 21, 2021 13:14
To: devel@edk2.groups.io <devel@edk2.groups.io>; Schaefer, Da= niel <daniel.schaefer@hpe.com>
Cc: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com&g= t;; 'Michael D Kinney' <michael.d.kinney@intel.com>; 'Zhiguang Liu' &= lt;zhiguang.liu@intel.com>; 'Leif Lindholm' <leif@nuviainc.com> Subject: =BB=D8=B8=B4: =BB=D8=B8=B4: [edk2-devel] [PATCH v1 1/1] Ad= d MemoryFence implementation for RiscV64
 
Daniel:
  Now, it is clear to me. So, I suggest to merge this change when it = is
verified on generic RISC-V QEMU virt machine. Is it OK?

Thanks
Liming
> -----=D3=CA=BC=FE=D4=AD=BC=FE-----
> =B7=A2=BC=FE=C8=CB: devel@edk2.groups.io <devel@edk2.groups.io>= =B4=FA=B1=ED Daniel
> Schaefer
> =B7=A2=CB=CD=CA=B1=BC=E4: 2021=C4=EA5=D4=C218=C8=D5 10:35
> =CA=D5=BC=FE=C8=CB: devel@edk2.groups.io; gaoliming@byosoft.com.cn > =B3=AD=CB=CD: 'Abner Chang' <abner.chang@hpe.com>; 'Michael D K= inney'
> <michael.d.kinney@intel.com>; 'Zhiguang Liu' <zhiguang.liu@i= ntel.com>;
'Leif
> Lindholm' <leif@nuviainc.com>
> =D6=F7=CC=E2: Re: =BB=D8=B8=B4: [edk2-devel] [PATCH v1 1/1] Add Memor= yFence
> implementation for RiscV64
>
> On 5/18/21 9:04 AM, gaoliming wrote:
> > Daniel:
> >  Seemly, this API is missing in BaseLib for RiscV64 arch. H= ow do you
detect
> > this issue?
>
> What do you mean it's missing?
> Yes MemoryFence() for RiscV64 is missing currently, that's why I'm ad= ding
it
> here.
>
> Maybe you mean that it's not currently used? That's also true.
> I'm enabling the generic QEMU virt machine (like OVMF or ArmVirtPkg) = for
> RISC-V.
> At least QemuFwCfgLib and VirtioLib need it.
> That's why I have the need to add this implementation now.
>
> Does that clear it up?
>
> > Thanks
> > Liming
> >> -----=D3=CA=BC=FE=D4=AD=BC=FE-----
> >> =B7=A2=BC=FE=C8=CB: devel@edk2.groups.io <devel@edk2.grou= ps.io> =B4=FA=B1=ED Daniel
> >> Schaefer
> >> =B7=A2=CB=CD=CA=B1=BC=E4: 2021=C4=EA5=D4=C216=C8=D5 2:13
> >> =CA=D5=BC=FE=C8=CB: devel@edk2.groups.io
> >> =B3=AD=CB=CD: Abner Chang <abner.chang@hpe.com>; Micha= el D Kinney
> >> <michael.d.kinney@intel.com>; Liming Gao <gaoliming= @byosoft.com.cn>;
> >> Zhiguang Liu <zhiguang.liu@intel.com>; Leif Lindholm <leif@nuviainc.com>
> >> =D6=F7=CC=E2: [edk2-devel] [PATCH v1 1/1] Add MemoryFence im= plementation for
> >> RiscV64
> >>
> >> Cc: Abner Chang <abner.chang@hpe.com>
> >> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> >> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> >> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> >> Cc: Leif Lindholm <leif@nuviainc.com>
> >> Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com&g= t;
> >> ---
> >>  MdePkg/Library/BaseLib/BaseLib.inf   &n= bsp;       |  1 +
> >>  MdePkg/Library/BaseLib/RiscV64/MemoryFence.S | 33
> >> ++++++++++++++++++++
> >>  2 files changed, 34 insertions(+)
> >>
> >> diff --git a/MdePkg/Library/BaseLib/BaseLib.inf
> >> b/MdePkg/Library/BaseLib/BaseLib.inf
> >> index b76f3af380ea..b7ab5f632366 100644
> >> --- a/MdePkg/Library/BaseLib/BaseLib.inf
> >> +++ b/MdePkg/Library/BaseLib/BaseLib.inf
> >> @@ -399,6 +399,7 @@
> >>    RiscV64/DisableInterrupts.c
> >>
> >>
> >>    RiscV64/EnableInterrupts.c
> >>
> >>
> >>    RiscV64/CpuPause.c
> >>
> >>
> >> +  RiscV64/MemoryFence.S     &= nbsp;       | GCC
> >>
> >>
> >>    RiscV64/RiscVSetJumpLongJump.S  =   | GCC
> >>
> >>
> >>    RiscV64/RiscVCpuBreakpoint.S  &n= bsp;   | GCC
> >>
> >>
> >>    RiscV64/RiscVCpuPause.S   &= nbsp;       | GCC
> >>
> >>
> >> diff --git a/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S > >> b/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S
> >> new file mode 100644
> >> index 000000000000..283df9356a9a
> >> --- /dev/null
> >> +++ b/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S
> >> @@ -0,0 +1,33 @@
> >>
> >
+##-----------------------------------------------------------------------= --
> > -----
> >>
> >>
> >> +#
> >>
> >>
> >> +# MemoryFence() for RiscV64
> >>
> >>
> >> +
> >>
> >>
> >> +# Copyright (c) 2021, Hewlett Packard Enterprise Developmen= t. All
rights
> >> reserved.
> >>
> >>
> >> +#
> >>
> >>
> >> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> >>
> >>
> >> +#
> >>
> >>
> >>
> >
+##-----------------------------------------------------------------------= --
> > -----
> >>
> >>
> >> +
> >>
> >>
> >> +.text
> >>
> >>
> >> +.p2align 2
> >>
> >>
> >> +
> >>
> >>
> >> +ASM_GLOBAL ASM_PFX(MemoryFence)
> >>
> >>
> >> +
> >>
> >>
> >> +
> >>
> >>
> >> +#/**
> >>
> >>
> >> +#  Used to serialize load and store operations.
> >>
> >>
> >> +#
> >>
> >>
> >> +#  All loads and stores that proceed calls to this fun= ction are
> > guaranteed to
> >> be
> >>
> >>
> >> +#  globally visible when this function returns.
> >>
> >>
> >> +#
> >>
> >>
> >> +#**/
> >>
> >>
> >> +#VOID
> >>
> >>
> >> +#EFIAPI
> >>
> >>
> >> +#MemoryFence (
> >>
> >>
> >> +#  VOID
> >>
> >>
> >> +#  );
> >>
> >>
> >> +#
> >>
> >>
> >> +ASM_PFX(MemoryFence):
> >>
> >>
> >> +    // Fence on all memory and I/O
> >>
> >>
> >> +    fence
> >>
> >>
> >> +    ret
> >>
> >>
> >> --
> >> 2.30.1
> >>
> >>
> >>
> >>
> >>
> >
> >
> >
> >
> >
> >
> >
> >
>
>
>
>








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