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boundary="_000_DF4PR8401MB0923CBAEC8E60C402EC5E942E0929DF4PR8401MB0923_" --_000_DF4PR8401MB0923CBAEC8E60C402EC5E942E0929DF4PR8401MB0923_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Daniel Schaefer ________________________________ From: Chang, Abner (HPS SW/FW Technologist) Sent: Tuesday, October 19, 2021 16:09 To: devel@edk2.groups.io Cc: Chang, Abner (HPS SW/FW Technologist) ; Sunil V L = ; Schaefer, Daniel Subject: [edk2-platforms][PATCH 00/30] EDK2 RISC-V port with opensbi v0.9 This is the patch set to incorporate opensbi v0.9 with edk2 RISC-V port. There are many architecture changes to compliant with the RISC-V SBI implementation (opensbi) and also provide the flexibility to OEM platform. Below is the summary of major changes. You can also refer to patch (1/31) to understand the architecture design. - Flexibly support privilege modes for edk2 execution phases using PCD. - M-mode SEC then S-mode all the way to boot OS. - M-mode SEC and PEI, then S-mode for DXE to boot OS. - M-mode firmware all the way to S-mode OS. Default is M-mode SEC then S-mode all the way to boot OS. Still have to implemente priviledge mode switching for PEI to DXE and BDSto Boot OS. - Apply opensbi firmware domain solution to protect firmware regions using FDF/PCD. - Provide Platform SEC PPI library that can be executed in either M-mode or S-mode PEI phases according to OEM platform definition. - Determine boot hart using Device Tree or PCD. This allows OEM to flexibly select the desired HARTs for booting system. Non-boot HARTs can be used for other applications/purposes. - Provide an edk2 library wrapper of opensbi platform functions. This allows OEM to have procedures that hooks before or after the certain opensbi platform functions. - Other patches to adopt opensbi v0.9. Cc: Sunil V L Cc: Daniel Schaefer Signed-off-by: Abner Chang Abner Chang (30): RISC-V/PlatformPkg: Update document RISC-V: Add RISC-V PeiCoreEntryPoint library RISC-V: Create opensbi firmware domains RISC-V: Use RISC-V PeiCoreEntryPoint library Platform/RISC-V: Add library to get PPI descriptor Platform/U540: Provide PlatormSecPpiLib Platform/RISC-V: Use PlatformSecPpiLib Platform/SiFive: CoreInfoHob uses RiscVFirmwareContextLib SiFive/U5SeriesPkg: Add CLINT to Device Tree Platform/RISC-V: Add NULL library instance of RiscVSpecialPlatformLib SiFive/U540: RiscVSpecialPlatformLib instance of U540 Platform/RISC-V: Remove platform dependency from this library Platform/RISC-V: Remove Null instance of OpensbilatformLibNull RiscVPlatformPkg/Sec: Initial hart_index2Id array RiscVPlatformPkg/OpensbiPlatformLib: Remove platform code RiscVPlatformPkg/U540: Only use four harts on U540 U5SeriesPkg/PeiCoreInfoHob: Remove hart count check RiscVPlatformPkg/RiscVSpecialPlatformLib: Rename module name RiscVPlatformPkg/U540: Add SortLib ProcessorPkg/opensbi: Update opensbi library RiscVPlatformPkg/Sec: Check Cold/Warm hart RiscVPlatformPkg/Sec: Add more comments to Secmain.c RiscV/ProcessorPkg: Create read mtime CSR library instances RiscV/ProcessorPkg: Use mtime CSR library Silicon/SiFive: Use mtime CSR library SiFive/SerialPortLib: Remove global variable RISC-V/PlatformPkg: Updates for the latest OpenSBI RiscVPlatformPkg/Sec: Separate EDK2 Opensbi platform hook. RISC-V/PlatformPkg: Determine hart number from DTB Silicon/RISC-V: Add PciCpuIoDxe driver .../RISC-V/PlatformPkg/RiscVPlatformPkg.dec | 52 +- .../RISC-V/ProcessorPkg/RiscVProcessorPkg.dec | 1 + .../RISC-V/PlatformPkg/RiscVPlatformPkg.dsc | 20 +- .../FreedomU500VC707Board/U500.dsc | 1 + .../FreedomU540HiFiveUnleashedBoard/U540.dsc | 11 +- .../RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | 3 + .../U540.fdf.inc | 94 +- .../VarStore.fdf.inc | 8 +- .../Edk2OpensbiPlatformWrapperLib.inf | 44 + .../OpensbiPlatformLib/OpensbiPlatformLib.inf | 11 +- .../OpensbiPlatformLibNull.inf | 38 - .../PeiCoreEntryPoint/PeiCoreEntryPoint.inf | 37 + .../PlatformSecPpiLibNull.inf | 36 + .../RiscVSpecialPlatformLibNull.inf | 36 + .../PlatformPkg/Universal/Sec/SecMain.inf | 15 +- .../RiscVSpecialPlatformLib.inf | 36 + .../PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 3 +- .../PlatformSecPpiLib/PlatformSecPpiLib.inf | 43 + .../Universal/Dxe/TimerDxe/TimerDxe.inf | 1 + .../EmulatedMachineModeTimerLib.inf | 34 + .../MachineModeTimerLib.inf | 38 + .../RiscVTimerLib/BaseRiscVTimerLib.inf | 3 +- .../ProcessorPkg/Universal/CpuDxe/CpuDxe.inf | 1 + .../Universal/PciCpuIo2Dxe/PciCpuIo2Dxe.inf | 47 + .../Library/Edk2OpensbiPlatformWrapperLib.h | 16 + .../Include/Library/PlatformSecPpiLib.h | 24 + .../Include/Library/RiscVSpecialPlatformLib.h | 20 + .../OpensbiPlatformLib/PlatformOverride.h | 30 - .../PlatformPkg/Universal/Sec/SecMain.h | 28 +- .../SiFive/U5SeriesPkg/Include/SifiveU5Uart.h | 1 + .../Include/IndustryStandard/RiscV.h | 5 + .../Include/IndustryStandard/RiscVOpensbi.h | 8 +- .../Include/Library/RiscVCpuLib.h | 3 + .../Edk2OpensbiPlatformWrapperLib.c | 530 +++++ .../Library/OpensbiPlatformLib/Platform.c | 77 +- .../Library/OpensbiPlatformLibNull/Platform.c | 51 - .../PeiCoreEntryPoint/PeiCoreEntryPoint.c | 108 + .../PlatformSecPpiLibNull/PlatformSecPpiLib.c | 28 + .../RiscVSpecialPlatformLib.c | 20 + .../PlatformPkg/Universal/Sec/SecMain.c | 268 +-- .../RiscVSpecialPlatformLib}/SifiveFu540.c | 11 +- .../Library/PeiCoreInfoHobLib/CoreInfoHob.c | 9 +- .../PlatformSecPpiLib/PlatformSecPpiLib.c | 148 ++ .../Library/SerialIoLib/SerialPortLib.c | 58 +- .../Universal/Dxe/TimerDxe/Timer.c | 14 +- .../Library/RiscVTimerLib/RiscVTimerLib.c | 6 +- .../ProcessorPkg/Universal/CpuDxe/CpuDxe.c | 2 +- .../Universal/PciCpuIo2Dxe/PciCpuIo2Dxe.c | 554 +++++ .../Library/PeiCoreInfoHobLib/CoreInfoHob.c | 6 +- Platform/RISC-V/PlatformPkg/Readme.md | 132 +- .../Documents/Media/RiscVEdk2BootProcess.svg | 1928 +++++++++++++++++ .../Documents/Media/RiscVEdk2FwDomain.svg | 1290 +++++++++++ .../PeiCoreEntryPoint/PeiCoreEntryPoint.uni | 14 + .../Universal/Sec/Riscv64/SecEntry.S | 372 ++-- .../DeviceTree/fu540-c000.dtsi | 591 ++--- .../Library/RiscVOpensbiLib/opensbi | 2 +- .../EmulatedMachineModeTimerLib.S | 24 + .../MachineModeTimerLib/MachineModeTimerLib.S | 25 + 58 files changed, 6105 insertions(+), 911 deletions(-) create mode 100644 Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatform= WrapperLib/Edk2OpensbiPlatformWrapperLib.inf delete mode 100644 Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLibN= ull/OpensbiPlatformLibNull.inf create mode 100644 Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/P= eiCoreEntryPoint.inf create mode 100644 Platform/RISC-V/PlatformPkg/Library/PlatformSecPpiLibNu= ll/PlatformSecPpiLibNull.inf create mode 100644 Platform/RISC-V/PlatformPkg/Library/RiscVSpecialPlatfor= mLibNull/RiscVSpecialPlatformLibNull.inf create mode 100644 Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedB= oard/Library/RiscVSpecialPlatformLib/RiscVSpecialPlatformLib.inf create mode 100644 Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/P= latformSecPpiLib.inf create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/MachineModeTimerLib/MachineModeTimerLib.inf create mode 100644 Silicon/RISC-V/ProcessorPkg/Universal/PciCpuIo2Dxe/PciC= puIo2Dxe.inf create mode 100644 Platform/RISC-V/PlatformPkg/Include/Library/Edk2Opensbi= PlatformWrapperLib.h create mode 100644 Platform/RISC-V/PlatformPkg/Include/Library/PlatformSec= PpiLib.h create mode 100644 Platform/RISC-V/PlatformPkg/Include/Library/RiscVSpecia= lPlatformLib.h delete mode 100644 Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/= PlatformOverride.h create mode 100644 Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatform= WrapperLib/Edk2OpensbiPlatformWrapperLib.c delete mode 100644 Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLibN= ull/Platform.c create mode 100644 Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/P= eiCoreEntryPoint.c create mode 100644 Platform/RISC-V/PlatformPkg/Library/PlatformSecPpiLibNu= ll/PlatformSecPpiLib.c create mode 100644 Platform/RISC-V/PlatformPkg/Library/RiscVSpecialPlatfor= mLibNull/RiscVSpecialPlatformLib.c rename Platform/{RISC-V/PlatformPkg/Library/OpensbiPlatformLib =3D> SiFive= /U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/RiscVSpecialPlatformLi= b}/SifiveFu540.c (76%) create mode 100644 Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/P= latformSecPpiLib.c create mode 100644 Silicon/RISC-V/ProcessorPkg/Universal/PciCpuIo2Dxe/PciC= puIo2Dxe.c create mode 100644 Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2Bo= otProcess.svg create mode 100644 Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2Fw= Domain.svg create mode 100644 Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/P= eiCoreEntryPoint.uni create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.S create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/MachineModeTimerLib/MachineModeTimerLib.S -- 2.31.1 --_000_DF4PR8401MB0923CBAEC8E60C402EC5E942E0929DF4PR8401MB0923_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com>
From: Chang, Abner (HPS SW/= FW Technologist) <abner.chang@hpe.com>
Sent: Tuesday, October 19, 2021 16:09
To: devel@edk2.groups.io <devel@edk2.groups.io>
Cc: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>= ;; Sunil V L <sunilvl@ventanamicro.com>; Schaefer, Daniel <daniel.= schaefer@hpe.com>
Subject: [edk2-platforms][PATCH 00/30] EDK2 RISC-V port with opensbi= v0.9
 
This is the patch set to incorporate opensbi v0.9 = with edk2
RISC-V port. There are many architecture changes to compliant
with the RISC-V SBI implementation (opensbi) and also provide the
flexibility to OEM platform.

Below is the summary of major changes. You can also refer to patch (1/31) to understand the architecture design.

- Flexibly support privilege modes for edk2 execution phases using PCD.
  - M-mode SEC then S-mode all the way to boot OS.
  - M-mode SEC and PEI, then S-mode for DXE to boot OS.
  - M-mode firmware all the way to S-mode OS.
  Default is M-mode SEC then S-mode all the way to boot OS.
  Still have to implemente priviledge mode switching for PEI to DXE an= d
  BDSto Boot OS.

- Apply opensbi firmware domain solution to protect firmware regions using<= br>   FDF/PCD.

- Provide Platform SEC PPI library that can be executed in either M-mode or=
  S-mode PEI phases according to OEM platform definition.

- Determine boot hart using Device Tree or PCD. This allows OEM to
  flexibly select the desired HARTs for booting system. Non-boot HARTs=
  can be used for other applications/purposes.

- Provide an edk2 library wrapper of opensbi platform functions. This
  allows OEM to have procedures that hooks before or after the certain=
  opensbi platform functions.

- Other patches to adopt opensbi v0.9.

Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>

Abner Chang (30):
  RISC-V/PlatformPkg: Update document
  RISC-V: Add RISC-V PeiCoreEntryPoint library
  RISC-V: Create opensbi firmware domains
  RISC-V: Use RISC-V PeiCoreEntryPoint library
  Platform/RISC-V: Add library to get PPI descriptor
  Platform/U540: Provide PlatormSecPpiLib
  Platform/RISC-V: Use PlatformSecPpiLib
  Platform/SiFive: CoreInfoHob uses RiscVFirmwareContextLib
  SiFive/U5SeriesPkg: Add CLINT to Device Tree
  Platform/RISC-V: Add NULL library instance of RiscVSpecialPlatformLi= b
  SiFive/U540: RiscVSpecialPlatformLib instance of U540
  Platform/RISC-V: Remove platform dependency from this library
  Platform/RISC-V: Remove Null instance of OpensbilatformLibNull
  RiscVPlatformPkg/Sec: Initial hart_index2Id array
  RiscVPlatformPkg/OpensbiPlatformLib: Remove platform code
  RiscVPlatformPkg/U540: Only use four harts on U540
  U5SeriesPkg/PeiCoreInfoHob: Remove hart count check
  RiscVPlatformPkg/RiscVSpecialPlatformLib: Rename module name
  RiscVPlatformPkg/U540: Add SortLib
  ProcessorPkg/opensbi: Update opensbi library
  RiscVPlatformPkg/Sec: Check Cold/Warm hart
  RiscVPlatformPkg/Sec: Add more comments to Secmain.c
  RiscV/ProcessorPkg: Create read mtime CSR library instances
  RiscV/ProcessorPkg: Use mtime CSR library
  Silicon/SiFive: Use mtime CSR library
  SiFive/SerialPortLib: Remove global variable
  RISC-V/PlatformPkg: Updates for the latest OpenSBI
  RiscVPlatformPkg/Sec: Separate EDK2 Opensbi platform hook.
  RISC-V/PlatformPkg: Determine hart number from DTB
  Silicon/RISC-V: Add PciCpuIoDxe driver

 .../RISC-V/PlatformPkg/RiscVPlatformPkg.dec   |  = 52 +-
 .../RISC-V/ProcessorPkg/RiscVProcessorPkg.dec |    1 +=
 .../RISC-V/PlatformPkg/RiscVPlatformPkg.dsc   |  = 20 +-
 .../FreedomU500VC707Board/U500.dsc      = ;      |    1 +
 .../FreedomU540HiFiveUnleashedBoard/U540.dsc  |   11 += -
 .../RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc |    3 +=
 .../U540.fdf.inc         = ;            &n= bsp;        |   94 +-
 .../VarStore.fdf.inc        &= nbsp;           &nbs= p;     |    8 +-
 .../Edk2OpensbiPlatformWrapperLib.inf     &n= bsp;   |   44 +
 .../OpensbiPlatformLib/OpensbiPlatformLib.inf |   11 +-
 .../OpensbiPlatformLibNull.inf      &nb= sp;         |   38 -
 .../PeiCoreEntryPoint/PeiCoreEntryPoint.inf   |  = 37 +
 .../PlatformSecPpiLibNull.inf      &nbs= p;          |   36 +=
 .../RiscVSpecialPlatformLibNull.inf     &nbs= p;     |   36 +
 .../PlatformPkg/Universal/Sec/SecMain.inf     |&n= bsp;  15 +-
 .../RiscVSpecialPlatformLib.inf      &n= bsp;        |   36 +
 .../PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf   |  =   3 +-
 .../PlatformSecPpiLib/PlatformSecPpiLib.inf   |  = 43 +
 .../Universal/Dxe/TimerDxe/TimerDxe.inf     =   |    1 +
 .../EmulatedMachineModeTimerLib.inf     &nbs= p;     |   34 +
 .../MachineModeTimerLib.inf       =             | &= nbsp; 38 +
 .../RiscVTimerLib/BaseRiscVTimerLib.inf     =   |    3 +-
 .../ProcessorPkg/Universal/CpuDxe/CpuDxe.inf  |   = ; 1 +
 .../Universal/PciCpuIo2Dxe/PciCpuIo2Dxe.inf   |  = 47 +
 .../Library/Edk2OpensbiPlatformWrapperLib.h   |  = 16 +
 .../Include/Library/PlatformSecPpiLib.h     =   |   24 +
 .../Include/Library/RiscVSpecialPlatformLib.h |   20 +
 .../OpensbiPlatformLib/PlatformOverride.h     |&n= bsp;  30 -
 .../PlatformPkg/Universal/Sec/SecMain.h     =   |   28 +-
 .../SiFive/U5SeriesPkg/Include/SifiveU5Uart.h |    1 +=
 .../Include/IndustryStandard/RiscV.h     &nb= sp;    |    5 +
 .../Include/IndustryStandard/RiscVOpensbi.h   |  =   8 +-
 .../Include/Library/RiscVCpuLib.h      =        |    3 +
 .../Edk2OpensbiPlatformWrapperLib.c     &nbs= p;     |  530 +++++
 .../Library/OpensbiPlatformLib/Platform.c     |&n= bsp;  77 +-
 .../Library/OpensbiPlatformLibNull/Platform.c |   51 -
 .../PeiCoreEntryPoint/PeiCoreEntryPoint.c     |&n= bsp; 108 +
 .../PlatformSecPpiLibNull/PlatformSecPpiLib.c |   28 +
 .../RiscVSpecialPlatformLib.c      &nbs= p;          |   20 +=
 .../PlatformPkg/Universal/Sec/SecMain.c     =   |  268 +--
 .../RiscVSpecialPlatformLib}/SifiveFu540.c    | &= nbsp; 11 +-
 .../Library/PeiCoreInfoHobLib/CoreInfoHob.c   |  =   9 +-
 .../PlatformSecPpiLib/PlatformSecPpiLib.c     |&n= bsp; 148 ++
 .../Library/SerialIoLib/SerialPortLib.c     =   |   58 +-
 .../Universal/Dxe/TimerDxe/Timer.c      = ;      |   14 +-
 .../Library/RiscVTimerLib/RiscVTimerLib.c     |&n= bsp;   6 +-
 .../ProcessorPkg/Universal/CpuDxe/CpuDxe.c    | &= nbsp;  2 +-
 .../Universal/PciCpuIo2Dxe/PciCpuIo2Dxe.c     |&n= bsp; 554 +++++
 .../Library/PeiCoreInfoHobLib/CoreInfoHob.c   |  =   6 +-
 Platform/RISC-V/PlatformPkg/Readme.md     &n= bsp;   |  132 +-
 .../Documents/Media/RiscVEdk2BootProcess.svg  | 1928 +++++++++++= ++++++
 .../Documents/Media/RiscVEdk2FwDomain.svg     | 1= 290 +++++++++++
 .../PeiCoreEntryPoint/PeiCoreEntryPoint.uni   |  = 14 +
 .../Universal/Sec/Riscv64/SecEntry.S     &nb= sp;    |  372 ++--
 .../DeviceTree/fu540-c000.dtsi      &nb= sp;         |  591 ++---
 .../Library/RiscVOpensbiLib/opensbi     &nbs= p;     |    2 +-
 .../EmulatedMachineModeTimerLib.S      =        |   24 +
 .../MachineModeTimerLib/MachineModeTimerLib.S |   25 +
 58 files changed, 6105 insertions(+), 911 deletions(-)
 create mode 100644 Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPla= tformWrapperLib/Edk2OpensbiPlatformWrapperLib.inf
 delete mode 100644 Platform/RISC-V/PlatformPkg/Library/OpensbiPlatfor= mLibNull/OpensbiPlatformLibNull.inf
 create mode 100644 Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPo= int/PeiCoreEntryPoint.inf
 create mode 100644 Platform/RISC-V/PlatformPkg/Library/PlatformSecPpi= LibNull/PlatformSecPpiLibNull.inf
 create mode 100644 Platform/RISC-V/PlatformPkg/Library/RiscVSpecialPl= atformLibNull/RiscVSpecialPlatformLibNull.inf
 create mode 100644 Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnlea= shedBoard/Library/RiscVSpecialPlatformLib/RiscVSpecialPlatformLib.inf
 create mode 100644 Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpi= Lib/PlatformSecPpiLib.inf
 create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachi= neModeTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf
 create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachi= neModeTimer/MachineModeTimerLib/MachineModeTimerLib.inf
 create mode 100644 Silicon/RISC-V/ProcessorPkg/Universal/PciCpuIo2Dxe= /PciCpuIo2Dxe.inf
 create mode 100644 Platform/RISC-V/PlatformPkg/Include/Library/Edk2Op= ensbiPlatformWrapperLib.h
 create mode 100644 Platform/RISC-V/PlatformPkg/Include/Library/Platfo= rmSecPpiLib.h
 create mode 100644 Platform/RISC-V/PlatformPkg/Include/Library/RiscVS= pecialPlatformLib.h
 delete mode 100644 Platform/RISC-V/PlatformPkg/Library/OpensbiPlatfor= mLib/PlatformOverride.h
 create mode 100644 Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPla= tformWrapperLib/Edk2OpensbiPlatformWrapperLib.c
 delete mode 100644 Platform/RISC-V/PlatformPkg/Library/OpensbiPlatfor= mLibNull/Platform.c
 create mode 100644 Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPo= int/PeiCoreEntryPoint.c
 create mode 100644 Platform/RISC-V/PlatformPkg/Library/PlatformSecPpi= LibNull/PlatformSecPpiLib.c
 create mode 100644 Platform/RISC-V/PlatformPkg/Library/RiscVSpecialPl= atformLibNull/RiscVSpecialPlatformLib.c
 rename Platform/{RISC-V/PlatformPkg/Library/OpensbiPlatformLib =3D>= ; SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/RiscVSpecialPl= atformLib}/SifiveFu540.c (76%)
 create mode 100644 Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpi= Lib/PlatformSecPpiLib.c
 create mode 100644 Silicon/RISC-V/ProcessorPkg/Universal/PciCpuIo2Dxe= /PciCpuIo2Dxe.c
 create mode 100644 Platform/RISC-V/PlatformPkg/Documents/Media/RiscVE= dk2BootProcess.svg
 create mode 100644 Platform/RISC-V/PlatformPkg/Documents/Media/RiscVE= dk2FwDomain.svg
 create mode 100644 Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPo= int/PeiCoreEntryPoint.uni
 create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachi= neModeTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.S
 create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachi= neModeTimer/MachineModeTimerLib/MachineModeTimerLib.S

--
2.31.1

--_000_DF4PR8401MB0923CBAEC8E60C402EC5E942E0929DF4PR8401MB0923_--