Re: [PATCH] IntelSiliconPkg: Fix DEBUG macros having incorrect number of arguments

["Ashraf Ali S" <ashraf.ali.s@intel.com>]

Reviewed-by: Ashraf Ali S <ashraf.ali.s@intel.com >


Regards,
Ashraf Ali S
Intel Technology India Pvt. Ltd. 

-----Original Message-----
From: Singh, DeepakX <deepakx.singh@intel.com> 
Sent: Tuesday, August 23, 2022 3:42 PM
To: devel@edk2.groups.io
Cc: Singh, DeepakX <deepakx.singh@intel.com>; Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Oram, Isaac W <isaac.w.oram@intel.com>; S, Ashraf Ali <ashraf.ali.s@intel.com>; Pir, Ovais F <ovais.f.pir@intel.com>
Subject: [PATCH] IntelSiliconPkg: Fix DEBUG macros having incorrect number of arguments

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4027

Signed-off-by: Deepak Singh <deepakx.singh@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Ovais F Pir <ovais.f.pir@intel.com>
---
 .../IntelPciDeviceSecurityDxe/IntelPciDeviceSecurityDxe.c   | 2 +-
 .../Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c  | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/PcieSecurity/IntelPciDeviceSecurityDxe/IntelPciDeviceSecurityDxe.c b/Silicon/Intel/IntelSiliconPkg/Feature/PcieSecurity/IntelPciDeviceSecurityDxe/IntelPciDeviceSecurityDxe.c
index aa2bf14fa8..7a70dc7aea 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/PcieSecurity/IntelPciDeviceSecurityDxe/IntelPciDeviceSecurityDxe.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/PcieSecurity/IntelPciDeviceSecurityDxe/IntelPciDeviceSecurityDxe.c
@@ -488,7 +488,7 @@ DoMeasurementsFromDigestRegister (
       DEBUG((DEBUG_INFO, "\n"));
     }
 
-    DEBUG((DEBUG_INFO, "ExtendDigestRegister...\n", ExtendDigestRegister));
+    DEBUG((DEBUG_INFO, "ExtendDigestRegister...\n"));
     ExtendDigestRegister (PciIo, DeviceSecurityPolicy, TcgAlgId, DigestSel, Digest, DeviceSecurityState);
   }
 }
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c
index c7a56cf571..ef1737b1b6 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c
@@ -642,7 +642,7 @@ DumpVtdVerRegs (
   IN VTD_VER_REG                *VerReg
   )
 {
-  DEBUG ((DEBUG_INFO, "  VerReg:\n", VerReg->Uint32));
+  DEBUG ((DEBUG_INFO, "   VerReg - 0x%x\n", VerReg->Uint32));
   DEBUG ((DEBUG_INFO, "    Major - 0x%x\n", VerReg->Bits.Major));
   DEBUG ((DEBUG_INFO, "    Minor - 0x%x\n", VerReg->Bits.Minor));
 }
@@ -657,7 +657,7 @@ DumpVtdCapRegs (
   IN VTD_CAP_REG *CapReg
   )
 {
-  DEBUG((DEBUG_INFO, "  CapReg:\n", CapReg->Uint64));
+  DEBUG((DEBUG_INFO, "  CapReg   - 0x%x\n", CapReg->Uint64));
   DEBUG((DEBUG_INFO, "    ND     - 0x%x\n", CapReg->Bits.ND));
   DEBUG((DEBUG_INFO, "    AFL    - 0x%x\n", CapReg->Bits.AFL));
   DEBUG((DEBUG_INFO, "    RWBF   - 0x%x\n", CapReg->Bits.RWBF));
@@ -688,7 +688,7 @@ DumpVtdECapRegs (
   IN VTD_ECAP_REG *ECapReg
   )
 {
-  DEBUG((DEBUG_INFO, "  ECapReg:\n", ECapReg->Uint64));
+  DEBUG((DEBUG_INFO, "  ECapReg  - 0x%x\n", ECapReg->Uint64));
   DEBUG((DEBUG_INFO, "    C      - 0x%x\n", ECapReg->Bits.C));
   DEBUG((DEBUG_INFO, "    QI     - 0x%x\n", ECapReg->Bits.QI));
   DEBUG((DEBUG_INFO, "    DT     - 0x%x\n", ECapReg->Bits.DT));
-- 
2.30.2.windows.1