Re: [edk2-devel] [PATCH] UefiCpuPkg/ResetVector: Option for 1G Page Table Size increase

["Ashraf Ali S" <ashraf.ali.s@intel.com>]

Hi., Ray

Yes, I agree. But if any device which needs to map above 512GB in Pre Memory (Early PreMem). 

if any device mapped any device below 512GB. And if the DRAM has 512GB then it would create a conflict.

So we are not changing the default page table size, keeping 512GB only. So that it will give room to decide the reset vector size based on the platform needs.

Sizes mentioned below:
512GB - 16KB
1TB      - 20KB
2TB      - 28KB

Thanks.,
S, Ashraf Ali

-----Original Message-----
From: Ni, Ray <ray.ni@intel.com> 
Sent: Friday, December 1, 2023 10:58 AM
To: S, Ashraf Ali <ashraf.ali.s@intel.com>; devel@edk2.groups.io
Cc: Kumar, Rahul R <rahul.r.kumar@intel.com>; West, Catharine <catharine.west@intel.com>; V, Sangeetha <sangeetha.v@intel.com>
Subject: RE: [PATCH] UefiCpuPkg/ResetVector: Option for 1G Page Table Size increase

Ashraf,
When we implement the reset vector, we assume that 512GB page table occupies minimal flash size and also sufficient for XIP code.
Any code that wants more page table coverage should create a new page table, either in the temporary ram (when physical mem is not ready) or in physical ram.

Why does this patch increase the default 512 GB coverage?

Thanks,
Ray
> -----Original Message-----
> From: S, Ashraf Ali <ashraf.ali.s@intel.com>
> Sent: Friday, December 1, 2023 1:35 AM
> To: devel@edk2.groups.io
> Cc: S, Ashraf Ali <ashraf.ali.s@intel.com>; Kumar, Rahul R 
> <rahul.r.kumar@intel.com>; Ni, Ray <ray.ni@intel.com>; West, Catharine 
> <catharine.west@intel.com>; V, Sangeetha <sangeetha.v@intel.com>
> Subject: [PATCH] UefiCpuPkg/ResetVector: Option for 1G Page Table Size 
> increase
> 
> Currently 1G Page table is restricted 512GB. this patch can help to 
> increase the page table size based on the input. default will be 512GB 
> build option PAGE_TABLE_1G_SIZE is used to increase the page table 
> size
> 
> Cc: Rahul Kumar <rahul1.kumar@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Catharine West <catharine.west@intel.com>
> Cc: V Sangeetha <sangeetha.v@intel.com>
> Signed-off-by: Ashraf Ali S <ashraf.ali.s@intel.com>
> ---
>  UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt         |  4 ++--
>  UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf           |  2 ++
>  UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm | 13 +++++++++++--
>  3 files changed, 15 insertions(+), 4 deletions(-)
> 
> diff --git a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
> b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
> index 4fcb15c3b1..4d153fc1a7 100644
> --- a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
> +++ b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
> @@ -1,10 +1,10 @@
> 
>  === HOW TO USE VTF0 ===
>  Add this line to your DSC [Components.IA32] or [Components.X64] section:
> -  UefiCpuPkg/ResetVector/Vtf0/ResetVector.inf
> +  UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
> 
>  Add this line to your FDF FV section:
> -  INF  RuleOverride=RESET_VECTOR
> UefiCpuPkg/ResetVector/Vtf0/ResetVector.inf
> +  INF  RuleOverride=RESET_VECTOR UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
> 
>  In your FDF FFS file rules sections add:
>    [Rule.Common.SEC.RESET_VECTOR]
> diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
> b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
> index 6b406163db..96106a4b11 100644
> --- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
> +++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
> @@ -53,5 +53,7 @@
>  #       -DARCH_X64, -DARCH_IA32
>  #   * for using 1G page table:
>  #       -DPAGE_TABLE_1G
> +#       * for incresing the 1G page table size (Size in GBs):
> +#           -DPAGE_TABLE_1G_SIZE=1024
>  #   * for different debug channels:
>  #       -DDEBUG_SERIAL, -DDEBUG_PORT80, or not specify any debug channel
> diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
> b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
> index 7960b141be..b080dc5296 100644
> --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
> +++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm
> @@ -1,7 +1,7 @@
>  
> ;---------------------------------------------------------------------
> ---------
>  ; @file
>  ; Emits Page Tables for 1:1 mapping.
> -; If using 1G page table, map addresses 0 - 0x8000000000 (512GB),
> +; If using 1G page table, map addresses 0 - 0x8000000000 (512GB, Size 
> +can
> be increse via PAGE_TABLE_1G_SIZE),
>  ; else, map addresses 0 - 0x100000000 (4GB)  ;  ; Copyright (c) 2021 
> - 2023, Intel Corporation. All rights reserved.<BR>
> @@ -39,6 +39,15 @@ BITS    64
>  %define PAGE_PDPTE_1GB(x) ((x << 30) + PAGE_BLE_ATTR)  %define 
> PAGE_PDE_2MB(x) ((x << 21) + PAGE_BLE_ATTR)
> 
> +%ifdef PAGE_TABLE_1G_SIZE
> +  %define PAGE_PDPTE_1GB_SIZE PAGE_TABLE_1G_SIZE %else
> +  ;
> +  ; Default 512GB of 1G Page Table
> +  ;
> +  %define PAGE_PDPTE_1GB_SIZE 512
> +%endif
> +
>  ALIGN 16
> 
>  %ifdef PAGE_TABLE_1G
> @@ -47,7 +56,7 @@ Pdp:
>      ; Page-directory pointer table (512 * 1GB entries => 512GB)
>      ;
>      %assign i 0
> -    %rep      512
> +    %rep      PAGE_PDPTE_1GB_SIZE
>          DQ    PAGE_PDPTE_1GB(i)
>          %assign i i+1
>      %endrep
> --
> 2.39.1.windows.1



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