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* [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC file
@ 2023-06-13 12:40 Chang, Hunter
  2023-06-13 13:56 ` Ashraf Ali S
                   ` (3 more replies)
  0 siblings, 4 replies; 6+ messages in thread
From: Chang, Hunter @ 2023-06-13 12:40 UTC (permalink / raw)
  To: devel
  Cc: Hunter Chang, Ray Ni, Rangasai V Chaganty, Isaac Oram,
	Ashraf Ali S, Tina Chen, Arthur Chen

From: Hunter Chang <hunter.chang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4371

Add gEndOfSiInitPpiGuid definition in IntelSiliconPkg.dec
gEndOfSiInitPpiGuid indicates the end of all of the silicon init.
Add it to IntellSiliconPkg for AFP improvement.

Signed-off-by: Hunter Chang <hunter.chang@intel.com>

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Tina Chen <tina.chen@intel.com>
Cc: Arthur Chen <arthur.g.chen@intel.com>
---
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index ec8690a8d6..c540ef40ad 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -113,6 +113,7 @@
   gEdkiiVTdInfoPpiGuid = { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x67, 0xaf, 0x2b, 0x25, 0x68, 0x4a } }
   gEdkiiVTdNullRootEntryTableGuid = { 0x3de0593f, 0x6e3e, 0x4542, { 0xa1, 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } }
   gIntelDieInfoPpiGuid = { 0xF9E45CBF, 0x1E21, 0x434A, { 0x90, 0x88, 0x1D, 0x10, 0x38, 0xF3, 0x68, 0xF2 }}
+  gEndOfSiInitPpiGuid  = { 0xE2E3D5D1, 0x8356, 0x4F96, { 0x9C, 0x9E, 0x2E, 0xC3, 0x48, 0x1D, 0xEA, 0x88 }}
 
 [Protocols]
   ## Protocols that provide services for the Intel(R) PCH SPI Host Controller Compatibility Interface
-- 
2.26.2.windows.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC file
  2023-06-13 12:40 [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC file Chang, Hunter
@ 2023-06-13 13:56 ` Ashraf Ali S
  2023-06-13 14:15 ` Ni, Ray
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 6+ messages in thread
From: Ashraf Ali S @ 2023-06-13 13:56 UTC (permalink / raw)
  To: Chang, Hunter, devel@edk2.groups.io
  Cc: Ni, Ray, Chaganty, Rangasai V, Oram, Isaac W, Chen, Tina,
	Chen, Arthur G

Reviewed-by: Ashraf Ali S <ashraf.ali.s@intel.com>

-----Original Message-----
From: Chang, Hunter <hunter.chang@intel.com> 
Sent: Tuesday, June 13, 2023 6:10 PM
To: devel@edk2.groups.io
Cc: Chang, Hunter <hunter.chang@intel.com>; Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Oram, Isaac W <isaac.w.oram@intel.com>; S, Ashraf Ali <ashraf.ali.s@intel.com>; Chen, Tina <tina.chen@intel.com>; Chen, Arthur G <arthur.g.chen@intel.com>
Subject: [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC file

From: Hunter Chang <hunter.chang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4371

Add gEndOfSiInitPpiGuid definition in IntelSiliconPkg.dec gEndOfSiInitPpiGuid indicates the end of all of the silicon init.
Add it to IntellSiliconPkg for AFP improvement.

Signed-off-by: Hunter Chang <hunter.chang@intel.com>

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Tina Chen <tina.chen@intel.com>
Cc: Arthur Chen <arthur.g.chen@intel.com>
---
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index ec8690a8d6..c540ef40ad 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -113,6 +113,7 @@
   gEdkiiVTdInfoPpiGuid = { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x67, 0xaf, 0x2b, 0x25, 0x68, 0x4a } }   gEdkiiVTdNullRootEntryTableGuid = { 0x3de0593f, 0x6e3e, 0x4542, { 0xa1, 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } }   gIntelDieInfoPpiGuid = { 0xF9E45CBF, 0x1E21, 0x434A, { 0x90, 0x88, 0x1D, 0x10, 0x38, 0xF3, 0x68, 0xF2 }}+  gEndOfSiInitPpiGuid  = { 0xE2E3D5D1, 0x8356, 0x4F96, { 0x9C, 0x9E, 0x2E, 0xC3, 0x48, 0x1D, 0xEA, 0x88 }}  [Protocols]   ## Protocols that provide services for the Intel(R) PCH SPI Host Controller Compatibility Interface-- 
2.26.2.windows.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC file
  2023-06-13 12:40 [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC file Chang, Hunter
  2023-06-13 13:56 ` Ashraf Ali S
@ 2023-06-13 14:15 ` Ni, Ray
  2023-06-14  1:54   ` Chang, Hunter
  2023-06-30 20:51 ` Isaac Oram
       [not found] ` <176D8B046956B609.23465@groups.io>
  3 siblings, 1 reply; 6+ messages in thread
From: Ni, Ray @ 2023-06-13 14:15 UTC (permalink / raw)
  To: Chang, Hunter, devel@edk2.groups.io
  Cc: Chaganty, Rangasai V, Oram, Isaac W, S, Ashraf Ali, Chen, Tina,
	Chen, Arthur G

Is this event signaled regardless of FSP API/Dispatch mode?

> -----Original Message-----
> From: Chang, Hunter <hunter.chang@intel.com>
> Sent: Tuesday, June 13, 2023 8:40 PM
> To: devel@edk2.groups.io
> Cc: Chang, Hunter <hunter.chang@intel.com>; Ni, Ray <ray.ni@intel.com>;
> Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Oram, Isaac W
> <isaac.w.oram@intel.com>; S, Ashraf Ali <ashraf.ali.s@intel.com>; Chen, Tina
> <tina.chen@intel.com>; Chen, Arthur G <arthur.g.chen@intel.com>
> Subject: [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC
> file
> 
> From: Hunter Chang <hunter.chang@intel.com>
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4371
> 
> Add gEndOfSiInitPpiGuid definition in IntelSiliconPkg.dec
> gEndOfSiInitPpiGuid indicates the end of all of the silicon init.
> Add it to IntellSiliconPkg for AFP improvement.
> 
> Signed-off-by: Hunter Chang <hunter.chang@intel.com>
> 
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
> Cc: Isaac Oram <isaac.w.oram@intel.com>
> Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
> Cc: Tina Chen <tina.chen@intel.com>
> Cc: Arthur Chen <arthur.g.chen@intel.com>
> ---
>  Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
> b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
> index ec8690a8d6..c540ef40ad 100644
> --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
> +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
> @@ -113,6 +113,7 @@
>    gEdkiiVTdInfoPpiGuid = { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x67,
> 0xaf, 0x2b, 0x25, 0x68, 0x4a } }
> 
>    gEdkiiVTdNullRootEntryTableGuid = { 0x3de0593f, 0x6e3e, 0x4542, { 0xa1,
> 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } }
> 
>    gIntelDieInfoPpiGuid = { 0xF9E45CBF, 0x1E21, 0x434A, { 0x90, 0x88, 0x1D,
> 0x10, 0x38, 0xF3, 0x68, 0xF2 }}
> 
> +  gEndOfSiInitPpiGuid  = { 0xE2E3D5D1, 0x8356, 0x4F96, { 0x9C, 0x9E, 0x2E,
> 0xC3, 0x48, 0x1D, 0xEA, 0x88 }}
> 
> 
> 
>  [Protocols]
> 
>    ## Protocols that provide services for the Intel(R) PCH SPI Host Controller
> Compatibility Interface
> 
> --
> 2.26.2.windows.1


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC file
  2023-06-13 14:15 ` Ni, Ray
@ 2023-06-14  1:54   ` Chang, Hunter
  0 siblings, 0 replies; 6+ messages in thread
From: Chang, Hunter @ 2023-06-14  1:54 UTC (permalink / raw)
  To: Ni, Ray, devel@edk2.groups.io
  Cc: Chaganty, Rangasai V, Oram, Isaac W, S, Ashraf Ali, Chen, Tina,
	Chen, Arthur G

currently it is signaled in both API/Dispatch mode.

-----Original Message-----
From: Ni, Ray <ray.ni@intel.com> 
Sent: Tuesday, June 13, 2023 10:15 PM
To: Chang, Hunter <hunter.chang@intel.com>; devel@edk2.groups.io
Cc: Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Oram, Isaac W <isaac.w.oram@intel.com>; S, Ashraf Ali <ashraf.ali.s@intel.com>; Chen, Tina <tina.chen@intel.com>; Chen, Arthur G <arthur.g.chen@intel.com>
Subject: RE: [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC file

Is this event signaled regardless of FSP API/Dispatch mode?

> -----Original Message-----
> From: Chang, Hunter <hunter.chang@intel.com>
> Sent: Tuesday, June 13, 2023 8:40 PM
> To: devel@edk2.groups.io
> Cc: Chang, Hunter <hunter.chang@intel.com>; Ni, Ray 
> <ray.ni@intel.com>; Chaganty, Rangasai V 
> <rangasai.v.chaganty@intel.com>; Oram, Isaac W 
> <isaac.w.oram@intel.com>; S, Ashraf Ali <ashraf.ali.s@intel.com>; 
> Chen, Tina <tina.chen@intel.com>; Chen, Arthur G 
> <arthur.g.chen@intel.com>
> Subject: [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid 
> definition in DEC file
> 
> From: Hunter Chang <hunter.chang@intel.com>
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4371
> 
> Add gEndOfSiInitPpiGuid definition in IntelSiliconPkg.dec 
> gEndOfSiInitPpiGuid indicates the end of all of the silicon init.
> Add it to IntellSiliconPkg for AFP improvement.
> 
> Signed-off-by: Hunter Chang <hunter.chang@intel.com>
> 
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
> Cc: Isaac Oram <isaac.w.oram@intel.com>
> Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
> Cc: Tina Chen <tina.chen@intel.com>
> Cc: Arthur Chen <arthur.g.chen@intel.com>
> ---
>  Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
> b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
> index ec8690a8d6..c540ef40ad 100644
> --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
> +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
> @@ -113,6 +113,7 @@
>    gEdkiiVTdInfoPpiGuid = { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 
> 0x67, 0xaf, 0x2b, 0x25, 0x68, 0x4a } }
> 
>    gEdkiiVTdNullRootEntryTableGuid = { 0x3de0593f, 0x6e3e, 0x4542, { 
> 0xa1, 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } }
> 
>    gIntelDieInfoPpiGuid = { 0xF9E45CBF, 0x1E21, 0x434A, { 0x90, 0x88, 
> 0x1D, 0x10, 0x38, 0xF3, 0x68, 0xF2 }}
> 
> +  gEndOfSiInitPpiGuid  = { 0xE2E3D5D1, 0x8356, 0x4F96, { 0x9C, 0x9E, 
> + 0x2E,
> 0xC3, 0x48, 0x1D, 0xEA, 0x88 }}
> 
> 
> 
>  [Protocols]
> 
>    ## Protocols that provide services for the Intel(R) PCH SPI Host 
> Controller Compatibility Interface
> 
> --
> 2.26.2.windows.1


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC file
  2023-06-13 12:40 [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC file Chang, Hunter
  2023-06-13 13:56 ` Ashraf Ali S
  2023-06-13 14:15 ` Ni, Ray
@ 2023-06-30 20:51 ` Isaac Oram
       [not found] ` <176D8B046956B609.23465@groups.io>
  3 siblings, 0 replies; 6+ messages in thread
From: Isaac Oram @ 2023-06-30 20:51 UTC (permalink / raw)
  To: Chang, Hunter, devel@edk2.groups.io
  Cc: Ni, Ray, Chaganty, Rangasai V, S, Ashraf Ali, Chen, Tina,
	Chen, Arthur G

Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

-----Original Message-----
From: Chang, Hunter <hunter.chang@intel.com> 
Sent: Tuesday, June 13, 2023 5:40 AM
To: devel@edk2.groups.io
Cc: Chang, Hunter <hunter.chang@intel.com>; Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Oram, Isaac W <isaac.w.oram@intel.com>; S, Ashraf Ali <ashraf.ali.s@intel.com>; Chen, Tina <tina.chen@intel.com>; Chen, Arthur G <arthur.g.chen@intel.com>
Subject: [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC file

From: Hunter Chang <hunter.chang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4371

Add gEndOfSiInitPpiGuid definition in IntelSiliconPkg.dec gEndOfSiInitPpiGuid indicates the end of all of the silicon init.
Add it to IntellSiliconPkg for AFP improvement.

Signed-off-by: Hunter Chang <hunter.chang@intel.com>

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Tina Chen <tina.chen@intel.com>
Cc: Arthur Chen <arthur.g.chen@intel.com>
---
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index ec8690a8d6..c540ef40ad 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -113,6 +113,7 @@
   gEdkiiVTdInfoPpiGuid = { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x67, 0xaf, 0x2b, 0x25, 0x68, 0x4a } }   gEdkiiVTdNullRootEntryTableGuid = { 0x3de0593f, 0x6e3e, 0x4542, { 0xa1, 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } }   gIntelDieInfoPpiGuid = { 0xF9E45CBF, 0x1E21, 0x434A, { 0x90, 0x88, 0x1D, 0x10, 0x38, 0xF3, 0x68, 0xF2 }}+  gEndOfSiInitPpiGuid  = { 0xE2E3D5D1, 0x8356, 0x4F96, { 0x9C, 0x9E, 0x2E, 0xC3, 0x48, 0x1D, 0xEA, 0x88 }}  [Protocols]   ## Protocols that provide services for the Intel(R) PCH SPI Host Controller Compatibility Interface-- 
2.26.2.windows.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [edk2-devel] [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC file
       [not found] ` <176D8B046956B609.23465@groups.io>
@ 2023-06-30 20:54   ` Isaac Oram
  0 siblings, 0 replies; 6+ messages in thread
From: Isaac Oram @ 2023-06-30 20:54 UTC (permalink / raw)
  To: devel@edk2.groups.io, Oram, Isaac W, Chang, Hunter
  Cc: Ni, Ray, Chaganty, Rangasai V, S, Ashraf Ali, Chen, Tina,
	Chen, Arthur G

Pushed as dd09609ec9..bc10b26189

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Isaac Oram
Sent: Friday, June 30, 2023 1:51 PM
To: Chang, Hunter <hunter.chang@intel.com>; devel@edk2.groups.io
Cc: Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; S, Ashraf Ali <ashraf.ali.s@intel.com>; Chen, Tina <tina.chen@intel.com>; Chen, Arthur G <arthur.g.chen@intel.com>
Subject: Re: [edk2-devel] [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC file

Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

-----Original Message-----
From: Chang, Hunter <hunter.chang@intel.com> 
Sent: Tuesday, June 13, 2023 5:40 AM
To: devel@edk2.groups.io
Cc: Chang, Hunter <hunter.chang@intel.com>; Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Oram, Isaac W <isaac.w.oram@intel.com>; S, Ashraf Ali <ashraf.ali.s@intel.com>; Chen, Tina <tina.chen@intel.com>; Chen, Arthur G <arthur.g.chen@intel.com>
Subject: [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC file

From: Hunter Chang <hunter.chang@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4371

Add gEndOfSiInitPpiGuid definition in IntelSiliconPkg.dec gEndOfSiInitPpiGuid indicates the end of all of the silicon init.
Add it to IntellSiliconPkg for AFP improvement.

Signed-off-by: Hunter Chang <hunter.chang@intel.com>

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Tina Chen <tina.chen@intel.com>
Cc: Arthur Chen <arthur.g.chen@intel.com>
---
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index ec8690a8d6..c540ef40ad 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -113,6 +113,7 @@
   gEdkiiVTdInfoPpiGuid = { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x67, 0xaf, 0x2b, 0x25, 0x68, 0x4a } }   gEdkiiVTdNullRootEntryTableGuid = { 0x3de0593f, 0x6e3e, 0x4542, { 0xa1, 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } }   gIntelDieInfoPpiGuid = { 0xF9E45CBF, 0x1E21, 0x434A, { 0x90, 0x88, 0x1D, 0x10, 0x38, 0xF3, 0x68, 0xF2 }}+  gEndOfSiInitPpiGuid  = { 0xE2E3D5D1, 0x8356, 0x4F96, { 0x9C, 0x9E, 0x2E, 0xC3, 0x48, 0x1D, 0xEA, 0x88 }}  [Protocols]   ## Protocols that provide services for the Intel(R) PCH SPI Host Controller Compatibility Interface-- 
2.26.2.windows.1







^ permalink raw reply related	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2023-06-30 20:55 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-06-13 12:40 [PATCH v1] IntelSiliconPkg: Add gEndOfSiInitPpiGuid definition in DEC file Chang, Hunter
2023-06-13 13:56 ` Ashraf Ali S
2023-06-13 14:15 ` Ni, Ray
2023-06-14  1:54   ` Chang, Hunter
2023-06-30 20:51 ` Isaac Oram
     [not found] ` <176D8B046956B609.23465@groups.io>
2023-06-30 20:54   ` [edk2-devel] " Isaac Oram

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